static ssize_t config_pmuid_read(struct file *filp, char __user *buffer, size_t count, loff_t *ppos)
{
int len = 0;
char idarray[32];
memset(idarray, 0, 32);
len = sprintf(idarray, "0x%02x\n", get_pmuid());
return simple_read_from_buffer(buffer, count, ppos, (void *)idarray, len);
}
static int __init hisik3_pm_init(void)
{
unsigned int addr;
/* alloc memmory for suspend */
hi_cpu_godpsleep_ddrbase = (unsigned long)kzalloc((SR_PROTECT_CTX_BUFF_SIZE) , GFP_DMA|GFP_KERNEL);
if (0 == hi_cpu_godpsleep_ddrbase) {
pr_err("[PM]kmallc err for hi_cpu_godpsleep_ddrbase!\r\n");
return -1;
}
/* timer0 is for CPU0's tick input, here get timer0's clk handle,
we will close it before we enter deep sleep status */
timer0_clk = clk_get(NULL, "clk_timer0");
if (NULL == timer0_clk) {
pr_warn("[PM]WARN:get \"clk_timer0\" clk failed!\r\n");
}
hi_cpu_godpsleep_phybase = __pa(hi_cpu_godpsleep_ddrbase);
pr_notice("[PM]hi_cpu_godpsleep_ddrbase =0x%lx\r\n.hi_cpu_godpsleep_phybase=0x%lx.\r\n",
hi_cpu_godpsleep_ddrbase,
hi_cpu_godpsleep_phybase);
/**
* slave cpu entry address is already setting to
* addr = (unsigned long) IO_ADDRESS(REG_BASE_SCTRL + 0x314)
* we take it out. relpace it.
**/
addr = (unsigned long) IO_ADDRESS(REG_BASE_SCTRL + 0x314);
hi_slave_orig_entry_address = readl(addr);
hi_slave_mark_phybase = hi_cpu_godpsleep_phybase;
/* hilpm_cpu_godpsleep() use disable_mmu() and enable_mmu()
which running in securam.we copy the two functions during init phase*/
hilpm_cp_securam_code();
#ifdef CONFIG_CPU_IDLE
hilpm_cp_cpuidle_code();
#endif
/* get the base address of timer0 */
timer0_base_addr = (unsigned long) IO_ADDRESS(REG_BASE_TIMER0);
/* change the slave cpu entry address */
writel(SLAVE_CPU_ENTRY_CODE_ADDR, addr);
addr = (unsigned long) IO_ADDRESS(REG_BASE_SCTRL + 0x10);
if (get_pmuid() >= 0x24)
writel(SCXTALCTRL_CFG_VAL_005MS, addr);
else
writel(SCXTALCTRL_CFG_VAL_200MS, addr);
suspend_set_ops(&hisik3_pm_ops);
/* power off function */
pm_power_off = hisik3_power_off;
/* reset notify noboot cpu hotplug */
k3v2_reset = _k3v2oem1_reset;
arm_pm_restart = k3v2_reset;
register_reboot_notifier(&pm_reboot_nb);
return 0;
}
