static int msm_serial_runtime_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct uart_port *port;
port = get_port_from_line(pdev->id);
dev_dbg(dev, "pm_runtime: suspending\n");
msm_deinit_clock(port);
return 0;
}
static int msm_hsl_runtime_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct uart_port *port;
port = get_port_from_line(pdev->id);
dev_dbg(dev, "pm_runtime: resuming\n");
msm_hsl_init_clock(port);
return 0;
}
static int __init msm_serial_probe(struct platform_device *pdev)
{
struct msm_port *msm_port;
struct resource *resource;
struct uart_port *port;
int irq;
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial: detected port #%d\n", pdev->id);
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
msm_port = UART_TO_MSM(port);
if (platform_get_resource_byname(pdev, IORESOURCE_MEM, "gsbi_resource"))
msm_port->is_uartdm = 1;
else
msm_port->is_uartdm = 0;
if (msm_port->is_uartdm) {
msm_port->clk = clk_get(&pdev->dev, "gsbi_uart_clk");
msm_port->pclk = clk_get(&pdev->dev, "gsbi_pclk");
} else {
msm_port->clk = clk_get(&pdev->dev, "uart_clk");
msm_port->pclk = ERR_PTR(-ENOENT);
}
if (unlikely(IS_ERR(msm_port->clk) || (IS_ERR(msm_port->pclk) &&
msm_port->is_uartdm)))
return PTR_ERR(msm_port->clk);
if (msm_port->is_uartdm)
clk_set_rate(msm_port->clk, 7372800);
port->uartclk = clk_get_rate(msm_port->clk);
printk(KERN_INFO "uartclk = %d\n", port->uartclk);
resource = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"uart_resource");
if (unlikely(!resource))
return -ENXIO;
port->mapbase = resource->start;
irq = platform_get_irq(pdev, 0);
if (unlikely(irq < 0))
return -ENXIO;
port->irq = irq;
platform_set_drvdata(pdev, port);
return uart_add_one_port(&msm_uart_driver, port);
}
static int msm_hsl_runtime_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct uart_port *port;
port = get_port_from_line(pdev->id);
dev_dbg(dev, "pm_runtime: suspending\n");
msm_hsl_deinit_clock(port);
D("%s ():port->line %d, ir\n", __func__, port->line);
return 0;
}
static int msm_hsl_console_setup(struct console *co, char *options)
{
struct uart_port *port;
unsigned int vid;
int baud = 0, flow, bits, parity;
int ret;
pr_info("%s: ir\n", __func__);
if (unlikely(co->index >= UART_NR || co->index < 0))
return -ENXIO;
port = get_port_from_line(co->index);
vid = UART_TO_MSM(port)->ver_id;
pr_info("%s ():port->line %d, ir\n", __func__, port->line);
if (unlikely(!port->membase))
return -ENXIO;
port->cons = co;
pm_runtime_get_noresume(port->dev);
#ifndef CONFIG_PM_RUNTIME
msm_hsl_init_clock(port);
#endif
pm_runtime_resume(port->dev);
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
bits = 8;
parity = 'n';
flow = 'n';
msm_hsl_write(port, UARTDM_MR2_BITS_PER_CHAR_8 | STOP_BIT_ONE,
regmap[vid][UARTDM_MR2]);
if (baud < 300 || baud > 115200)
baud = 115200;
msm_hsl_set_baud_rate(port, baud);
pr_info("%s: cir port[%d] set baud=%d\n", __func__, port->line, baud);
ret = uart_set_options(port, co, baud, parity, bits, flow);
msm_hsl_reset(port);
msm_hsl_write(port, CR_PROTECTION_EN, regmap[vid][UARTDM_CR]);
msm_hsl_write(port, UARTDM_CR_TX_EN_BMSK, regmap[vid][UARTDM_CR]);
printk(KERN_INFO "msm_serial_hsl: console setup on port #%d\n",
port->line);
pr_info("%s ():port->line %d, ok, ir\n", __func__, port->line);
return ret;
}
/* show_msm_console - provide per-port serial console state. */
static ssize_t show_msm_console(struct device *dev,
struct device_attribute *attr, char *buf)
{
int enable;
struct uart_port *port;
struct platform_device *pdev = to_platform_device(dev);
port = get_port_from_line(pdev->id);
enable = get_console_state(port);
D("%s () :port->line %d, ir\n", __func__, port->line);
return snprintf(buf, sizeof(enable), "%d\n", enable);
}
static int msm_serial_suspend(struct platform_device *pdev, pm_message_t state)
{
struct uart_port *port;
port = get_port_from_line(pdev->id);
if (port) {
uart_suspend_port(&msm_uart_driver, port);
if (is_console(port))
msm_deinit_clock(port);
}
return 0;
}
static int msm_serial_resume(struct platform_device *pdev)
{
struct uart_port *port;
port = get_port_from_line(pdev->id);
if (port) {
if (is_console(port))
msm_init_clock(port);
uart_resume_port(&msm_uart_driver, port);
}
return 0;
}
static int __init msm_serial_probe(struct platform_device *pdev)
{
struct msm_port *msm_port;
struct resource *resource;
struct uart_port *port;
struct msm_serial_platform_data *pdata = pdev->dev.platform_data;
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial: detected port #%d\n", pdev->id);
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
msm_port = UART_TO_MSM(port);
msm_port->clk = clk_get(&pdev->dev, "uart_clk");
if (unlikely(IS_ERR(msm_port->clk)))
return PTR_ERR(msm_port->clk);
port->uartclk = clk_get_rate(msm_port->clk);
resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!resource))
return -ENXIO;
port->mapbase = resource->start;
port->irq = platform_get_irq(pdev, 0);
if (unlikely(port->irq < 0))
return -ENXIO;
platform_set_drvdata(pdev, port);
if (unlikely(set_irq_wake(port->irq, 1)))
return -ENXIO;
#ifdef CONFIG_SERIAL_MSM_RX_WAKEUP
if (port->line == 0) /* BT is serial device 0 */
if (unlikely(set_irq_wake(MSM_GPIO_TO_INT(45), 1)))
return -ENXIO;
#endif
#ifdef CONFIG_SERIAL_MSM_CLOCK_CONTROL
msm_port->clk_state = MSM_CLK_PORT_OFF;
hrtimer_init(&msm_port->clk_off_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
msm_port->clk_off_timer.function = msm_serial_clock_off;
msm_port->clk_off_delay = ktime_set(0, 1000000); /* 1 ms */
#endif
return uart_add_one_port(&msm_uart_driver, port);
}
static int __init msm_hsl_console_setup(struct console *co, char *options)
{
struct uart_port *port;
int baud, flow, bits, parity;
int ret;
if (unlikely(co->index >= UART_NR || co->index < 0))
return -ENXIO;
port = get_port_from_line(co->index);
if (unlikely(!port->membase))
return -ENXIO;
port->cons = co;
pm_runtime_get_noresume(port->dev);
#ifndef CONFIG_PM_RUNTIME
msm_hsl_init_clock(port);
#endif
pm_runtime_resume(port->dev);
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
bits = 8;
parity = 'n';
flow = 'n';
msm_hsl_write(port, UARTDM_MR2_BITS_PER_CHAR_8 | STOP_BIT_ONE,
UARTDM_MR2_ADDR); /* 8N1 */
if (baud < 300 || baud > 115200)
baud = 115200;
msm_hsl_set_baud_rate(port, baud);
ret = uart_set_options(port, co, baud, parity, bits, flow);
msm_hsl_reset(port);
/* Enable transmitter */
msm_hsl_write(port, CR_PROTECTION_EN, UARTDM_CR_ADDR);
msm_hsl_write(port, UARTDM_CR_TX_EN_BMSK, UARTDM_CR_ADDR);
printk(KERN_INFO "msm_serial_hsl: console setup on port #%d\n",
port->line);
console_uart_port = port;
b_terminal_onoff = 0;
return ret;
}
/*
* Interrupts are disabled on entering
*/
static void rk2818_console_write(struct console *co, const char *s, u_int count)
{
struct uart_port *port;
struct rk2818_port *rk2818_port;
BUG_ON(co->index < 0 || co->index >= UART_NR);
port = get_port_from_line(co->index);
rk2818_port = UART_TO_RK2818(port);
spin_lock(&port->lock);
uart_console_write(port, s, count, rk2818_console_putchar);
spin_unlock(&port->lock);
}
static void msm_console_write(struct console *co, const char *s,
unsigned int count)
{
struct uart_port *port;
struct msm_port *msm_port;
BUG_ON(co->index < 0 || co->index >= UART_NR);
port = get_port_from_line(co->index);
msm_port = UART_TO_MSM(port);
spin_lock(&port->lock);
uart_console_write(port, s, count, msm_console_putchar);
spin_unlock(&port->lock);
}
/*
* set_msm_console - allow to enable/disable serial console on port.
*
* writing 1 enables serial console on UART port.
* writing 0 disables serial console on UART port.
*/
static ssize_t set_msm_console(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int enable, cur_state;
struct uart_port *port;
struct platform_device *pdev = to_platform_device(dev);
port = get_port_from_line(pdev->id);
cur_state = get_console_state(port);
enable = buf[0] - '0';
D("%s ():port->line %d,enable %d, cur_state %d ir\n", __func__, port->line, enable, cur_state);
if (enable == cur_state)
return count;
switch (enable) {
case 0:
D("%s(): Calling stop_console\n", __func__);
console_stop(port->cons);
D("%s(): Calling unregister_console\n", __func__);
unregister_console(port->cons);
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
/*
* Disable UART Core clk
* 3 - to disable the UART clock
* Thid parameter is not used here, but used in serial core.
*/
msm_hsl_power_irda(port, 3, 1);
break;
case 1:
D("%s(): Calling register_console\n", __func__);
/*
* Disable UART Core clk
* 0 - to enable the UART clock
* Thid parameter is not used here, but used in serial core.
*/
msm_hsl_power_irda(port, 0, 1);
pm_runtime_enable(&pdev->dev);
register_console(port->cons);
break;
default:
return -EINVAL;
}
return count;
}
static int msm_serial_hsl_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct uart_port *port;
port = get_port_from_line(pdev->id);
if (port) {
if (is_console(port))
msm_hsl_init_clock(port);
uart_resume_port(&msm_hsl_uart_driver, port);
if (device_may_wakeup(dev))
disable_irq_wake(port->irq);
}
return 0;
}
static void msm_hsl_console_write(struct console *co, const char *s,
unsigned int count)
{
struct uart_port *port;
struct msm_hsl_port *msm_hsl_port;
int locked;
int num = 0 , i;
const char *last_break;
BUG_ON(co->index < 0 || co->index >= UART_NR);
port = get_port_from_line(co->index);
msm_hsl_port = UART_TO_MSM(port);
/* not pretty, but we can end up here via various convoluted paths */
if (port->sysrq || oops_in_progress)
locked = spin_trylock(&port->lock);
else {
locked = 1;
spin_lock(&port->lock);
}
/* need to replace LFs by CRLFs */
last_break = s;
for (i = 0; i < count; i++, s++) {
if (*s == '\n') {
if (num > 0)
msm_hsl_console_putchars(port, num, last_break);
last_break += num + 1;
num = 0;
msm_hsl_console_putchars(port, 2, "\r\n");
} else {
num++;
if (num > port->fifosize) {
msm_hsl_console_putchars(port, 256, last_break);
last_break += port->fifosize;
num = 1;
}
}
}
msm_hsl_console_putchars(port, num, last_break);
if (locked == 1)
spin_unlock(&port->lock);
}
static int __init msm_console_setup(struct console *co, char *options)
{
struct uart_port *port;
struct msm_port *msm_port;
int baud, flow, bits, parity;
if (unlikely(co->index >= UART_NR || co->index < 0))
return -ENXIO;
port = get_port_from_line(co->index);
msm_port = UART_TO_MSM(port);
if (unlikely(!port->membase))
return -ENXIO;
port->cons = co;
msm_init_clock(port);
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
bits = 8;
parity = 'n';
flow = 'n';
msm_write(port, UART_MR2_BITS_PER_CHAR_8 | UART_MR2_STOP_BIT_LEN_ONE,
UART_MR2); /* 8N1 */
if (baud < 300 || baud > 115200)
baud = 115200;
msm_set_baud_rate(port, baud);
msm_reset(port);
if (msm_port->is_uartdm) {
msm_write(port, UART_CR_CMD_PROTECTION_EN, UART_CR);
msm_write(port, UART_CR_TX_ENABLE, UART_CR);
}
printk(KERN_INFO "msm_serial: console setup on port #%d\n", port->line);
return uart_set_options(port, co, baud, parity, bits, flow);
}
static int __devexit msm_serial_hsl_remove(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port = platform_get_drvdata(pdev);
struct uart_port *port;
port = get_port_from_line(pdev->id);
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
device_set_wakeup_capable(&pdev->dev, 0);
platform_set_drvdata(pdev, NULL);
uart_remove_one_port(&msm_hsl_uart_driver, port);
clk_put(msm_hsl_port->pclk);
clk_put(msm_hsl_port->clk);
debugfs_remove(msm_hsl_port->loopback_dir);
return 0;
}
static int msm_serial_hsl_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct uart_port *port;
port = get_port_from_line(pdev->id);
D("%s ():port->line %d, ir\n", __func__, port->line);
if (port) {
if (irda_enable_flg == 0)
enable_irda(irda_enable_flg);
D("%s ():is_console:port->line %d, ir\n", __func__, port->line);
if (is_console(port))
msm_hsl_deinit_clock(port);
uart_suspend_port(&msm_hsl_uart_driver, port);
if (device_may_wakeup(dev))
enable_irq_wake(port->irq);
}
return 0;
}
static int __init msm_console_setup(struct console *co, char *options)
{
struct uart_port *port;
int baud, flow, bits, parity;
if (unlikely(co->index >= UART_NR || co->index < 0))
return -ENXIO;
port = get_port_from_line(co->index);
if (unlikely(!port->membase))
return -ENXIO;
port->cons = co;
pm_runtime_get_noresume(port->dev);
#ifndef CONFIG_PM_RUNTIME
msm_init_clock(port);
#endif
pm_runtime_resume(port->dev);
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
bits = 8;
parity = 'n';
flow = 'n';
msm_write(port, UART_MR2_BITS_PER_CHAR_8 | UART_MR2_STOP_BIT_LEN_ONE,
UART_MR2); /* 8N1 */
if (baud < 300 || baud > 115200)
baud = 115200;
msm_set_baud_rate(port, baud);
msm_reset(port);
printk(KERN_INFO "msm_serial: console setup on port #%d\n", port->line);
return uart_set_options(port, co, baud, parity, bits, flow);
}
static int __init msm_console_setup(struct console *co, char *options)
{
struct uart_port *port;
int baud, flow, bits, parity;
if (unlikely(co->index >= UART_NR || co->index < 0))
return -ENXIO;
port = get_port_from_line(co->index);
if (unlikely(!port->membase))
return -ENXIO;
port->cons = co;
msm_init_clock(port);
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
bits = 8;
parity = 'n';
flow = 'n';
msm_write(port, UART_MR2_BITS_PER_CHAR_8 | UART_MR2_STOP_BIT_LEN_ONE,
UART_MR2); /* 8N1 */
if (baud < 300 || baud > 115200)
baud = 115200;
msm_set_baud_rate(port, baud);
msm_reset(port);
/* FIH, Debbie, 2010/01/04 { */
#ifdef CONFIG_FIH_FXX
fih_printk(serial_debug_mask, FIH_DEBUG_ZONE_G0, "msm_serial: console setup on port #%d\n", port->line);
#else
printk(KERN_INFO "msm_serial: console setup on port #%d\n", port->line);
#endif
/* FIH, Debbie, 2010/01/04 } */
return uart_set_options(port, co, baud, parity, bits, flow);
}
static int msm_serial_hsl_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct msm_hsl_port *msm_cir_port = htc_cir_port;
struct uart_port *port;
port = get_port_from_line(pdev->id);
pr_info("[CIR] %s ():port->line %d, ir\n", __func__, port->line);
if (port) {
if (cir_enable_flg == 0)
enable_cir(cir_enable_flg);
pr_info("%s ():is_console:port->line %d, ir\n", __func__, port->line);
if (is_console(port))
msm_hsl_deinit_clock(port);
uart_suspend_port(&msm_hsl_uart_driver, port);
if (device_may_wakeup(dev))
enable_irq_wake(port->irq);
}
if(power_state == 1)
msm_cir_port->power(0);
return 0;
}
static int msm_serial_runtime_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct uart_port *port;
port = get_port_from_line(pdev->id);
// BEGIN 0010274: [email protected] 2010-10-27
// Fixed a problem that system don't go to sleep mode.
#if 0 //defined(CONFIG_MACH_LGE_BRYCE)
struct msm_port *msm_port;
if(uart_det_flag){
msm_port = UART_TO_MSM(port);
clk_enable(msm_port->clk);
}
#endif
// END 0010274: [email protected] 2010-10-27
dev_dbg(dev, "pm_runtime: resuming\n");
msm_init_clock(port);
return 0;
}
static ssize_t set_msm_console(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
int enable, cur_state;
struct uart_port *port;
struct platform_device *pdev = to_platform_device(dev);
port = get_port_from_line(pdev->id);
cur_state = get_console_state(port);
enable = buf[0] - '0';
pr_info("%s ():port->line %d,enable %d, cur_state %d ir\n", __func__, port->line, enable, cur_state);
if (enable == cur_state)
return count;
switch (enable) {
case 0:
pr_info("%s(): Calling stop_console\n", __func__);
console_stop(port->cons);
pr_debug("%s(): Calling unregister_console\n", __func__);
unregister_console(port->cons);
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
msm_hsl_power_cir(port, 3, 1);
break;
case 1:
pr_info("%s(): Calling register_console\n", __func__);
msm_hsl_power_cir(port, 0, 1);
pm_runtime_enable(&pdev->dev);
register_console(port->cons);
break;
default:
return -EINVAL;
}
return count;
}
static int msm_serial_hsl_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct msm_hsl_port *msm_cir_port = htc_cir_port;
struct uart_port *port;
port = get_port_from_line(pdev->id);
pr_info("[CIR] %s ():port->line %d, ir\n", __func__, port->line);
if(power_state == 1)
msm_cir_port->power(1);
if (port) {
pr_info("%s ():uart_resume_port:port->line %d, ir\n", __func__, port->line);
enable_cir(3);
uart_resume_port(&msm_hsl_uart_driver, port);
if (device_may_wakeup(dev))
disable_irq_wake(port->irq);
if (is_console(port))
msm_hsl_init_clock(port);
}
return 0;
}
static int __devexit msm_serial_hsl_remove(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port = platform_get_drvdata(pdev);
struct uart_port *port;
D("%s (): ir\n", __func__);
port = get_port_from_line(pdev->id);
#ifdef CONFIG_SERIAL_MSM_HSL_CONSOLE
device_remove_file(&pdev->dev, &dev_attr_console);
#endif
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
device_set_wakeup_capable(&pdev->dev, 0);
platform_set_drvdata(pdev, NULL);
uart_remove_one_port(&msm_hsl_uart_driver, port);
clk_put(msm_hsl_port->pclk);
clk_put(msm_hsl_port->clk);
debugfs_remove(msm_hsl_port->loopback_dir);
return 0;
}
static int __devinit rk2818_serial_probe(struct platform_device *pdev)
{
struct rk2818_port *rk2818_port;
struct resource *resource;
struct uart_port *port;
struct rk2818_serial_platform_data *pdata = pdev->dev.platform_data;
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "rk2818_serial: detected port %d\n", pdev->id);
if (pdata && pdata->io_init)
pdata->io_init();
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
rk2818_port = UART_TO_RK2818(port);
rk2818_port->clk = clk_get(&pdev->dev, "uart");
if (unlikely(IS_ERR(rk2818_port->clk)))
return PTR_ERR(rk2818_port->clk);
port->uartclk = clk_get_rate(rk2818_port->clk);
resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!resource))
return -ENXIO;
port->mapbase = resource->start;
port->irq = platform_get_irq(pdev, 0);
if (unlikely(port->irq < 0))
return -ENXIO;
platform_set_drvdata(pdev, port);
return uart_add_one_port(&rk2818_uart_driver, port);
}
static int __devinit msm_serial_hsl_probe(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port;
struct resource *uart_resource;
struct resource *gsbi_resource;
struct uart_port *port;
int ret;
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial_hsl: detected port #%d\n", pdev->id);
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
msm_hsl_port = UART_TO_MSM(port);
if (msm_serial_hsl_has_gsbi()) {
gsbi_resource =
platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
if (unlikely(!gsbi_resource))
return -ENXIO;
msm_hsl_port->clk = clk_get(&pdev->dev, "gsbi_uart_clk");
msm_hsl_port->pclk = clk_get(&pdev->dev, "gsbi_pclk");
} else {
msm_hsl_port->clk = clk_get(&pdev->dev, "uartdm_clk");
msm_hsl_port->pclk = NULL;
}
if (unlikely(IS_ERR(msm_hsl_port->clk))) {
printk(KERN_ERR "%s: Error getting clk\n", __func__);
return PTR_ERR(msm_hsl_port->clk);
}
if (unlikely(IS_ERR(msm_hsl_port->pclk))) {
printk(KERN_ERR "%s: Error getting pclk\n", __func__);
return PTR_ERR(msm_hsl_port->pclk);
}
uart_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"uartdm_resource");
if (unlikely(!uart_resource)) {
printk(KERN_ERR "getting uartdm_resource failed\n");
return -ENXIO;
}
port->mapbase = uart_resource->start;
port->irq = platform_get_irq(pdev, 0);
if (unlikely(port->irq < 0)) {
printk(KERN_ERR "%s: getting irq failed\n", __func__);
return -ENXIO;
}
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, port);
pm_runtime_enable(port->dev);
msm_hsl_debugfs_init(msm_hsl_port, pdev->id);
ret = uart_add_one_port(&msm_hsl_uart_driver, port);
return ret;
}
static int __init msm_serial_hsl_probe(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port;
struct resource *uart_resource;
struct resource *gsbi_resource;
struct uart_port *port;
struct msm_serial_hslite_platform_data *pdata = pdev->dev.platform_data;
int ret;
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial_hsl: detected port #%d\n", pdev->id);
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
msm_hsl_port = UART_TO_MSM(port);
if (pdata && pdata->config_gpio) {
ret = gpio_request(pdata->uart_tx_gpio, "UART_TX_GPIO");
if (unlikely(ret)) {
printk(KERN_ERR "%s: gpio request failed for:"
"%d\n", __func__, pdata->uart_tx_gpio);
return ret;
}
ret = gpio_request(pdata->uart_rx_gpio, "UART_RX_GPIO");
if (unlikely(ret)) {
printk(KERN_ERR "%s: gpio request failed for:"
"%d\n", __func__, pdata->uart_rx_gpio);
gpio_free(pdata->uart_tx_gpio);
return ret;
}
}
if (msm_serial_hsl_has_gsbi()) {
gsbi_resource =
platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
if (unlikely(!gsbi_resource))
return -ENXIO;
msm_hsl_port->clk = clk_get(&pdev->dev, "gsbi_uart_clk");
msm_hsl_port->pclk = clk_get(&pdev->dev, "gsbi_pclk");
} else {
msm_hsl_port->clk = clk_get(&pdev->dev, "uartdm_clk");
msm_hsl_port->pclk = NULL;
}
if (unlikely(IS_ERR(msm_hsl_port->clk))) {
printk(KERN_ERR "%s: Error getting clk\n", __func__);
return PTR_ERR(msm_hsl_port->clk);
}
if (unlikely(IS_ERR(msm_hsl_port->pclk))) {
printk(KERN_ERR "%s: Error getting pclk\n", __func__);
return PTR_ERR(msm_hsl_port->pclk);
}
/* Set up the MREG/NREG/DREG/MNDREG */
ret = clk_set_rate(msm_hsl_port->clk, 7372800);
if (ret) {
printk(KERN_WARNING "Error setting clock rate on UART\n");
return ret;
}
uart_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"uartdm_resource");
if (unlikely(!uart_resource)) {
printk(KERN_ERR "getting uartdm_resource failed\n");
return -ENXIO;
}
port->mapbase = uart_resource->start;
port->irq = platform_get_irq(pdev, 0);
if (unlikely(port->irq < 0)) {
printk(KERN_ERR "%s: getting irq failed\n", __func__);
return -ENXIO;
}
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, port);
pm_runtime_enable(port->dev);
ret = uart_add_one_port(&msm_hsl_uart_driver, port);
return ret;
}
static int __init msm_serial_probe(struct platform_device *pdev)
{
struct msm_port *msm_port;
struct resource *resource;
struct uart_port *port;
#ifdef CONFIG_SERIAL_MSM_RX_WAKEUP
struct msm_serial_platform_data *pdata = pdev->dev.platform_data;
#endif
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial: detected port #%d\n", pdev->id);
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
msm_port = UART_TO_MSM(port);
msm_port->clk = clk_get(&pdev->dev, "uart_clk");
if (unlikely(IS_ERR(msm_port->clk)))
return PTR_ERR(msm_port->clk);
port->uartclk = clk_get_rate(msm_port->clk);
resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!resource))
return -ENXIO;
port->mapbase = resource->start;
port->irq = platform_get_irq(pdev, 0);
if (unlikely(port->irq < 0))
return -ENXIO;
platform_set_drvdata(pdev, port);
if (unlikely(set_irq_wake(port->irq, 1)))
return -ENXIO;
#ifdef CONFIG_SERIAL_MSM_RX_WAKEUP
if (pdata == NULL)
msm_port->wakeup.irq = -1;
else {
msm_port->wakeup.irq = pdata->wakeup_irq;
msm_port->wakeup.ignore = 1;
msm_port->wakeup.inject_rx = pdata->inject_rx_on_wakeup;
msm_port->wakeup.rx_to_inject = pdata->rx_to_inject;
if (unlikely(msm_port->wakeup.irq <= 0))
return -EINVAL;
}
#endif
#ifdef CONFIG_SERIAL_MSM_CLOCK_CONTROL
msm_port->clk_state = MSM_CLK_PORT_OFF;
hrtimer_init(&msm_port->clk_off_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
msm_port->clk_off_timer.function = msm_serial_clock_off;
msm_port->clk_off_delay = ktime_set(0, 1000000); /* 1 ms */
#endif
pm_runtime_enable(port->dev);
return uart_add_one_port(&msm_uart_driver, port);
}
static int __init msm_serial_hsl_probe(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port;
struct resource *uart_resource;
struct resource *gsbi_resource;
struct uart_port *port;
int ret;
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial_hsl: detected port #%d\n", pdev->id);
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
msm_hsl_port = UART_TO_MSM(port);
if (msm_serial_hsl_has_gsbi()) {
gsbi_resource =
platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
if (unlikely(!gsbi_resource))
return -ENXIO;
msm_hsl_port->clk = clk_get(&pdev->dev, "gsbi_uart_clk");
msm_hsl_port->pclk = clk_get(&pdev->dev, "gsbi_pclk");
} else {
msm_hsl_port->clk = clk_get(&pdev->dev, "uartdm_clk");
msm_hsl_port->pclk = NULL;
}
if (unlikely(IS_ERR(msm_hsl_port->clk))) {
printk(KERN_ERR "%s: Error getting clk\n", __func__);
return PTR_ERR(msm_hsl_port->clk);
}
if (unlikely(IS_ERR(msm_hsl_port->pclk))) {
printk(KERN_ERR "%s: Error getting pclk\n", __func__);
return PTR_ERR(msm_hsl_port->pclk);
}
/* Set up the MREG/NREG/DREG/MNDREG */
#ifdef CONFIG_LGE_FELICA
ret = clk_set_rate(msm_hsl_port->clk, 7372800);
if (ret) {
printk(KERN_WARNING "Error setting clock rate on UART\n");
return ret;
}
#else // [email protected] 30550g original, remove clk_set_rate
#endif
uart_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"uartdm_resource");
if (unlikely(!uart_resource)) {
printk(KERN_ERR "getting uartdm_resource failed\n");
return -ENXIO;
}
port->mapbase = uart_resource->start;
port->irq = platform_get_irq(pdev, 0);
if (unlikely(port->irq < 0)) {
printk(KERN_ERR "%s: getting irq failed\n", __func__);
return -ENXIO;
}
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, port);
pm_runtime_enable(port->dev);
ret = uart_add_one_port(&msm_hsl_uart_driver, port);
return ret;
}