void mainboard_smi_sleep(u8 slp_typ)
{
/* Disable USB charging if required */
switch (slp_typ) {
case ACPI_S3:
if (smm_get_gnvs()->s3u0 == 0) {
google_chromeec_set_usb_charge_mode(
0, USB_CHARGE_MODE_DISABLED);
google_chromeec_set_usb_charge_mode(
1, USB_CHARGE_MODE_DISABLED);
}
set_gpio(GPIO_PP3300_CODEC_EN, 0);
set_gpio(GPIO_WLAN_DISABLE_L, 0);
/* Enable wake events */
google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
break;
case ACPI_S5:
if (smm_get_gnvs()->s5u0 == 0) {
google_chromeec_set_usb_charge_mode(
0, USB_CHARGE_MODE_DISABLED);
google_chromeec_set_usb_charge_mode(
1, USB_CHARGE_MODE_DISABLED);
}
set_gpio(GPIO_PP3300_CODEC_EN, 0);
set_gpio(GPIO_WLAN_DISABLE_L, 0);
/* Enable wake events */
google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS);
break;
}
/* Disable SCI and SMI events */
google_chromeec_set_smi_mask(0);
google_chromeec_set_sci_mask(0);
/* Clear pending events that may trigger immediate wake */
while (google_chromeec_get_event() != 0)
;
}
static u8 mainboard_smi_ec(void)
{
u8 cmd = google_chromeec_get_event();
#if CONFIG(ELOG_GSMI)
/* Log this event */
if (cmd)
elog_add_event_byte(ELOG_TYPE_EC_EVENT, cmd);
#endif
switch (cmd) {
case EC_HOST_EVENT_LID_CLOSED:
printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
/* Go to S5 */
write_pmbase32(PM1_CNT, read_pmbase32(PM1_CNT) | (0xf << 10));
break;
}
return cmd;
}
void mainboard_ec_init(void)
{
if (acpi_is_wakeup_s3()) {
google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS |
MAINBOARD_EC_S3_WAKE_EVENTS);
/* Disable SMI and wake events */
google_chromeec_set_smi_mask(0);
/* Clear pending events */
while (google_chromeec_get_event() != 0)
;
/* Restore SCI event mask */
google_chromeec_set_sci_mask(MAINBOARD_EC_SCI_EVENTS);
} else {
google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS |
MAINBOARD_EC_S5_WAKE_EVENTS);
}
/* Clear wake event mask */
google_chromeec_set_wake_mask(0);
}
void mainboard_smi_sleep(u8 slp_typ)
{
#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
switch (slp_typ) {
case 3:
/* Enable wake events */
google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
break;
case 5:
/* Enable wake events */
google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS);
break;
}
/* Disable SCI and SMI events */
google_chromeec_set_smi_mask(0);
google_chromeec_set_sci_mask(0);
/* Clear pending events that may trigger immediate wake */
while (google_chromeec_get_event() != 0)
;
#endif
}
/* Find the last port80 code from the previous boot */
static u16 google_chromeec_get_port80_last_boot(void)
{
struct ec_response_port80_last_boot rsp;
struct chromeec_command cmd = {
.cmd_code = EC_CMD_PORT80_LAST_BOOT,
.cmd_data_out = &rsp,
.cmd_size_out = sizeof(rsp),
};
/* Get last port80 code */
if (google_chromeec_command(&cmd) == 0)
return rsp.code;
return 0;
}
#endif
void google_chromeec_log_events(u32 mask)
{
#if CONFIG_ELOG
u8 event;
u16 code;
/* Find the last port80 code */
code = google_chromeec_get_port80_last_boot();
/* Log the last post code only if it is abornmal */
if (code > 0 && code != POST_OS_BOOT && code != POST_OS_RESUME)
printk(BIOS_DEBUG, "Chrome EC: Last POST code was 0x%02x\n",
code);
while ((event = google_chromeec_get_event()) != 0) {
if (EC_HOST_EVENT_MASK(event) & mask)
elog_add_event_byte(ELOG_TYPE_EC_EVENT, event);
}
#endif
}
void mainboard_smi_sleep(uint8_t slp_typ)
{
/* Disable USB charging if required */
switch (slp_typ) {
case ACPI_S3:
if (smm_get_gnvs()->s3u0 == 0)
google_chromeec_set_usb_charge_mode(
0, USB_CHARGE_MODE_DISABLED);
if (smm_get_gnvs()->s3u1 == 0)
google_chromeec_set_usb_charge_mode(
1, USB_CHARGE_MODE_DISABLED);
/* Enable wake events */
google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
/* Enable wake pin in GPE block. */
enable_gpe(WAKE_GPIO_EN);
break;
case ACPI_S5:
if (smm_get_gnvs()->s5u0 == 0)
google_chromeec_set_usb_charge_mode(
0, USB_CHARGE_MODE_DISABLED);
if (smm_get_gnvs()->s5u1 == 0)
google_chromeec_set_usb_charge_mode(
1, USB_CHARGE_MODE_DISABLED);
/* Enable wake events */
google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS);
break;
}
/* Disable SCI and SMI events */
google_chromeec_set_smi_mask(0);
google_chromeec_set_sci_mask(0);
/* Clear pending events that may trigger immediate wake */
while (google_chromeec_get_event() != 0);
}
void google_chromeec_events_init(const struct google_chromeec_event_info *info,
bool is_s3_wakeup)
{
if (is_s3_wakeup) {
google_chromeec_log_events(info->log_events |
info->s3_wake_events);
/* Log and clear device events that may wake the system. */
google_chromeec_log_device_events(info->s3_device_events);
/* Disable SMI and wake events. */
google_chromeec_set_smi_mask(0);
/* Clear pending events. */
while (google_chromeec_get_event() != 0)
;
/* Restore SCI event mask. */
google_chromeec_set_sci_mask(info->sci_events);
} else {
google_chromeec_set_smi_mask(info->smi_events);
google_chromeec_log_events(info->log_events |
info->s5_wake_events);
if (google_chromeec_is_uhepi_supported())
google_chromeec_set_lazy_wake_masks
(info->s5_wake_events,
info->s3_wake_events,
info->s0ix_wake_events);
}
/* Clear wake event mask. */
google_chromeec_set_wake_mask(0);
}
static u8 mainboard_smi_ec(void)
{
u8 cmd = google_chromeec_get_event();
u32 pm1_cnt;
#if CONFIG_ELOG_GSMI
/* Log this event */
if (cmd)
elog_add_event_byte(ELOG_TYPE_EC_EVENT, cmd);
#endif
switch (cmd) {
case EC_HOST_EVENT_LID_CLOSED:
printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
/* Go to S5 */
pm1_cnt = inl(get_pmbase() + PM1_CNT);
pm1_cnt |= (0xf << 10);
outl(pm1_cnt, get_pmbase() + PM1_CNT);
break;
}
return cmd;
}
static u8 mainboard_smi_ec(void)
{
u8 cmd = 0;
#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
u32 pm1_cnt;
cmd = google_chromeec_get_event();
/* Log this event */
if (IS_ENABLED(CONFIG_ELOG_GSMI) && cmd)
elog_add_event_byte(ELOG_TYPE_EC_EVENT, cmd);
switch (cmd) {
case EC_HOST_EVENT_LID_CLOSED:
printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
/* Go to S5 */
pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT);
pm1_cnt |= (0xf << 10);
outl(pm1_cnt, ACPI_BASE_ADDRESS + PM1_CNT);
break;
}
#endif
return cmd;
}
void mainboard_smi_sleep(uint8_t slp_typ)
{
void *addr;
uint32_t mask;
/* Disable USB charging if required */
switch (slp_typ) {
case 3:
#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
if (smm_get_gnvs()->s3u0 == 0)
google_chromeec_set_usb_charge_mode(
0, USB_CHARGE_MODE_DISABLED);
if (smm_get_gnvs()->s3u1 == 0)
google_chromeec_set_usb_charge_mode(
1, USB_CHARGE_MODE_DISABLED);
/* Enable wake events */
google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
#endif
/* Enable wake pin in GPE block. */
enable_gpe(WAKE_GPIO_EN);
break;
case 5:
#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
if (smm_get_gnvs()->s5u0 == 0)
google_chromeec_set_usb_charge_mode(
0, USB_CHARGE_MODE_DISABLED);
if (smm_get_gnvs()->s5u1 == 0)
google_chromeec_set_usb_charge_mode(
1, USB_CHARGE_MODE_DISABLED);
/* Enable wake events */
google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS);
#endif
/* Disabling wake from SUS_GPIO1 (TOUCH INT) and
* SUS_GPIO7 (TRACKPAD INT) in North bank as they are not
* valid S5 wake sources
*/
addr = (void *)(IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPNORTH +
GPIO_WAKE_MASK_REG0);
mask = ~(GPIO_SUS1_WAKE_MASK | GPIO_SUS7_WAKE_MASK);
write32(addr, read32(addr) & mask);
break;
}
#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
/* Disable SCI and SMI events */
google_chromeec_set_smi_mask(0);
google_chromeec_set_sci_mask(0);
/* Clear pending events that may trigger immediate wake */
while (google_chromeec_get_event() != 0)
;
if (smm_get_gnvs()->bdid == BOARD_PRE_EVT) {
/* Set LPC lines to low power in S3/S5. */
if ((slp_typ == SLEEP_STATE_S3) || (slp_typ == SLEEP_STATE_S5))
lpc_set_low_power();
}
#endif
}
static void clear_pending_events(void)
{
while (google_chromeec_get_event() != 0)
;
}
