示例#1
0
文件: ec_lpc.c 项目: AdriDlu/coreboot
/*
 * Declare the IO ports that we are using:
 *
 * All ECs (not explicitly declared):
 * 0x60/0x64, 0x62/0x66, 0x80, 0x200->0x207
 *
 * mec1322:	0x800->0x807
 * All others:	0x800->0x9ff
 *
 * EC_GOOGLE_CHROMEEC_ACPI_MEMMAP is only used for MEC ECs.
 */
static void lpc_ec_read_resources(struct device *dev)
{
	unsigned int idx = 0;
	struct resource * res;
	uint16_t base;
	size_t size;

	google_chromeec_ioport_range(&base, &size);
	res = new_resource(dev, idx++);
	res->base = base;
	res->size = size;
	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
示例#2
0
static void bootblock_ec_init(void)
{
	uint16_t ec_ioport_base;
	size_t ec_ioport_size;

	/*
	 * Set up LPC decoding for the ChromeEC I/O port ranges:
	 * - Ports 62/66, 60/64, and 200->208
	 * - ChromeEC specific communication I/O ports.
	 */
	lpc_enable_fixed_io_ranges(IOE_EC_62_66 | IOE_KBC_60_64 | IOE_LGE_200);
	google_chromeec_ioport_range(&ec_ioport_base, &ec_ioport_size);
	lpc_open_pmio_window(ec_ioport_base, ec_ioport_size);
}