static irqreturn_t h3600_micro_serial_isr(int irq, void *dev_id, struct pt_regs *regs) { unsigned int status; /* UTSR0 */ unsigned int pass_counter = 0; if (0) printk("%s: %s\n", __FILE__, __FUNCTION__); g_statistics.isr++; status = Ser1UTSR0; do { if ( status & (UTSR0_RID | UTSR0_RFS) ) { if ( status & UTSR0_RID ) Ser1UTSR0 = UTSR0_RID; /* Clear the Receiver IDLE bit */ h3600_micro_rx_chars(); } /* Clear break bits */ if (status & (UTSR0_RBB | UTSR0_REB)) Ser1UTSR0 = status & (UTSR0_RBB | UTSR0_REB); if ( status & UTSR0_TFS ) h3600_micro_tx_chars(); status = Ser1UTSR0; } while ( (((g_txdev.head != g_txdev.tail) && (status & UTSR0_TFS)) || status & (UTSR0_RFS | UTSR0_RID )) && pass_counter++ < H3600_TS_PASS_LIMIT ); if ( pass_counter >= H3600_TS_PASS_LIMIT ) g_statistics.pass_limit++; return IRQ_HANDLED; }
static irqreturn_t h3600_micro_serial_isr(int irq, void *dev_id) { unsigned int status; /* UTSR0 */ int head,tail; /*unsigned int pass_counter = 0;*/ if (0) printk("%s\n", __FUNCTION__); //statistics.isr++; status = Ser1UTSR0; do { if ( status & (UTSR0_RID | UTSR0_RFS) ) { if ( status & UTSR0_RID ) Ser1UTSR0 = UTSR0_RID; /* Clear the Receiver IDLE bit */ h3600_micro_rx_chars(); } /* Clear break bits */ if (status & (UTSR0_RBB | UTSR0_REB)) Ser1UTSR0 = status & (UTSR0_RBB | UTSR0_REB); if ( status & UTSR0_TFS ) h3600_micro_tx_chars(); status = Ser1UTSR0; head = atomic_read(&tx.head); tail = atomic_read(&tx.tail); } while ( ( ( (head != tail) && (status & UTSR0_TFS) ) || status & (UTSR0_RFS | UTSR0_RID ) ) /*&& pass_counter++ < H3600_TS_PASS_LIMIT*/ ); //if ( pass_counter >= H3600_TS_PASS_LIMIT ) // statistics.pass_limit++; return IRQ_HANDLED; }