SR_PRIV int hung_chang_dso_2100_poll(int fd, int revents, void *cb_data)
{
struct sr_datafeed_packet packet = { .type = SR_DF_FRAME_BEGIN };
const struct sr_dev_inst *sdi;
struct dev_context *devc;
uint8_t state, buf[1000];
(void)fd;
(void)revents;
if (!(sdi = cb_data))
return TRUE;
if (!(devc = sdi->priv))
return TRUE;
if (devc->state_known)
hung_chang_dso_2100_write_mbox(sdi->conn, 0x99);
state = hung_chang_dso_2100_read_mbox(sdi->conn, 0.00025);
devc->state_known = (state != 0x00);
if (!devc->state_known || state == 0x21)
return TRUE;
if (state != 0x03) {
sr_err("Unexpected state 0x%X while checking for trigger", state);
return FALSE;
}
sr_session_send(sdi, &packet);
if (devc->channel) {
while (read_subframe(sdi, buf)) {
if (hung_chang_dso_2100_move_to(sdi, 1) != SR_OK)
break;
hung_chang_dso_2100_write_mbox(sdi->conn, 3);
g_usleep(1700);
if (hung_chang_dso_2100_read_mbox(sdi->conn, 0.02) != 0x03)
break;
}
}
packet.type = SR_DF_FRAME_END;
sr_session_send(sdi, &packet);
if (++devc->frame >= devc->frame_limit)
hung_chang_dso_2100_dev_acquisition_stop(sdi);
else
hung_chang_dso_2100_move_to(sdi, 0x21);
return TRUE;
}
static int config_commit(const struct sr_dev_inst *sdi)
{
uint8_t state = hung_chang_dso_2100_read_mbox(sdi->conn, 0.02);
int ret;
if (sdi->status != SR_ST_ACTIVE)
return SR_ERR_DEV_CLOSED;
switch (state) {
case 0x03:
case 0x14:
case 0x21:
/* we will travel the complete config path on our way to state 1 */
break;
case 0x00:
state = 0x01;
default:
ret = hung_chang_dso_2100_move_to(sdi, 1);
if (ret != SR_OK)
return ret;
case 0x01:
hung_chang_dso_2100_write_mbox(sdi->conn, 4);
}
ret = hung_chang_dso_2100_move_to(sdi, 1);
if (ret != SR_OK)
return ret;
return hung_chang_dso_2100_move_to(sdi, state);
}
SR_PRIV int hung_chang_dso_2100_move_to(const struct sr_dev_inst *sdi, uint8_t target)
{
struct dev_context *devc = sdi->priv;
int timeout = 40;
uint8_t c;
while (timeout--) {
c = hung_chang_dso_2100_read_mbox(sdi->conn, 0.1);
if (c == target)
return SR_OK;
switch (c) {
case 0x00:
/* Can happen if someone wrote something into
* the mbox that was not expected by the uC.
* Alternating between 0xff and 4 helps in
* all states. */
c = (timeout & 1) ? 0xFF : 0x04;
break;
case 0x01:
switch (target) {
case 0x21: c = 2; break;
case 0x03: c = 3; break;
default: c = 4;
}
break;
case 0x03: c = 4; break;
case 0x05: c = devc->rate + 1; break;
case 0x06: c = devc->cctl[0]; break;
case 0x07: c = devc->cctl[1]; break;
case 0x08: c = 1 /* step 2 */ + 1 ; break;
case 0x09: c = readout_steps[devc->step].step1 + 1; break;
case 0x0A: c = readout_steps[devc->step].shift + 1; break;
case 0x0B: c = devc->edge + 1; break;
case 0x0C: c = devc->pos[0]; break;
case 0x0D: c = devc->pos[1]; break;
case 0x0E: c = devc->tlevel; break;
case 0x0F:
if (!devc->channel)
c = 1;
else if (readout_steps[devc->step].interleave)
c = devc->adc2 ? 2 : 1;
else
c = devc->channel;
break;
case 0x10: c = devc->offset[0]; break;
case 0x11: c = devc->gain[0]; break;
case 0x12: c = devc->offset[1]; break;
case 0x13: c = devc->gain[1]; break;
case 0x14:
case 0x21: c = 0xFF; break;
default:
return SR_ERR_DATA;
}
hung_chang_dso_2100_write_mbox(sdi->conn, c);
}
return SR_ERR_TIMEOUT;
}
