/**
* i40e_ptp_set_increment - Utility function to update clock increment rate
* @pf: Board private structure
*
* During a link change, the DMA frequency that drives the 1588 logic will
* change. In order to keep the PRTTSYN_TIME registers in units of nanoseconds,
* we must update the increment value per clock tick.
**/
void i40e_ptp_set_increment(struct i40e_pf *pf)
{
struct i40e_link_status *hw_link_info;
struct i40e_hw *hw = &pf->hw;
u64 incval;
u32 mult;
hw_link_info = &hw->phy.link_info;
i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
switch (hw_link_info->link_speed) {
case I40E_LINK_SPEED_10GB:
mult = I40E_PTP_10GB_INCVAL_MULT;
break;
case I40E_LINK_SPEED_1GB:
mult = I40E_PTP_1GB_INCVAL_MULT;
break;
case I40E_LINK_SPEED_100MB:
{
static int warn_once;
if (!warn_once) {
dev_warn(&pf->pdev->dev,
"1588 functionality is not supported at 100 Mbps. Stopping the PHC.\n");
warn_once++;
}
mult = 0;
break;
}
case I40E_LINK_SPEED_40GB:
default:
mult = 1;
break;
}
/* The increment value is calculated by taking the base 40GbE incvalue
* and multiplying it by a factor based on the link speed.
*/
incval = I40E_PTP_40GB_INCVAL * mult;
/* Write the new increment value into the increment register. The
* hardware will not update the clock until both registers have been
* written.
*/
wr32(hw, I40E_PRTTSYN_INC_L, incval & 0xFFFFFFFF);
wr32(hw, I40E_PRTTSYN_INC_H, incval >> 32);
/* Update the base adjustement value. */
WRITE_ONCE(pf->ptp_adj_mult, mult);
smp_mb(); /* Force the above update. */
}
/**
* i40e_ptp_set_increment - Utility function to update clock increment rate
* @pf: Board private structure
*
* During a link change, the DMA frequency that drives the 1588 logic will
* change. In order to keep the PRTTSYN_TIME registers in units of nanoseconds,
* we must update the increment value per clock tick.
**/
void i40e_ptp_set_increment(struct i40e_pf *pf)
{
struct i40e_link_status *hw_link_info;
struct i40e_hw *hw = &pf->hw;
u64 incval;
hw_link_info = &hw->phy.link_info;
i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
switch (hw_link_info->link_speed) {
case I40E_LINK_SPEED_10GB:
incval = I40E_PTP_10GB_INCVAL;
break;
case I40E_LINK_SPEED_1GB:
incval = I40E_PTP_1GB_INCVAL;
break;
case I40E_LINK_SPEED_100MB:
{
static int warn_once;
if (!warn_once) {
dev_warn(&pf->pdev->dev,
"1588 functionality is not supported at 100 Mbps. Stopping the PHC.\n");
warn_once++;
}
incval = 0;
break;
}
case I40E_LINK_SPEED_40GB:
default:
incval = I40E_PTP_40GB_INCVAL;
break;
}
/* Write the new increment value into the increment register. The
* hardware will not update the clock until both registers have been
* written.
*/
wr32(hw, I40E_PRTTSYN_INC_L, incval & 0xFFFFFFFF);
wr32(hw, I40E_PRTTSYN_INC_H, incval >> 32);
/* Update the base adjustement value. */
ACCESS_ONCE(pf->ptp_base_adj) = incval;
smp_mb(); /* Force the above update. */
}
