static u32 intel_panel_get_max_backlight(struct drm_device *dev) { u32 max; max = i915_read_blc_pwm_ctl(dev); if (HAS_PCH_SPLIT(dev)) { max >>= 16; } else { if (INTEL_INFO(dev)->gen < 4)
static u32 intel_panel_get_max_backlight(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; u32 max; if (IS_VALLEYVIEW(dev) && dev_priv->is_mipi) return 0xff; max = i915_read_blc_pwm_ctl(dev); if (HAS_PCH_SPLIT(dev)) { max >>= 16; } else { if (INTEL_INFO(dev)->gen < 4)
u32 intel_panel_get_max_backlight(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; u32 max; max = i915_read_blc_pwm_ctl(dev_priv); if (max == 0) { /* XXX add code here to query mode clock or hardware clock * and program max PWM appropriately. */ printk_once(KERN_WARNING "fixme: max PWM is zero.\n"); return 1; } if (HAS_PCH_SPLIT(dev)) { max >>= 16; } else { if (IS_PINEVIEW(dev)) {
u32 intel_panel_get_max_backlight(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; u32 max; max = i915_read_blc_pwm_ctl(dev_priv); if (max == 0) { /* XXX add code here to query mode clock or hardware clock * and program max PWM appropriately. */ #if 0 printf("fixme: max PWM is zero.\n"); #endif return 1; } if (HAS_PCH_SPLIT(dev)) { max >>= 16; } else { if (INTEL_INFO(dev)->gen < 4)