/**
* igb_init_hw_82575 - Initialize hardware
* @hw: pointer to the HW structure
*
* This inits the hardware readying it for operation.
**/
static s32 igb_init_hw_82575(struct e1000_hw *hw)
{
struct e1000_mac_info *mac = &hw->mac;
s32 ret_val;
u16 i, rar_count = mac->rar_entry_count;
/* Initialize identification LED */
ret_val = igb_id_led_init(hw);
if (ret_val) {
hw_dbg("Error initializing identification LED\n");
/* This is not fatal and we should not stop init due to this */
}
/* Disabling VLAN filtering */
hw_dbg("Initializing the IEEE VLAN\n");
igb_clear_vfta(hw);
/* Setup the receive address */
igb_init_rx_addrs(hw, rar_count);
/* Zero out the Multicast HASH table */
hw_dbg("Zeroing the MTA\n");
for (i = 0; i < mac->mta_reg_count; i++)
array_wr32(E1000_MTA, i, 0);
/* Zero out the Unicast HASH table */
hw_dbg("Zeroing the UTA\n");
for (i = 0; i < mac->uta_reg_count; i++)
array_wr32(E1000_UTA, i, 0);
/* Setup link and flow control */
ret_val = igb_setup_link(hw);
/*
* Clear all of the statistics registers (clear on read). It is
* important that we do this after we have tried to establish link
* because the symbol error count will increment wildly if there
* is no link.
*/
igb_clear_hw_cntrs_82575(hw);
return ret_val;
}
static s32 igb_init_hw_82575(struct e1000_hw *hw)
{
struct e1000_mac_info *mac = &hw->mac;
s32 ret_val;
u16 i, rar_count = mac->rar_entry_count;
ret_val = igb_id_led_init(hw);
if (ret_val) {
hw_dbg("Error initializing identification LED\n");
}
hw_dbg("Initializing the IEEE VLAN\n");
if (hw->mac.type == e1000_i350)
igb_clear_vfta_i350(hw);
else
igb_clear_vfta(hw);
igb_init_rx_addrs(hw, rar_count);
hw_dbg("Zeroing the MTA\n");
for (i = 0; i < mac->mta_reg_count; i++)
array_wr32(E1000_MTA, i, 0);
hw_dbg("Zeroing the UTA\n");
for (i = 0; i < mac->uta_reg_count; i++)
array_wr32(E1000_UTA, i, 0);
ret_val = igb_setup_link(hw);
igb_clear_hw_cntrs_82575(hw);
return ret_val;
}
int
igb_m_setprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
uint_t pr_valsize, const void *pr_val)
{
igb_t *igb = (igb_t *)arg;
struct e1000_hw *hw = &igb->hw;
int err = 0;
uint32_t flow_control;
uint32_t cur_mtu, new_mtu;
uint32_t rx_size;
uint32_t tx_size;
mutex_enter(&igb->gen_lock);
if (igb->igb_state & IGB_SUSPENDED) {
mutex_exit(&igb->gen_lock);
return (ECANCELED);
}
if (igb->loopback_mode != IGB_LB_NONE && igb_param_locked(pr_num)) {
/*
* All en_* parameters are locked (read-only)
* while the device is in any sort of loopback mode.
*/
mutex_exit(&igb->gen_lock);
return (EBUSY);
}
switch (pr_num) {
case MAC_PROP_EN_1000FDX_CAP:
/* read/write on copper, read-only on serdes */
if (hw->phy.media_type != e1000_media_type_copper) {
err = ENOTSUP;
break;
}
igb->param_en_1000fdx_cap = *(uint8_t *)pr_val;
igb->param_adv_1000fdx_cap = *(uint8_t *)pr_val;
goto setup_link;
case MAC_PROP_EN_100FDX_CAP:
if (hw->phy.media_type != e1000_media_type_copper) {
err = ENOTSUP;
break;
}
igb->param_en_100fdx_cap = *(uint8_t *)pr_val;
igb->param_adv_100fdx_cap = *(uint8_t *)pr_val;
goto setup_link;
case MAC_PROP_EN_100HDX_CAP:
if (hw->phy.media_type != e1000_media_type_copper) {
err = ENOTSUP;
break;
}
igb->param_en_100hdx_cap = *(uint8_t *)pr_val;
igb->param_adv_100hdx_cap = *(uint8_t *)pr_val;
goto setup_link;
case MAC_PROP_EN_10FDX_CAP:
if (hw->phy.media_type != e1000_media_type_copper) {
err = ENOTSUP;
break;
}
igb->param_en_10fdx_cap = *(uint8_t *)pr_val;
igb->param_adv_10fdx_cap = *(uint8_t *)pr_val;
goto setup_link;
case MAC_PROP_EN_10HDX_CAP:
if (hw->phy.media_type != e1000_media_type_copper) {
err = ENOTSUP;
break;
}
igb->param_en_10hdx_cap = *(uint8_t *)pr_val;
igb->param_adv_10hdx_cap = *(uint8_t *)pr_val;
goto setup_link;
case MAC_PROP_AUTONEG:
if (hw->phy.media_type != e1000_media_type_copper) {
err = ENOTSUP;
break;
}
igb->param_adv_autoneg_cap = *(uint8_t *)pr_val;
goto setup_link;
case MAC_PROP_FLOWCTRL:
bcopy(pr_val, &flow_control, sizeof (flow_control));
switch (flow_control) {
default:
err = EINVAL;
break;
case LINK_FLOWCTRL_NONE:
hw->fc.requested_mode = e1000_fc_none;
break;
case LINK_FLOWCTRL_RX:
hw->fc.requested_mode = e1000_fc_rx_pause;
break;
case LINK_FLOWCTRL_TX:
hw->fc.requested_mode = e1000_fc_tx_pause;
break;
case LINK_FLOWCTRL_BI:
hw->fc.requested_mode = e1000_fc_full;
break;
}
setup_link:
if (err == 0) {
if (igb_setup_link(igb, B_TRUE) != IGB_SUCCESS)
err = EINVAL;
}
break;
case MAC_PROP_ADV_1000FDX_CAP:
case MAC_PROP_ADV_1000HDX_CAP:
case MAC_PROP_ADV_100T4_CAP:
case MAC_PROP_ADV_100FDX_CAP:
case MAC_PROP_ADV_100HDX_CAP:
case MAC_PROP_ADV_10FDX_CAP:
case MAC_PROP_ADV_10HDX_CAP:
case MAC_PROP_EN_1000HDX_CAP:
case MAC_PROP_EN_100T4_CAP:
case MAC_PROP_STATUS:
case MAC_PROP_SPEED:
case MAC_PROP_DUPLEX:
err = ENOTSUP; /* read-only prop. Can't set this. */
break;
case MAC_PROP_MTU:
/* adapter must be stopped for an MTU change */
if (igb->igb_state & IGB_STARTED) {
err = EBUSY;
break;
}
cur_mtu = igb->default_mtu;
bcopy(pr_val, &new_mtu, sizeof (new_mtu));
if (new_mtu == cur_mtu) {
err = 0;
break;
}
if (new_mtu < MIN_MTU || new_mtu > MAX_MTU) {
err = EINVAL;
break;
}
err = mac_maxsdu_update(igb->mac_hdl, new_mtu);
if (err == 0) {
igb->default_mtu = new_mtu;
igb->max_frame_size = igb->default_mtu +
sizeof (struct ether_vlan_header) + ETHERFCSL;
/*
* Set rx buffer size
*/
rx_size = igb->max_frame_size + IPHDR_ALIGN_ROOM;
igb->rx_buf_size = ((rx_size >> 10) + ((rx_size &
(((uint32_t)1 << 10) - 1)) > 0 ? 1 : 0)) << 10;
/*
* Set tx buffer size
*/
tx_size = igb->max_frame_size;
igb->tx_buf_size = ((tx_size >> 10) + ((tx_size &
(((uint32_t)1 << 10) - 1)) > 0 ? 1 : 0)) << 10;
}
break;
case MAC_PROP_PRIVATE:
err = igb_set_priv_prop(igb, pr_name, pr_valsize, pr_val);
break;
default:
err = EINVAL;
break;
}