/*ARGSUSED*/
int
seeprom_read(dev_t dev, struct uio *uio, int flags)
{
struct seeprom_softc *sc;
i2c_addr_t addr;
u_int8_t ch, cmdbuf[2];
int a, error;
if ((sc = device_lookup_private(&seeprom_cd, minor(dev))) == NULL)
return (ENXIO);
if (uio->uio_offset >= sc->sc_size)
return (EINVAL);
/*
* Even though the AT24Cxx EEPROMs support sequential
* reads within a page, some I2C controllers do not
* support anything other than single-byte transfers,
* so we're stuck with this lowest-common-denominator.
*/
while (uio->uio_resid > 0 && uio->uio_offset < sc->sc_size) {
if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
return (error);
a = (int)uio->uio_offset;
if (sc->sc_cmdlen == 1) {
addr = sc->sc_address + (a >> 8);
cmdbuf[0] = a & 0xff;
} else {
static int
awin_tve_read_edid_block(struct awin_tve_softc *sc, uint8_t *data,
uint8_t block)
{
i2c_tag_t tag = sc->sc_i2c;
uint8_t wbuf[2];
int error;
if (tag == NULL) {
aprint_error_dev(sc->sc_dev,
"couldn't find awiniic2 - no DDC2 possible\n");
return -1;
}
if ((error = iic_acquire_bus(tag, I2C_F_POLL)) != 0)
return error;
wbuf[0] = block; /* start address */
if ((error = iic_exec(tag, I2C_OP_READ_WITH_STOP, DDC_ADDR, wbuf, 1,
data, 128, I2C_F_POLL)) != 0) {
iic_release_bus(tag, I2C_F_POLL);
return error;
}
iic_release_bus(tag, I2C_F_POLL);
return 0;
}
static int
hytp14_refresh_sensor(struct hytp14_sc *sc)
{
int error = 0;
uint8_t buf[I2C_EXEC_MAX_BUFLEN];
/* no more than once per second */
if (hardclock_ticks - sc->sc_refresh < hz)
return sc->sc_valid;
DPRINTF(2, ("hytp14_refresh_sensor(%s)\n", device_xname(sc->sc_dev)));
if ((error = iic_acquire_bus(sc->sc_tag, 0)) == 0) {
DPRINTF(3, ("hytp14_refresh_sensor(%s): bus locked\n", device_xname(sc->sc_dev)));
/* send MR command */
/* avoid quick read/write by providing a result buffer */
if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc->sc_addr, NULL, 0, buf, sizeof buf, 0)) == 0) {
DPRINTF(3, ("hytp14_refresh_sensor(%s): MR sent\n",
device_xname(sc->sc_dev)));
/* send DF command - read data from sensor */
if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_addr, NULL, 0, sc->sc_data,
sizeof sc->sc_data, 0)) != 0) {
DPRINTF(2, ("%s: %s: failed read from 0x%02x - error %d\n",
device_xname(sc->sc_dev),
__func__, sc->sc_addr, error));
} else {
DPRINTF(2, ("hytp14_refresh_sensor(%s): DF success : 0x%02x%02x%02x%02x\n",
device_xname(sc->sc_dev),
sc->sc_data[0],
sc->sc_data[1],
sc->sc_data[2],
sc->sc_data[3]));
}
} else {
DPRINTF(2, ("%s: %s: failed read from 0x%02x - error %d\n",
device_xname(sc->sc_dev), __func__,
sc->sc_addr, error));
}
iic_release_bus(sc->sc_tag, 0);
DPRINTF(3, ("hytp14_refresh_sensor(%s): bus released\n", device_xname(sc->sc_dev)));
} else {
DPRINTF(2, ("%s: %s: failed read from 0x%02x - error %d\n",
device_xname(sc->sc_dev), __func__, sc->sc_addr, error));
}
sc->sc_refresh = hardclock_ticks;
if (error == 0) {
sc->sc_valid = ENVSYS_SVALID;
} else {
sc->sc_valid = ENVSYS_SINVALID;
}
return sc->sc_valid;
}
/*ARGSUSED*/
int
pcfrtc_write(dev_t dev, struct uio *uio, int flags)
{
struct pcfrtc_softc *sc;
u_int8_t cmdbuf[2];
int a, error;
if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL)
return (ENXIO);
if (uio->uio_offset >= PCF8583_NVRAM_SIZE)
return (EINVAL);
if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
return (error);
while (uio->uio_resid && uio->uio_offset < PCF8583_NVRAM_SIZE) {
a = (int)uio->uio_offset;
cmdbuf[0] = a + PCF8583_NVRAM_START;
if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0)
break;
if ((error = iic_exec(sc->sc_tag,
uio->uio_resid ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
sc->sc_address, cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) {
printf("%s: pcfrtc_write: write failed at 0x%x\n",
sc->sc_dev.dv_xname, a);
return (error);
}
}
iic_release_bus(sc->sc_tag, 0);
return (error);
}
int
ddc_read_edid_block(i2c_tag_t tag, uint8_t *dest, size_t len, uint8_t block)
{
uint8_t edid[256];
uint8_t wbuf[2];
int error;
if ((error = iic_acquire_bus(tag, I2C_F_POLL)) != 0)
return error;
wbuf[0] = block >> 1; /* start address */
if ((error = iic_exec(tag, I2C_OP_READ_WITH_STOP, DDC_ADDR, wbuf, 1,
edid, sizeof(edid), I2C_F_POLL)) != 0) {
iic_release_bus(tag, I2C_F_POLL);
return error;
}
iic_release_bus(tag, I2C_F_POLL);
if (block & 1) {
memcpy(dest, &edid[128], min(len, 128));
} else {
memcpy(dest, &edid[0], min(len, 128));
}
return 0;
}
int
ricohrtc_clock_write(struct ricohrtc_softc *sc, struct clock_ymdhms *dt)
{
uint8_t bcd[RICOHRTC_NRTC_REGS];
uint8_t cmd;
/*
* Convert our time representation into something the RICOHRTC
* can understand.
*/
bcd[RICOHRTC_SECONDS] = TOBCD(dt->dt_sec);
bcd[RICOHRTC_MINUTES] = TOBCD(dt->dt_min);
bcd[RICOHRTC_HOURS] = TOBCD(dt->dt_hour);
bcd[RICOHRTC_DATE] = TOBCD(dt->dt_day);
bcd[RICOHRTC_DAY] = TOBCD(dt->dt_wday);
bcd[RICOHRTC_MONTH] = TOBCD(dt->dt_mon);
bcd[RICOHRTC_YEAR] = TOBCD(dt->dt_year - POSIX_BASE_YEAR);
iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
cmd = (RICOHRTC_SECONDS << 4);
if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
&cmd, sizeof cmd, bcd, RICOHRTC_NRTC_REGS, I2C_F_POLL)) {
iic_release_bus(sc->sc_tag, I2C_F_POLL);
printf("%s: ricohrtc_clock_write: failed to write rtc\n",
sc->sc_dev.dv_xname);
return (0);
}
iic_release_bus(sc->sc_tag, I2C_F_POLL);
return (1);
}
static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
{
struct sil164_priv *sil = dvo->dev_priv;
struct i2c_controller *adapter = dvo->i2c_bus;
uint8_t out_buf[2];
int ret;
out_buf[0] = addr;
out_buf[1] = ch;
iic_acquire_bus(adapter, 0);
ret = iic_exec(adapter, I2C_OP_WRITE_WITH_STOP, dvo->slave_addr,
NULL, 0, out_buf, 2, 0);
iic_release_bus(adapter, 0);
if (ret)
goto write_err;
return true;
write_err:
if (!sil->quiet) {
DRM_DEBUG_KMS("Unable to write register 0x%02x to %d.\n",
addr, dvo->slave_addr);
}
return false;
}
static int
rs5c372rtc_clock_read(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt)
{
uint8_t bcd[RS5C372_NRTC_REGS];
uint8_t cmdbuf[1];
if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
aprint_error_dev(sc->sc_dev,
"rs5c372rtc_clock_read: failed to acquire I2C bus\n");
return (0);
}
cmdbuf[0] = (RS5C372_SECONDS << 4);
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) {
iic_release_bus(sc->sc_tag, I2C_F_POLL);
aprint_error_dev(sc->sc_dev,
"rs5c372rtc_clock_read: failed to read rtc\n");
return (0);
}
iic_release_bus(sc->sc_tag, I2C_F_POLL);
/*
* Convert the RS5C372's register values into something useable
*/
dt->dt_sec = FROMBCD(bcd[RS5C372_SECONDS] & RS5C372_SECONDS_MASK);
dt->dt_min = FROMBCD(bcd[RS5C372_MINUTES] & RS5C372_MINUTES_MASK);
dt->dt_hour = FROMBCD(bcd[RS5C372_HOURS] & RS5C372_HOURS_24MASK);
dt->dt_day = FROMBCD(bcd[RS5C372_DATE] & RS5C372_DATE_MASK);
dt->dt_mon = FROMBCD(bcd[RS5C372_MONTH] & RS5C372_MONTH_MASK);
dt->dt_year = FROMBCD(bcd[RS5C372_YEAR]) + 2000;
return (1);
}
/*ARGSUSED*/
int
strtc_write(dev_t dev, struct uio *uio, int flags)
{
struct strtc_softc *sc;
u_int8_t cmdbuf[2];
int a, error;
if ((sc = device_lookup_private(&strtc_cd, minor(dev))) == NULL)
return (ENXIO);
if (uio->uio_offset >= M41ST84_USER_RAM_SIZE)
return (EINVAL);
if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
return (error);
while (uio->uio_resid && uio->uio_offset < M41ST84_USER_RAM_SIZE) {
a = (int)uio->uio_offset;
cmdbuf[0] = a + M41ST84_USER_RAM;
if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0)
break;
if ((error = iic_exec(sc->sc_tag,
uio->uio_resid ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
sc->sc_address, cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) {
aprint_error_dev(sc->sc_dev,
"strtc_write: write failed at 0x%x\n", a);
break;
}
}
iic_release_bus(sc->sc_tag, 0);
return (error);
}
static int
pcf8563rtc_clock_write(struct pcf8563rtc_softc *sc, struct clock_ymdhms *dt)
{
uint8_t bcd[PCF8563_NREGS];
uint8_t reg = PCF8563_R_SECOND;
const int flags = cold ? I2C_F_POLL : 0;
bcd[PCF8563_R_SECOND] = bintobcd(dt->dt_sec);
bcd[PCF8563_R_MINUTE] = bintobcd(dt->dt_min);
bcd[PCF8563_R_HOUR] = bintobcd(dt->dt_hour);
bcd[PCF8563_R_DAY] = bintobcd(dt->dt_day);
bcd[PCF8563_R_WEEKDAY] = bintobcd(dt->dt_wday);
bcd[PCF8563_R_MONTH] = bintobcd(dt->dt_mon);
bcd[PCF8563_R_YEAR] = bintobcd(dt->dt_year % 100);
if (dt->dt_year < 2000)
bcd[PCF8563_R_MONTH] |= PCF8563_M_CENTURY;
if (iic_acquire_bus(sc->sc_tag, flags)) {
device_printf(sc->sc_dev, "acquire bus for write failed\n");
return 0;
}
if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_addr, ®, 1,
&bcd[reg], PCF8563_R_YEAR - reg + 1, flags)) {
iic_release_bus(sc->sc_tag, flags);
device_printf(sc->sc_dev, "write failed\n");
return 0;
}
iic_release_bus(sc->sc_tag, flags);
return 1;
}
static int
pcf8563rtc_clock_read(struct pcf8563rtc_softc *sc, struct clock_ymdhms *dt)
{
uint8_t bcd[PCF8563_NREGS];
uint8_t reg = PCF8563_R_CS1;
if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
device_printf(sc->sc_dev, "acquire bus for read failed\n");
return 0;
}
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, ®, 1,
&bcd[reg], PCF8563_R_YEAR - reg + 1, I2C_F_POLL)) {
iic_release_bus(sc->sc_tag, I2C_F_POLL);
device_printf(sc->sc_dev, "read failed\n");
return 0;
}
iic_release_bus(sc->sc_tag, I2C_F_POLL);
dt->dt_sec = FROMBCD(bcd[PCF8563_R_SECOND] & PCF8563_M_SECOND);
dt->dt_min = FROMBCD(bcd[PCF8563_R_MINUTE] & PCF8563_M_MINUTE);
dt->dt_hour = FROMBCD(bcd[PCF8563_R_HOUR] & PCF8563_M_HOUR);
dt->dt_day = FROMBCD(bcd[PCF8563_R_DAY] & PCF8563_M_DAY);
dt->dt_mon = FROMBCD(bcd[PCF8563_R_MONTH] & PCF8563_M_MONTH);
dt->dt_year = FROMBCD(bcd[PCF8563_R_YEAR] & PCF8563_M_YEAR);
dt->dt_year += 2000;
return 1;
}
int
pcfrtc_bootstrap_write(i2c_tag_t tag, int i2caddr, int offset,
u_int8_t *rvp, size_t len)
{
u_int8_t cmdbuf[1];
/*
* NOTE: "offset" is an absolute offset into the PCF8583
* address space, not relative to the NVRAM.
*/
if (len == 0)
return (0);
if (iic_acquire_bus(tag, I2C_F_POLL) != 0)
return (-1);
while (len) {
/* Write a single byte. */
cmdbuf[0] = offset;
if (iic_exec(tag, I2C_OP_WRITE_WITH_STOP, i2caddr,
cmdbuf, 1, rvp, 1, I2C_F_POLL)) {
iic_release_bus(tag, I2C_F_POLL);
return (-1);
}
len--;
rvp++;
offset++;
}
iic_release_bus(tag, I2C_F_POLL);
return (0);
}
int
ricohrtc_clock_read(struct ricohrtc_softc *sc, struct clock_ymdhms *dt)
{
uint8_t bcd[RICOHRTC_NRTC_REGS];
uint8_t cmd;
iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
cmd = (RICOHRTC_SECONDS << 4);
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
&cmd, sizeof cmd, bcd, RICOHRTC_NRTC_REGS, I2C_F_POLL)) {
iic_release_bus(sc->sc_tag, I2C_F_POLL);
printf("%s: ricohrtc_clock_read: failed to read rtc\n",
sc->sc_dev.dv_xname);
return (0);
}
iic_release_bus(sc->sc_tag, I2C_F_POLL);
/*
* Convert the RICOHRTC's register values into something useable
*/
dt->dt_sec = FROMBCD(bcd[RICOHRTC_SECONDS] & RICOHRTC_SECONDS_MASK);
dt->dt_min = FROMBCD(bcd[RICOHRTC_MINUTES] & RICOHRTC_MINUTES_MASK);
dt->dt_hour = FROMBCD(bcd[RICOHRTC_HOURS] & RICOHRTC_HOURS_24MASK);
dt->dt_day = FROMBCD(bcd[RICOHRTC_DATE] & RICOHRTC_DATE_MASK);
dt->dt_mon = FROMBCD(bcd[RICOHRTC_MONTH] & RICOHRTC_MONTH_MASK);
dt->dt_year = FROMBCD(bcd[RICOHRTC_YEAR]) + POSIX_BASE_YEAR;
return (1);
}
void
lm_i2c_attach(struct device *parent, struct device *self, void *aux)
{
struct lm_i2c_softc *sc = (struct lm_i2c_softc *)self;
struct i2c_attach_args *ia = aux;
u_int8_t cmd, data;
sc->sc_tag = ia->ia_tag;
sc->sc_addr = ia->ia_addr;
/* Bus-independent attachment. */
sc->sc_lmsc.lm_writereg = lm_i2c_writereg;
sc->sc_lmsc.lm_readreg = lm_i2c_readreg;
lm_attach(&sc->sc_lmsc);
/* Remember we attached to iic(4). */
sc->sc_lmsc.sbusaddr = ia->ia_addr;
iic_acquire_bus(sc->sc_tag, 0);
cmd = 0x4a;
iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0);
iic_release_bus(sc->sc_tag, 0);
/* Make the bus scan ignore the satellites. */
iic_ignore_addr(0x48 + (data & 0x7));
iic_ignore_addr(0x48 + ((data >> 4) & 0x7));
}
/** Writes a 16-bit register on the ivch */
static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
{
struct ivch_priv *priv = dvo->dev_priv;
struct i2c_controller *adapter = dvo->i2c_bus;
u8 out_buf[3];
int ret;
out_buf[0] = addr;
out_buf[1] = data & 0xff;
out_buf[2] = data >> 8;
iic_acquire_bus(adapter, 0);
ret = iic_exec(adapter, I2C_OP_WRITE_WITH_STOP, dvo->slave_addr,
NULL, 0, out_buf, 3, 0);
iic_release_bus(adapter, 0);
if (ret)
goto write_err;
return true;
write_err:
if (!priv->quiet) {
DRM_DEBUG_KMS("Unable to write register 0x%02x to %d.\n",
addr, dvo->slave_addr);
}
return false;
}
void
tsl_refresh(void *arg)
{
struct tsl_softc *sc = arg;
u_int8_t cmd, data[2];
u_int16_t chan0, chan1;
iic_acquire_bus(sc->sc_tag, 0);
cmd = TSL2560_REG_DATA0;
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
iic_release_bus(sc->sc_tag, 0);
sc->sc_sensor.flags |= SENSOR_FINVALID;
return;
}
chan0 = data[1] << 8 | data[0];
cmd = TSL2560_REG_DATA1;
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
iic_release_bus(sc->sc_tag, 0);
sc->sc_sensor.flags |= SENSOR_FINVALID;
return;
}
chan1 = data[1] << 8 | data[0];
iic_release_bus(sc->sc_tag, 0);
sc->sc_sensor.value = tsl_lux(chan0, chan1);
sc->sc_sensor.flags &= ~SENSOR_FINVALID;
}
void
pcagpio_refresh(void *arg)
{
struct pcagpio_softc *sc = arg;
u_int8_t cmd, bit, in[PCAGPIO_NPORTS], out[PCAGPIO_NPORTS];
int i, port;
iic_acquire_bus(sc->sc_tag, 0);
for (i = 0; i < PCAGPIO_NPORTS; i++) {
cmd = sc->sc_regs[i][PCAGPIO_IN];
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_addr, &cmd, sizeof cmd, &in[i], sizeof in[i], 0))
goto invalid;
cmd = sc->sc_regs[i][PCAGPIO_OUT];
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_addr, &cmd, sizeof cmd, &out[i], sizeof out[i], 0))
goto invalid;
}
for (i = 0; i < sc->sc_npins; i++) {
port = PCAGPIO_PORT(i);
bit = PCAGPIO_BIT(i);
if ((sc->sc_control[port] & bit))
sc->sc_sensor[i].value = (in[port] & bit) ? 1 : 0;
else
sc->sc_sensor[i].value = (out[port] & bit) ? 1 : 0;
}
invalid:
iic_release_bus(sc->sc_tag, 0);
}
void
pcfadc_refresh(void *arg)
{
struct pcfadc_softc *sc = arg;
u_int i;
u_int8_t data[PCF8591_CHANNELS + 1];
iic_acquire_bus(sc->sc_tag, 0);
/* NB: first byte out is stale, so read num_channels + 1 */
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
NULL, 0, data, PCF8591_CHANNELS + 1, 0)) {
iic_release_bus(sc->sc_tag, 0);
return;
}
iic_release_bus(sc->sc_tag, 0);
/* XXX: so far this only supports temperature channels */
for (i = 0; i < sc->sc_nchan; i++) {
struct pcfadc_channel *chp = &sc->sc_channels[i];
if ((chp->chan_sensor.flags & SENSOR_FINVALID) != 0)
continue;
chp->chan_sensor.value = 273150000 + 1000000 *
sc->sc_xlate[data[1 + chp->chan_num]];
}
}
void
sdtemp_refresh(void *arg)
{
struct sdtemp_softc *sc = arg;
u_int8_t cmd;
int16_t data, sdata;
iic_acquire_bus(sc->sc_tag, 0);
cmd = JC_TEMP;
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
&cmd, sizeof cmd, &data, sizeof data, 0) == 0) {
sdata = betoh16(data) & 0x1fff;
if (sdata & 0x1000)
sdata -= 0x2000;
sc->sc_sensor[JCTEMP_TEMP].value =
273150000 + 62500 * sdata;
sc->sc_sensor[JCTEMP_TEMP].flags &= ~SENSOR_FINVALID;
#if 0
printf("sdtemp %04x %04x %d\n", data & 0xffff,
(u_int)sdata & 0xffff,
sc->sc_sensor[JCTEMP_TEMP].value);
#endif
}
iic_release_bus(sc->sc_tag, 0);
}
static void
ioexp_gpio_pin_write(struct ioexp_softc *sc, uint8_t bit, int level,
bool acquire_bus)
{
int error;
if (acquire_bus) {
error = iic_acquire_bus(sc->sc_i2c, 0);
if (error) {
aprint_error_dev(sc->sc_dev,
"unable to acquire bus. error=%d\n", error);
return;
}
}
if (level == GPIO_PIN_LOW)
sc->sc_output &= ~bit;
else
sc->sc_output |= bit;
error = ioexp_write(sc, IOEXP_OUTPUT, sc->sc_output);
if (error)
aprint_error_dev(sc->sc_dev,
"output write failed. error=%d\n", error);
if (acquire_bus)
iic_release_bus(sc->sc_i2c, 0);
}
static void
ioexp_gpio_pin_ctl(struct ioexp_softc *sc, uint8_t bit, int flags,
bool acquire_bus)
{
int error;
if (acquire_bus) {
error = iic_acquire_bus(sc->sc_i2c, 0);
if (error) {
aprint_error_dev(sc->sc_dev,
"unable to acquire bus. error=%d\n", error);
return;
}
}
switch (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
case GPIO_PIN_INPUT:
sc->sc_direction |= bit;
break;
case GPIO_PIN_OUTPUT:
sc->sc_direction &= ~bit;
break;
}
error = ioexp_write(sc, IOEXP_DIRECTION, sc->sc_direction);
if (error)
aprint_error_dev(sc->sc_dev,
"direction write failed. error=%d\n", error);
if (acquire_bus)
iic_release_bus(sc->sc_i2c, 0);
}
static void
pcf8563rtc_attach(device_t parent, device_t self, void *aux)
{
struct pcf8563rtc_softc *sc = device_private(self);
struct i2c_attach_args *ia = aux;
aprint_naive(": Real-time Clock\n");
aprint_normal(": NXP PCF8563 Real-time Clock\n");
sc->sc_dev = self;
sc->sc_tag = ia->ia_tag;
sc->sc_addr = ia->ia_addr;
sc->sc_todr.cookie = sc;
sc->sc_todr.todr_gettime_ymdhms = pcf8563rtc_gettime;
sc->sc_todr.todr_settime_ymdhms = pcf8563rtc_settime;
sc->sc_todr.todr_setwen = NULL;
iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
iic_smbus_write_byte(sc->sc_tag, sc->sc_addr, PCF8563_R_CS1, 0,
I2C_F_POLL);
iic_smbus_write_byte(sc->sc_tag, sc->sc_addr, PCF8563_R_CS2, 0,
I2C_F_POLL);
iic_release_bus(sc->sc_tag, I2C_F_POLL);
todr_attach(&sc->sc_todr);
}
static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
{
struct sil164_priv *sil = dvo->dev_priv;
struct i2c_controller *adapter = dvo->i2c_bus;
u8 out_buf[2];
u8 in_buf[2];
int ret;
out_buf[0] = addr;
out_buf[1] = 0;
iic_acquire_bus(adapter, 0);
ret = iic_exec(adapter, I2C_OP_READ_WITH_STOP, dvo->slave_addr,
&out_buf, 1, in_buf, 1, 0);
if (ret)
goto read_err;
iic_release_bus(adapter, 0);
*ch = in_buf[0];
return true;
read_err:
iic_release_bus(adapter, 0);
if (!sil->quiet) {
DRM_DEBUG_KMS("Unable to read register 0x%02x from %02x.\n",
addr, dvo->slave_addr);
}
return false;
}
void
admtmp_refresh(void *arg)
{
struct admtmp_softc *sc = arg;
u_int8_t cmd, data;
iic_acquire_bus(sc->sc_tag, 0);
cmd = ADM1030_INT_TEMP;
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc->sc_sensor[ADMTMP_INT].value = 273150000 + 1000000 * data;
cmd = ADM1030_EXT_TEMP;
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc->sc_sensor[ADMTMP_EXT].value = 273150000 + 1000000 * data;
cmd = ADM1030_FAN;
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0) {
if (data == 0)
sc->sc_sensor[ADMTMP_FAN].flags |= SENSOR_FINVALID;
else {
sc->sc_sensor[ADMTMP_FAN].value =
sc->sc_fanmul / (2 * (int)data);
sc->sc_sensor[ADMTMP_FAN].flags &= ~SENSOR_FINVALID;
}
}
iic_release_bus(sc->sc_tag, 0);
}
static int
ac100_rtc_gettime(todr_chip_handle_t tch, struct clock_ymdhms *dt)
{
struct ac100_softc *sc = tch->cookie;
uint16_t sec, min, hou, wee, day, mon, yea;
iic_acquire_bus(sc->sc_i2c, 0);
ac100_read(sc, AC100_RTC_SEC_REG, &sec);
ac100_read(sc, AC100_RTC_MIN_REG, &min);
ac100_read(sc, AC100_RTC_HOU_REG, &hou);
ac100_read(sc, AC100_RTC_WEE_REG, &wee);
ac100_read(sc, AC100_RTC_DAY_REG, &day);
ac100_read(sc, AC100_RTC_MON_REG, &mon);
ac100_read(sc, AC100_RTC_YEA_REG, &yea);
iic_release_bus(sc->sc_i2c, 0);
dt->dt_year = POSIX_BASE_YEAR + bcdtobin(yea & 0xff);
dt->dt_mon = bcdtobin(mon & 0x1f);
dt->dt_day = bcdtobin(day & 0x3f);
dt->dt_wday = bcdtobin(wee & 0x7);
dt->dt_hour = bcdtobin(hou & 0x3f);
dt->dt_min = bcdtobin(min & 0x7f);
dt->dt_sec = bcdtobin(sec & 0x7f);
return 0;
}
int
ricohrtc_match(struct device *parent, void *v, void *arg)
{
struct i2c_attach_args *ia = arg;
#ifdef PARANOID_CHECKS
u_int8_t data, cmd;
#endif
if (ia->ia_addr != RICOHRTC_ADDR)
return (0);
#ifdef PARANOID_CHECKS
/* Verify that the 'reserved bits in a few registers read 0 */
if (iic_acquire_bus(ia->ia_tag, I2C_F_POLL)) {
printf("ricohrtc acquire fail\n");
return (0);
}
cmd = RICOHRTC_SECONDS;
if (iic_exec(ia->ia_tag, I2C_OP_READ_WITH_STOP, ia->ia_addr,
&cmd, sizeof cmd, &data, sizeof data, I2C_F_POLL)) {
iic_release_bus(ia->ia_tag, I2C_F_POLL);
printf("ricohrtc read %d fail\n", cmd);
return (0);
}
if ((data & ~RICOHRTC_SECONDS_MASK) != 0) {
printf("ricohrtc second %d\n",data);
return (0);
}
cmd = RICOHRTC_MINUTES;
if (iic_exec(ia->ia_tag, I2C_OP_READ_WITH_STOP, ia->ia_addr,
&cmd, sizeof cmd, &data, sizeof data, I2C_F_POLL)) {
iic_release_bus(ia->ia_tag, I2C_F_POLL);
printf("ricohrtc read %d fail\n", cmd);
return (0);
}
if ((data & ~RICOHRTC_MINUTES_MASK) != 0) {
printf("ricohrtc minute %d\n",data);
return (0);
}
cmd = RICOHRTC_HOURS;
if (iic_exec(ia->ia_tag, I2C_OP_READ_WITH_STOP, ia->ia_addr,
&cmd, sizeof cmd, &data, sizeof data, I2C_F_POLL)) {
iic_release_bus(ia->ia_tag, I2C_F_POLL);
printf("ricohrtc read %d fail\n", cmd);
return (0);
}
if ((data & ~RICOHRTC_HOURS_24MASK) != 0) {
printf("ricohrtc hour %d\n",data);
return (0);
}
#endif
iic_release_bus(ia->ia_tag, I2C_F_POLL);
return (1);
}
void
tps65090_write_reg(struct tps65090_softc *sc, uint8_t cmd, uint8_t val)
{
iic_acquire_bus(sc->sc_tag, 0);
iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc->sc_addr, &cmd, 1, &val, 1, 0);
iic_release_bus(sc->sc_tag, 0);
}
void
fintek_refresh(void *arg)
{
struct fintek_softc *sc = arg;
u_int8_t cmd, data, data2;
int i;
iic_acquire_bus(sc->sc_tag, 0);
for (i = 0; i < FINTEK_WORKLIST_SZ; i++){
cmd = fintek_worklist[i].cmd;
if (fintek_read_reg(sc, cmd, &data, sizeof data)) {
sc->sc_sensor[i].flags |= SENSOR_FINVALID;
continue;
}
sc->sc_sensor[i].flags &= ~SENSOR_FINVALID;
switch (fintek_worklist[i].sensor) {
case F_VCC:
sc->sc_sensor[i].value = data * 16000;
break;
case F_V1:
/* FALLTHROUGH */
case F_V2:
/* FALLTHROUGH */
case F_V3:
sc->sc_sensor[i].value = data * 8000;
break;
case F_TEMP1:
/* FALLTHROUGH */
case F_TEMP2:
sc->sc_sensor[i].value = 273150000 + data * 1000000;
break;
case F_FAN1:
/* FALLTHROUGH */
case F_FAN2:
/* FANx LSB follows FANx MSB */
cmd = fintek_worklist[i].cmd + 1;
if (fintek_read_reg(sc, cmd, &data2, sizeof data2)) {
sc->sc_sensor[i].flags |= SENSOR_FINVALID;
continue;
}
if ((data == 0xff && data2 == 0xff) ||
(data == 0 && data2 == 0))
sc->sc_sensor[i].value = 0;
else
sc->sc_sensor[i].value = 1500000 /
(data << 8 | data2);
break;
default:
sc->sc_sensor[i].flags |= SENSOR_FINVALID;
break;
}
}
iic_release_bus(sc->sc_tag, 0);
}
static int
maxrtc_clock_read(struct maxrtc_softc *sc, struct clock_ymdhms *dt)
{
u_int8_t bcd[MAX6900_BURST_LEN], cmdbuf[1];
int i;
if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
aprint_error_dev(sc->sc_dev,
"maxrtc_clock_read: failed to acquire I2C bus\n");
return (0);
}
/* Read each timekeeping register in order. */
for (i = 0; i < MAX6900_BURST_LEN; i++) {
cmdbuf[0] = max6900_rtc_offset[i] | MAX6900_CMD_READ;
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_address, cmdbuf, 1,
&bcd[i], 1, I2C_F_POLL)) {
iic_release_bus(sc->sc_tag, I2C_F_POLL);
aprint_error_dev(sc->sc_dev,
"maxrtc_clock_read: failed to read rtc "
"at 0x%x\n",
max6900_rtc_offset[i]);
return (0);
}
}
/* Done with I2C */
iic_release_bus(sc->sc_tag, I2C_F_POLL);
/*
* Convert the MAX6900's register values into something useable
*/
dt->dt_sec = FROMBCD(bcd[MAX6900_BURST_SECOND] & MAX6900_SECOND_MASK);
dt->dt_min = FROMBCD(bcd[MAX6900_BURST_MINUTE] & MAX6900_MINUTE_MASK);
if (bcd[MAX6900_BURST_HOUR] & MAX6900_HOUR_12HRS) {
dt->dt_hour = FROMBCD(bcd[MAX6900_BURST_HOUR] &
MAX6900_HOUR_12MASK);
if (bcd[MAX6900_BURST_HOUR] & MAX6900_HOUR_12HRS_PM)
dt->dt_hour += 12;
} else {
dt->dt_hour = FROMBCD(bcd[MAX6900_BURST_HOUR] &
MAX6900_HOUR_24MASK);
}
dt->dt_day = FROMBCD(bcd[MAX6900_BURST_DATE] & MAX6900_DATE_MASK);
dt->dt_mon = FROMBCD(bcd[MAX6900_BURST_MONTH] & MAX6900_MONTH_MASK);
dt->dt_year = FROMBCD(bcd[MAX6900_BURST_YEAR]);
/* century in the burst control slot */
dt->dt_year += (int)FROMBCD(bcd[MAX6900_BURST_CONTROL]) * 100;
return (1);
}
static int
adm1026_write_reg(struct adm1026_softc *sc, uint8_t reg, uint8_t val)
{
int err = 0;
if ((err = iic_acquire_bus(sc->sc_tag, sc->sc_iic_flags)) != 0)
return err;
err = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
®, 1, &val, 1, 0);
iic_release_bus(sc->sc_tag, sc->sc_iic_flags);
return err;
}
