static int __init mx6_usb_h1_init(void)
{
static void __iomem *anatop_base_addr = MX6_IO_ADDRESS(ANATOP_BASE_ADDR);
struct imx_fsl_usb2_wakeup_data imx6q_fsl_hs_wakeup_data[] = {
imx_fsl_usb2_wakeup_data_entry_single(MX6Q, 1, HS1)
};
struct imx_fsl_usb2_wakeup_data imx6sl_fsl_hs_wakeup_data[] = {
imx_fsl_usb2_wakeup_data_entry_single(MX6SL, 1, HS1)
};
struct imx_mxc_ehci_data imx6q_mxc_ehci_hs_data[] = {
imx_mxc_ehci_data_entry_single(MX6Q, 1, HS1)
};
struct imx_mxc_ehci_data imx6sl_mxc_ehci_hs_data[] = {
imx_mxc_ehci_data_entry_single(MX6SL, 1, HS1)
};
mx6_get_host1_vbus_func(&mx6_set_usb_host1_vbus);
if (mx6_set_usb_host1_vbus)
mx6_set_usb_host1_vbus(true);
/* Some phy and power's special controls for host1
* 1. The external charger detector needs to be disabled
* or the signal at DP will be poor
* 2. The PLL's power and output to usb for host 1
* is totally controlled by IC, so the Software only needs
* to enable them at initializtion.
*/
__raw_writel(BM_ANADIG_USB2_CHRG_DETECT_EN_B \
| BM_ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B, \
anatop_base_addr + HW_ANADIG_USB2_CHRG_DETECT);
__raw_writel(BM_ANADIG_USB2_PLL_480_CTRL_BYPASS,
anatop_base_addr + HW_ANADIG_USB2_PLL_480_CTRL_CLR);
__raw_writel(BM_ANADIG_USB2_PLL_480_CTRL_ENABLE \
| BM_ANADIG_USB2_PLL_480_CTRL_POWER \
| BM_ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS, \
anatop_base_addr + HW_ANADIG_USB2_PLL_480_CTRL_SET);
usbh1_config.wakeup_pdata = &usbh1_wakeup_config;
if (usb_icbug_swfix_need()) {
usbh1_config.platform_rh_suspend = usbh1_platform_rh_suspend_swfix;
usbh1_config.platform_rh_resume = usbh1_platform_rh_resume_swfix;
} else {
usbh1_config.platform_rh_suspend = usbh1_platform_rh_suspend;
usbh1_config.platform_rh_resume = usbh1_platform_rh_resume;
}
if (cpu_is_mx6sl())
pdev = imx6sl_add_fsl_ehci_hs(1, &usbh1_config);
else
pdev = imx6q_add_fsl_ehci_hs(1, &usbh1_config);
usbh1_wakeup_config.usb_pdata[0] = pdev->dev.platform_data;
if (cpu_is_mx6sl())
pdev_wakeup = imx6sl_add_fsl_usb2_hs_wakeup(1, &usbh1_wakeup_config);
else
pdev_wakeup = imx6q_add_fsl_usb2_hs_wakeup(1, &usbh1_wakeup_config);
platform_device_add(pdev);
((struct fsl_usb2_platform_data *)(pdev->dev.platform_data))->wakeup_pdata =
(struct fsl_usb2_wakeup_platform_data *)(pdev_wakeup->dev.platform_data);
return 0;
}
static int __init mx6_usb_h1_init(void)
{
static void __iomem *anatop_base_addr = MX6_IO_ADDRESS(ANATOP_BASE_ADDR);
struct imx_fsl_usb2_wakeup_data imx6q_fsl_hs_wakeup_data[] = {
imx_fsl_usb2_wakeup_data_entry_single(MX6Q, 1, HS1)};
struct imx_fsl_usb2_wakeup_data imx6sl_fsl_hs_wakeup_data[] = {
imx_fsl_usb2_wakeup_data_entry_single(MX6SL, 1, HS1)};
struct imx_mxc_ehci_data imx6q_mxc_ehci_hs_data[] = {
imx_mxc_ehci_data_entry_single(MX6Q, 1, HS1)};
struct imx_mxc_ehci_data imx6sl_mxc_ehci_hs_data[] = {
imx_mxc_ehci_data_entry_single(MX6SL, 1, HS1)};
mx6_get_host1_vbus_func(&mx6_set_usb_host1_vbus);
usbh1_config.platform_driver_vbus = mx6_set_usb_host1_vbus;
/* The external charger detector needs to be disabled
* or the signal at DP will be poor
*/
__raw_writel(BM_ANADIG_USB2_CHRG_DETECT_EN_B \
| BM_ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B, \
anatop_base_addr + HW_ANADIG_USB2_CHRG_DETECT);
/* Turn off PHY PLL until USB host driver is loaded */
__raw_writel(BM_ANADIG_USB2_PLL_480_CTRL_BYPASS,
anatop_base_addr + HW_ANADIG_USB2_PLL_480_CTRL_SET);
__raw_writel(BM_ANADIG_USB2_PLL_480_CTRL_ENABLE \
| BM_ANADIG_USB2_PLL_480_CTRL_POWER \
| BM_ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS, \
anatop_base_addr + HW_ANADIG_USB2_PLL_480_CTRL_CLR);
usbh1_config.wakeup_pdata = &usbh1_wakeup_config;
if (usb_icbug_swfix_need()) {
usbh1_config.platform_rh_suspend = usbh1_platform_rh_suspend_swfix;
usbh1_config.platform_rh_resume = usbh1_platform_rh_resume_swfix;
} else {
usbh1_config.platform_rh_suspend = usbh1_platform_rh_suspend;
usbh1_config.platform_rh_resume = usbh1_platform_rh_resume;
}
if (cpu_is_mx6sl())
pdev = imx6sl_add_fsl_ehci_hs(1, &usbh1_config);
else
pdev = imx6q_add_fsl_ehci_hs(1, &usbh1_config);
usbh1_wakeup_config.usb_pdata[0] = pdev->dev.platform_data;
if (cpu_is_mx6sl())
pdev_wakeup = imx6sl_add_fsl_usb2_hs_wakeup(1, &usbh1_wakeup_config);
else
pdev_wakeup = imx6q_add_fsl_usb2_hs_wakeup(1, &usbh1_wakeup_config);
platform_device_add(pdev);
((struct fsl_usb2_platform_data *)(pdev->dev.platform_data))->wakeup_pdata =
(struct fsl_usb2_wakeup_platform_data *)(pdev_wakeup->dev.platform_data);
return 0;
}
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <linux/dma-mapping.h>
#include <mach/hardware.h>
#include <mach/devices-common.h>
#define imx_mxc_ehci_data_entry_single(soc, _id, hs) \
{ \
.id = _id, \
.iobase = soc ## _USB_ ## hs ## _BASE_ADDR, \
.irq = soc ## _INT_USB_ ## hs, \
}
#ifdef CONFIG_SOC_IMX25
const struct imx_mxc_ehci_data imx25_mxc_ehci_otg_data __initconst =
imx_mxc_ehci_data_entry_single(MX25, 0, OTG);
const struct imx_mxc_ehci_data imx25_mxc_ehci_hs_data __initconst =
imx_mxc_ehci_data_entry_single(MX25, 1, HS);
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data __initconst =
imx_mxc_ehci_data_entry_single(MX27, 0, OTG);
const struct imx_mxc_ehci_data imx27_mxc_ehci_hs_data[] __initconst = {
imx_mxc_ehci_data_entry_single(MX27, 1, HS1),
imx_mxc_ehci_data_entry_single(MX27, 2, HS2),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_ehci_data imx31_mxc_ehci_otg_data __initconst =
