static unsigned int
postreload_load (void)
{
basic_block bb;
init_alias_analysis ();
FOR_EACH_BB (bb)
{
rtx insn;
htab_load = htab_create (10, load_htab_hash, load_htab_eq, NULL);
FOR_BB_INSNS (bb, insn)
{
rtx set;
struct load **load;
/* Set reg_kill, invalidate entries if there is an
aliasing store or if the registers making up the address
change. */
htab_traverse_noresize
(htab_load, find_reg_kill_and_mem_invalidate, insn);
set = single_set (insn);
if (interesting_second_load (set, &load, insn))
{
rtx move;
move = gen_move_insn (SET_DEST (set), (*load)->reg);
/* Make sure we can generate a move. */
extract_insn (move);
if (! constrain_operands (1))
continue;
move = emit_insn_before (move, (*load)->reg_kill);
delete_insn (insn);
if (dump_file)
{
fputs ("Replaced this load:\n ", dump_file);
print_inline_rtx (dump_file, insn, 2);
fputs ("\n with this move:\n ", dump_file);
print_inline_rtx (dump_file, move, 2);
fputs ("\n\n", dump_file);
}
}
else if (interesting_load (set))
alloc_load (set);
else if (CALL_P (insn))
htab_empty (htab_load);
}
htab_empty (htab_load);
}
static void
reload_cse_regs_1 (rtx first)
{
rtx insn;
rtx testreg = gen_rtx_REG (VOIDmode, -1);
cselib_init (true);
init_alias_analysis ();
for (insn = first; insn; insn = NEXT_INSN (insn))
{
if (INSN_P (insn))
reload_cse_simplify (insn, testreg);
cselib_process_insn (insn);
}
/* Clean up. */
end_alias_analysis ();
cselib_finish ();
}
