int main()
{
init_platform();
print("Hello World\n\r");
pwm_set(2000000,20,0);
pwm_set(2000000,30,1);
pwm_set(2000000,40,2);
pwm_set(2000000,50,3);
pwm_set(2000000,60,4);
pwm_set(2000000,70,5);
cleanup_platform();
return 0;
}
int interruptManager (unsigned int * framePointer0) {
init_platform();
// Initialize the GPIO peripherals.
int success;
// Used for CPU utilization. Uncomment if desired
// XTmrCtr_Initialize(instPtr, 0);
success = XGpio_Initialize(&gpPB, XPAR_PUSH_BUTTONS_5BITS_DEVICE_ID);
// Set the push button peripheral to be inputs.
XGpio_SetDataDirection(&gpPB, 1, 0x0000001F);
// Enable the global GPIO interrupt for push buttons.
XGpio_InterruptGlobalEnable(&gpPB);
// Enable all interrupts in the push button peripheral.
XGpio_InterruptEnable(&gpPB, 0xFFFFFFFF);
// Reset the XAC97 Chip
XAC97_HardReset(XPAR_AXI_AC97_0_BASEADDR);
XAC97_mSetControl(XPAR_AXI_AC97_0_BASEADDR, AC97_ENABLE_IN_FIFO_INTERRUPT);
XAC97_mSetControl(AC97_ExtendedAudioStat, AC97_EXTENDED_AUDIO_CONTROL_VRA);
setVolLevel(AC97_VOL_MAX);
clearAllSounds();
microblaze_register_handler(interrupt_handler_dispatcher, NULL);
XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
(XPAR_FIT_TIMER_0_INTERRUPT_MASK | XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK | XPAR_AXI_AC97_0_INTERRUPT_MASK));
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
microblaze_enable_interrupts();
// Uncomment for CPU utilization stats
/*XTmrCtr Timer;
XTmrCtr *instPtr = &Timer;
XTmrCtr_Initialize(instPtr, 0);
XTmrCtr_Start(instPtr, 0);*/
while(!isEndOfGame()); // Program never ends.
// Uncomment for CPU utilization stats
/*XTmrCtr_Stop(instPtr, 0);
int val = (int) XTmrCtr_GetValue(instPtr, 0);
xil_printf("%d\n\r", val);*/
clearAllSounds();
XAC97_ClearFifos(XPAR_AXI_AC97_0_BASEADDR);
drawGameOver();
cleanup_platform();
return 0;
}
int testSwitchesAndLEDs()
{
init_platform();
initGPIO();
unsigned int switch_val = XGpio_DiscreteRead(&xgpio_switches, 1);
xil_printf("Switch val: %x \n\r", switch_val);
while(1)
{
switch_val = XGpio_DiscreteRead(&xgpio_switches, 1);
XGpio_DiscreteWrite(&xgpio_LEDs, 1, switch_val);
}
cleanup_platform();
return 0;
}
int main (void) {
init_platform();
unsigned int *reset = RESET_REG;
*reset = 1;
*reset = 0;
unsigned int i = 0;
unsigned int *timer_0 = TIMER_REG_0;
unsigned int *timer_1 = TIMER_REG_1;
unsigned int *count_0 = COUNTER_REG_0;
unsigned int *count_1 = COUNTER_REG_1;
unsigned int *packet_0 = PACKET_REG_0;
unsigned int *packet_1 = PACKET_REG_1;
unsigned int *hash_0 = HASH_REG_0;
unsigned int *hash_1 = HASH_REG_1;
unsigned int *hash_2 = HASH_REG_2;
unsigned int *hash_3 = HASH_REG_3;
while(1){
xil_printf("Press 'g' to read registers, 'r' to reset registers' value");
char t = inbyte();
if (t == 'g') {
xil_printf("\nTimer 0: %d\n", *timer_0);
xil_printf("Timer 1: %d\n", *timer_1);
xil_printf("Counter 0: %d\n", *count_0);
xil_printf("Counter 1: %d\n", *count_1);
xil_printf("Packet 0: %d\n", *packet_0);
xil_printf("Packet 1: %d\n", *packet_1);
xil_printf("Hash: %x %x %x %x\n", *hash_0, *hash_1, *hash_2, *hash_3);
xil_printf("\n\n");
}else if (t == 'r') {
*reset = 1;
*reset = 0;
}
}
cleanup_platform();
return 0;
}
int main()
{
init_platform();
/* Initialize xilkernel */
xilkernel_init();
/* add a thread to be launched once xilkernel starts */
xmk_add_static_thread(sort_main, 0);
/* start xilkernel - does not return control */
xilkernel_start();
/* Never reached */
cleanup_platform();
return 0;
}
int main()
{
u32 votedresult=0x31;
u32 delay;
init_platform();
for(;;){
for(delay=0;delay<10000000;delay++);
AXITMRMVOTER_mWriteReg(0x44A00000, AXITMRMVOTER_S00_AXI_SLV_REG0_OFFSET, votedresult);
votedresult=AXITMRMVOTER_mReadReg(0x44A00000,AXITMRMVOTER_S00_AXI_SLV_REG4_OFFSET);
if(++votedresult>0x39) votedresult=0x30;
char* cpointer=&votedresult;
print((char*) (cpointer+0)); print((char*) (cpointer+1));
print((char*) (cpointer+2)); print((char*) (cpointer+3));
print(" is the voted value and if it is as expected, guess what TMR is working;) \n\r");
}
cleanup_platform();
return 0;
}
int main()
{
if (init_platform() < 0) {
xil_printf("ERROR initializing platform.\r\n");
return -1;
}
#ifndef OS_IS_FREERTOS
/* start the kernel - does not return */
xilkernel_main();
#else
sys_thread_new("main_thrd", (void(*)(void*))main_thread, 0,
THREAD_STACKSIZE,
DEFAULT_THREAD_PRIO);
vTaskStartScheduler();
while(1);
#endif
return 0;
}
int main()
{
int i;
init_platform();
print("--Starting Memory Test Application--\n\r");
print("NOTE: This application runs with D-Cache disabled.");
print("As a result, cacheline requests will not be generated\n\r");
for (i = 0; i < n_memory_ranges; i++) {
test_memory_range(&memory_ranges[i]);
}
print("-- My lab1 plus : 326-LiXiang --\n\r");
return 0;
}
int main()
{
u32 uDevId = XPAR_IOMODULE_0_DEVICE_ID;
XIOModule mcsIOMdule;
u8 read_data_8;
u8 read_data_8_old;
init_platform();
XIOModule_Initialize(&mcsIOMdule, uDevId);
print("Hello World + GPIO \n\r");
while(1){
read_data_8 = XIOModule_DiscreteRead(&mcsIOMdule, 1);
if( read_data_8 != read_data_8_old){
XIOModule_DiscreteWrite(&mcsIOMdule, 1, read_data_8);
xil_printf("sw %02x\n\r",read_data_8);
read_data_8_old = read_data_8;
}
}
return 0;
}
int main()
{
init_platform();
XIOModule_Initialize(&iomodule, XPAR_IOMODULE_0_DEVICE_ID);
XIOModule_Start(&iomodule);
XIOModule_CfgInitialize(&iomodule, NULL, 1);
xil_printf ("\n\r\n\rRobot Console v0.01\n\r\n\r");
Xil_Out32 (MX_LIMIT_LO, -14400); // gripper rotate
Xil_Out32 (MX_LIMIT_HI, 14400);
Xil_Out32 (MX_POSITION, 0);
Xil_Out32 (MY_LIMIT_LO, -2800); // wrist
Xil_Out32 (MY_LIMIT_HI, 3960);
Xil_Out32 (MY_POSITION, 3960);
Xil_Out32 (MZ_LIMIT_LO, -7200); // lower arm rotate
Xil_Out32 (MZ_LIMIT_HI, 7200);
Xil_Out32 (MZ_POSITION, 0);
Xil_Out32 (MA_LIMIT_LO, -9257); // elbow
Xil_Out32 (MA_LIMIT_HI, 12750);
Xil_Out32 (MA_POSITION, 12750);
Xil_Out32 (MB_LIMIT_LO, -5520); // shoulder
Xil_Out32 (MB_LIMIT_HI, 6900);
Xil_Out32 (MB_POSITION, -5520);
Xil_Out32 (MC_LIMIT_LO, -2823); // base
Xil_Out32 (MC_LIMIT_HI, 2823);
Xil_Out32 (MC_POSITION, 0);
Xil_Out32 (MOTION_ALARM, 0x3f);
InitCommandProcessing ();
for (;;) {
if (GetCommand ()) {
ProcessCommand ();
}
}
}
int main()
{
int switch_state;
int led = 0x00;
init_platform();
print("Hello World\n\r");
while(1)
{
if(Xil_In32(XPAR_BTNS_5BITS_BASEADDR)) led |= 1;
Xil_Out32(XPAR_LEDS_8BITS_BASEADDR,led);
if(((led=led<<1)&0x100))led|=0x01;
switch_state = Xil_In32(XPAR_SWS_8BITS_BASEADDR);
printf("0x%X\n",switch_state);
usleep(switch_state*100000);
}
return 0;
}
int main () {
unsigned int DataRead;
unsigned int OldData;
init_platform();
// Clear the screen
xil_printf("%c[2J",27);
OldData = (unsigned int) 0xffffffff;
while(1){
// Read the state of the DIP switches
DataRead = XIo_In32(XPAR_MY_PERIPHERAL_0_BASEADDR);
// Send the data to the UART if the settings change
if(DataRead != OldData){
xil_printf("DIP Switch settings: 0x%2X\r\n", DataRead);
// Set the LED outputs to the DIP switch values
XIo_Out32(XPAR_MY_PERIPHERAL_0_BASEADDR, DataRead);
// Record the DIP switch settings
OldData = DataRead;
}
}
}
int main() {
init_platform();
print("Hello World\n\r");
// apparently we don't need to init it, just HardReset
XAC97_HardReset(XPAR_AXI_AC97_0_BASEADDR);
XAC97_WriteReg(XPAR_AXI_AC97_0_BASEADDR, AC97_ExtendedAudioStat, 1);
XAC97_WriteReg(XPAR_AXI_AC97_0_BASEADDR, AC97_PCM_DAC_Rate, AC97_PCM_RATE_11025_HZ);
while (1) {
XAC97_PlayAudio(XPAR_AXI_AC97_0_BASEADDR, tankFireSound, &tankFireSound[tankFireSoundFrames]);
XAC97_Delay(1000000);
}
cleanup_platform();
return 0;
}
int main()
{
XStatus Status;
init_platform();
xil_printf("running test\r\n");
SF3_begin(&mySF3, &ivt[0], XPAR_PMODSF3_0_AXI_LITE_SPI_BASEADDR);
Status = SF3_QuadSpiTest(&mySF3);
if (Status != XST_SUCCESS) {
xil_printf("\r\nError running Qspi test");
}
else{
xil_printf("\r\nTest successful!");
}
cleanup_platform();
return 0;
}
int main()
{
int my_addr;
init_platform();
print("What's up World!\n");
/* to set up the empty allocation tree */
init_ddr();
init_ddr();
my_addr = hw_malloc(1000); //malloc
print("Allocated memory address is ");
putnum(result);
hw_mfree(my_addr);//mfree
return 0;
}
int main()
{
XGpio gpio0, gpio1, gpio2, gpio3, gpio4;
unsigned int a, b, c, d, e, f, g, h, i, j, k;
init_platform();
while (1) {
XGpio_Initialize(&gpio0, XPAR_AXI_GPIO_0_DEVICE_ID);
XGpio_Initialize(&gpio1, XPAR_AXI_GPIO_1_DEVICE_ID);
XGpio_Initialize(&gpio2, XPAR_AXI_GPIO_2_DEVICE_ID);
XGpio_Initialize(&gpio3, XPAR_AXI_GPIO_3_DEVICE_ID);
XGpio_Initialize(&gpio4, XPAR_AXI_GPIO_4_DEVICE_ID);
a = XGpio_DiscreteRead (&gpio0, 1); // Timer LSB
b = XGpio_DiscreteRead (&gpio0, 2); // Timer MSB
c = XGpio_DiscreteRead (&gpio1, 1); // BRAM Single
d = XGpio_DiscreteRead (&gpio1, 2); // BRAM Double
e = XGpio_DiscreteRead (&gpio2, 1); // DSP Global
f = XGpio_DiscreteRead (&gpio2, 2); // DSP Single
g = XGpio_DiscreteRead (&gpio3, 1); // DSP Double
h = XGpio_DiscreteRead (&gpio3, 2); // DSP Triple
i = XGpio_DiscreteRead (&gpio4, 1); // CLB Level1
j = XGpio_DiscreteRead (&gpio4, 2); // CLB Level2
printf("T\t%d%d\n\r", b, a);
printf("BS\t%d\n\r", c);
printf("BD\t%d\n\r", d);
printf("DG\t%d\n\r", e);
printf("DS\t%d\n\r", f);
printf("DD\t%d\n\r", g);
printf("DT\t%d\n\r", h);
printf("C1\t%d\n\r", i);
printf("C2\t%d\n\r", j);
for (i = 0; i < 1000; ++i);
}
return 0;
}
int main (void) {
init_platform();
// Initialize the GPIO peripherals.
XGpio_Initialize(&gpPB, XPAR_PUSH_BUTTONS_5BITS_DEVICE_ID);
// Set the push button peripheral to be inputs.
XGpio_SetDataDirection(&gpPB, 1, 0x0000001F);
// Enable the global GPIO interrupt for push buttons.
XGpio_InterruptGlobalEnable(&gpPB);
// Enable all interrupts in the push button peripheral.
XGpio_InterruptEnable(&gpPB, 0xFFFFFFFF);
pit_init();
pit_load_value(1000000); // init to 10 ms
pit_enable_load();
pit_enable_interrupts();
pit_enable_count();
microblaze_register_handler(interrupt_handler_dispatcher, NULL);
XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
(XPAR_PIT_0_MYINTERRUPT_MASK | XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK));
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
microblaze_enable_interrupts();
// Tell stdin that it gets zero! none! (as far as buffering goes)
setvbuf(stdin, NULL, _IONBF, 0);
while(1){
// blocking call: wait until a character is present
char input = getchar();
// Handle the UART control of game
uartControl_handle(input);
}
cleanup_platform();
return 0;
}
/**************************************************************************//**
* @brief Main function implementation.
*
* @return None
******************************************************************************/
int main()
{
init_platform();
int i;
xil_printf("\n-------------------------------------\n\r");
xil_printf("Waiting for command from the PC...\n\r");
xil_printf("Starting a new data acquisition...\n\r");
xil_printf("Reading data from the ADC...\n\r");
ReadAdcData( point , (8096) );
for (i = 0 ; i < 8096;i++)
{
xil_printf ("1 = %d\n\r",point[i]);
}
cleanup_platform();
return 0;
}
static void prvSetupHardware( void )
{
BaseType_t xStatus;
XScuGic_Config *pxGICConfig;
/* Ensure no interrupts execute while the scheduler is in an inconsistent
state. Interrupts are automatically enabled when the scheduler is
started. */
portDISABLE_INTERRUPTS();
init_platform();
/* Obtain the configuration of the GIC. */
pxGICConfig = XScuGic_LookupConfig( XPAR_SCUGIC_SINGLE_DEVICE_ID );
/* Sanity check the FreeRTOSConfig.h settings are correct for the
hardware. */
configASSERT( pxGICConfig );
configASSERT( pxGICConfig->CpuBaseAddress == ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET ) );
configASSERT( pxGICConfig->DistBaseAddress == configINTERRUPT_CONTROLLER_BASE_ADDRESS );
/* Install a default handler for each GIC interrupt. */
xStatus = XScuGic_CfgInitialize( &xInterruptController, pxGICConfig, pxGICConfig->CpuBaseAddress );
configASSERT( xStatus == XST_SUCCESS );
( void ) xStatus; /* Remove compiler warning if configASSERT() is not defined. */
/* Ensure the FPU is accessible by enabling access to CP 10 and 11. */
__asm volatile( "MRC p15, 0, r0, c1, c0, 2 \n" \
"ORR r0, r0, #(0xF << 20) \n" \
"MCR p15, 0, r0, c1, c0, 2 \n" \
"ISB " );
/* Ensure the FPU is enabled. */
__asm volatile( "VMRS r0, FPEXC \n" \
"ORR r1, r0, #(1<<30) \n" \
"VMSR FPEXC, r1 \n" \
::: "r0", "r1" );
}
int main()
{
init_platform();
camera_main();
char* inp;
inp = 0x10000000;
int i = 0;
for(;i < 1280*720*3; i++){
*inp = 1;
//xil_printf("%02x", *inp);
inp++;
}
char* outp;
outp = 0x107E9000;
xil_printf("S2MM0 %02x\n\r", *outp);
outp = 0x10A8C000;
xil_printf("S2MM1 %02x\n\r", *outp);
outp = 0x10D2F000;
xil_printf("S2MM2 %02x\n\r", *outp);
outp = 0x102A3000;
xil_printf("MM2S1 %02x\n\r", *outp);
outp = 0x10546000;
xil_printf("MM2S2 %02x\n\r", *outp);
outp = 0x10A8C000;
for(i = 0; i < 1280*720*3 && Xil_In32(0x41240000) == 0; i++){
xil_printf("%02x", *outp);
outp = outp+1;
}
return 0;
}
int main()
{
init_platform();
INT_IER=0x01; //next three lines enable interrupts (I don't think order matters)
INT_MER=0x03;
microblaze_enable_interrupts();
port2_direction = 7;
port2_IPIER = 1;
port2_GIER=0x80000000;
int i;
int ii;
char tail = 0;
//---------------------------------------------------------- Event Que
while(1){
if(tail!= head){
xil_printf("%d\r\n", que[tail]);
tail++;
port2_IPIER = 0;
for (i=0;i<50;i++){
for (ii=0;ii<65000;ii++){
}
}
port2_IPIER=0x1;
} #comment added Dr. Hummel
}
//this is what I am adding here
cleanup_platform();
return 0;
}
int main()
{
init_platform();
char fibby;
uint32_t n = 12, first = 0, second = 1, next, c;
for ( c = 0 ; c < n ; c++ )
{
if ( c <= 1 )
next = c;
else
{
next = first + second;
first = second;
second = next;
}
xil_printf("%d\n\r", next, fibby);
}
cleanup_platform();
return 0;
}
int main(void) {
init_platform();
xil_printf("\n\n\n");
xil_printf("-- Starting AES software test based on FIPS-197 (Appendix B) \r\n\n");
//----------------------------------------------
//-------Encrypt Function-----------------------
//----------------------------------------------
encrypt();
//----------------------------------------------
//-------Decrypt Function-----------------------
//----------------------------------------------
/*XTmrCtr_Reset (&XPS_Timer, 0);
XTmrCtr_Start (&XPS_Timer, 0);
cycles3 = XTmrCtr_GetValue(&XPS_Timer, 0);
decrypt();
cycles4 = XTmrCtr_GetValue(&XPS_Timer, 0);
*/
//----------------------------------------------
//-------Display Results------------------------
//----------------------------------------------
xil_printf("*************************************\r\n");
xil_printf("-- Exiting main() --\r\n");
cleanup_platform();
return 0;
}
int main()
{
//Inititialize the base platform
init_platform();
//Initialize the hardware devices
init_devices();
//The address of the DDR where the partial bitstream is located
ParAddrMod1 = COUNTUP_BITADDR;
ParAddrMod2 = COUNTDOWN_BITADDR;
while(1){
btnData = XGpio_DiscreteRead(&xBtn,CHANNEL1); //Reads the button input data
OutPut = Xil_In32(IPTOUSER); //Reads the output data from the IP
ledOut(OutPut); //sends the output data to the led
Xil_Out32(USERTOIP,OutPut);//send the output back into the IP
delay(DELAY); //delay the system for visibility to the user
//Whenever a button is pushed the FPGA will switch between the Partial Bits
if(btnData != ZERO_HEX && btnData != btnOld){
if(firstMod){
firstMod = 0;
status = XDcfg_TransferBitfile(XDcfg_0, ParAddrMod1, (BITFILE_LEN >> 2));
if (status != XST_SUCCESS) {return XST_FAILURE;}
}else{
firstMod = 1;
status = XDcfg_TransferBitfile(XDcfg_0, ParAddrMod2, (BITFILE_LEN >> 2));
if (status != XST_SUCCESS) {return XST_FAILURE;}
}
btnOld = btnData;
}
}
int main()
{
int status;
int temp,i,j;
//static int Result1[SIZE];
init_platform();
// Initialize DMA
init_dma();
//get data from the PL block to DDR RAM
status = XAxiDma_SimpleTransfer(&AxiDma, 0xa000000, 1023,XAXIDMA_DEVICE_TO_DMA);
/* Wait for transfer to be done */
while(XAxiDma_Busy(&AxiDma, XAXIDMA_DEVICE_TO_DMA));
j=0;
// read data from DDR ram to UART
for(i=0;i<=1023;i+=1)
{
temp = Xil_In32(0xa000000+j);
xil_printf("DDR address 0x%x",0xa0000000+i);
xil_printf(" contains %d\n\r",temp);
j+=4;
}
return 0;
}
int main (void) {
init_platform();
// Initialize the GPIO peripherals.
int success = XGpio_Initialize(&gpPB, XPAR_PUSH_BUTTONS_5BITS_DEVICE_ID);
// Set the push button peripheral to be inputs.
XGpio_SetDataDirection(&gpPB, 1, 0x0000001F);
// Enable the global GPIO interrupt for push buttons.
XGpio_InterruptGlobalEnable(&gpPB);
// Enable all interrupts in the push button peripheral.
XGpio_InterruptEnable(&gpPB, 0xFFFFFFFF);
microblaze_register_handler(interrupt_handler_dispatcher, NULL);
custom_XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
(XPAR_FIT_TIMER_0_INTERRUPT_MASK | XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK));
custom_XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
microblaze_enable_interrupts();
while(1); // Program never ends.
cleanup_platform();
return 0;
}
/*---------------------------------------------------------------------------*/
int
main(int argc, char **argv)
{
/*
* Initalize hardware.
*/
msp430_cpu_init();
clock_init();
leds_init();
leds_on(LEDS_RED);
clock_wait(2);
uart1_init(115200); /* Must come before first printf */
#if WITH_UIP
slip_arch_init(115200);
#endif /* WITH_UIP */
clock_wait(1);
leds_on(LEDS_GREEN);
//ds2411_init();
/* XXX hack: Fix it so that the 802.15.4 MAC address is compatible
with an Ethernet MAC address - byte 0 (byte 2 in the DS ID)
cannot be odd. */
//ds2411_id[2] &= 0xfe;
leds_on(LEDS_BLUE);
//xmem_init();
leds_off(LEDS_RED);
rtimer_init();
/*
* Hardware initialization done!
*/
node_id = NODE_ID;
/* Restore node id if such has been stored in external mem */
//node_id_restore();
/* for setting "hardcoded" IEEE 802.15.4 MAC addresses */
#ifdef IEEE_802154_MAC_ADDRESS
{
uint8_t ieee[] = IEEE_802154_MAC_ADDRESS;
//memcpy(ds2411_id, ieee, sizeof(uip_lladdr.addr));
//ds2411_id[7] = node_id & 0xff;
}
#endif
//random_init(ds2411_id[0] + node_id);
leds_off(LEDS_BLUE);
/*
* Initialize Contiki and our processes.
*/
process_init();
process_start(&etimer_process, NULL);
ctimer_init();
init_platform();
set_rime_addr();
cc2520_init();
{
uint8_t longaddr[8];
uint16_t shortaddr;
shortaddr = (rimeaddr_node_addr.u8[0] << 8) +
rimeaddr_node_addr.u8[1];
memset(longaddr, 0, sizeof(longaddr));
rimeaddr_copy((rimeaddr_t *)&longaddr, &rimeaddr_node_addr);
printf("MAC %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x ",
longaddr[0], longaddr[1], longaddr[2], longaddr[3],
longaddr[4], longaddr[5], longaddr[6], longaddr[7]);
cc2520_set_pan_addr(IEEE802154_PANID, shortaddr, longaddr);
}
cc2520_set_channel(RF_CHANNEL);
printf(CONTIKI_VERSION_STRING " started. ");
if(node_id > 0) {
printf("Node id is set to %u.\n", node_id);
} else {
printf("Node id is not set.\n");
}
#if WITH_UIP6
/* memcpy(&uip_lladdr.addr, ds2411_id, sizeof(uip_lladdr.addr)); */
memcpy(&uip_lladdr.addr, rimeaddr_node_addr.u8,
UIP_LLADDR_LEN > RIMEADDR_SIZE ? RIMEADDR_SIZE : UIP_LLADDR_LEN);
/* Setup nullmac-like MAC for 802.15.4 */
/* sicslowpan_init(sicslowmac_init(&cc2520_driver)); */
/* printf(" %s channel %u\n", sicslowmac_driver.name, RF_CHANNEL); */
/* Setup X-MAC for 802.15.4 */
queuebuf_init();
NETSTACK_RDC.init();
NETSTACK_MAC.init();
NETSTACK_NETWORK.init();
printf("%s %s, channel check rate %lu Hz, radio channel %u\n",
NETSTACK_MAC.name, NETSTACK_RDC.name,
CLOCK_SECOND / (NETSTACK_RDC.channel_check_interval() == 0 ? 1:
NETSTACK_RDC.channel_check_interval()),
RF_CHANNEL);
process_start(&tcpip_process, NULL);
printf("Tentative link-local IPv6 address ");
{
uip_ds6_addr_t *lladdr;
int i;
lladdr = uip_ds6_get_link_local(-1);
for(i = 0; i < 7; ++i) {
printf("%02x%02x:", lladdr->ipaddr.u8[i * 2],
lladdr->ipaddr.u8[i * 2 + 1]);
}
printf("%02x%02x\n", lladdr->ipaddr.u8[14], lladdr->ipaddr.u8[15]);
}
if(!UIP_CONF_IPV6_RPL) {
uip_ipaddr_t ipaddr;
int i;
uip_ip6addr(&ipaddr, 0xaaaa, 0, 0, 0, 0, 0, 0, 0);
uip_ds6_set_addr_iid(&ipaddr, &uip_lladdr);
uip_ds6_addr_add(&ipaddr, 0, ADDR_TENTATIVE);
printf("Tentative global IPv6 address ");
for(i = 0; i < 7; ++i) {
printf("%02x%02x:",
ipaddr.u8[i * 2], ipaddr.u8[i * 2 + 1]);
}
printf("%02x%02x\n",
ipaddr.u8[7 * 2], ipaddr.u8[7 * 2 + 1]);
}
#else /* WITH_UIP6 */
NETSTACK_RDC.init();
NETSTACK_MAC.init();
NETSTACK_NETWORK.init();
printf("%s %s, channel check rate %lu Hz, radio channel %u\n",
NETSTACK_MAC.name, NETSTACK_RDC.name,
CLOCK_SECOND / (NETSTACK_RDC.channel_check_interval() == 0? 1:
NETSTACK_RDC.channel_check_interval()),
RF_CHANNEL);
#endif /* WITH_UIP6 */
#if !WITH_UIP && !WITH_UIP6
uart1_set_input(serial_line_input_byte);
serial_line_init();
#endif
leds_off(LEDS_GREEN);
#if TIMESYNCH_CONF_ENABLED
timesynch_init();
timesynch_set_authority_level((rimeaddr_node_addr.u8[0] << 4) + 16);
#endif /* TIMESYNCH_CONF_ENABLED */
#if WITH_UIP
process_start(&tcpip_process, NULL);
process_start(&uip_fw_process, NULL); /* Start IP output */
process_start(&slip_process, NULL);
slip_set_input_callback(set_gateway);
{
uip_ipaddr_t hostaddr, netmask;
uip_init();
uip_ipaddr(&hostaddr, 172,16,
rimeaddr_node_addr.u8[0],rimeaddr_node_addr.u8[1]);
uip_ipaddr(&netmask, 255,255,0,0);
uip_ipaddr_copy(&meshif.ipaddr, &hostaddr);
uip_sethostaddr(&hostaddr);
uip_setnetmask(&netmask);
uip_over_mesh_set_net(&hostaddr, &netmask);
/* uip_fw_register(&slipif);*/
uip_over_mesh_set_gateway_netif(&slipif);
uip_fw_default(&meshif);
uip_over_mesh_init(UIP_OVER_MESH_CHANNEL);
printf("uIP started with IP address %d.%d.%d.%d\n",
uip_ipaddr_to_quad(&hostaddr));
}
#endif /* WITH_UIP */
energest_init();
ENERGEST_ON(ENERGEST_TYPE_CPU);
watchdog_start();
/* Stop the watchdog */
watchdog_stop();
#if !PROCESS_CONF_NO_PROCESS_NAMES
print_processes(autostart_processes);
#else /* !PROCESS_CONF_NO_PROCESS_NAMES */
putchar('\n'); /* include putchar() */
#endif /* !PROCESS_CONF_NO_PROCESS_NAMES */
autostart_start(autostart_processes);
/*
* This is the scheduler loop.
*/
while(1) {
int r;
do {
/* Reset watchdog. */
watchdog_periodic();
r = process_run();
} while(r > 0);
/*
* Idle processing.
*/
int s = splhigh(); /* Disable interrupts. */
/* uart1_active is for avoiding LPM3 when still sending or receiving */
if(process_nevents() != 0 || uart1_active()) {
splx(s); /* Re-enable interrupts. */
} else {
static unsigned long irq_energest = 0;
/* Re-enable interrupts and go to sleep atomically. */
ENERGEST_OFF(ENERGEST_TYPE_CPU);
ENERGEST_ON(ENERGEST_TYPE_LPM);
/* We only want to measure the processing done in IRQs when we
are asleep, so we discard the processing time done when we
were awake. */
energest_type_set(ENERGEST_TYPE_IRQ, irq_energest);
watchdog_stop();
_BIS_SR(GIE | SCG0 | SCG1 | CPUOFF); /* LPM3 sleep. This
statement will block
until the CPU is
woken up by an
interrupt that sets
the wake up flag. */
/* We get the current processing time for interrupts that was
done during the LPM and store it for next time around. */
dint();
irq_energest = energest_type_time(ENERGEST_TYPE_IRQ);
eint();
watchdog_start();
ENERGEST_OFF(ENERGEST_TYPE_LPM);
ENERGEST_ON(ENERGEST_TYPE_CPU);
}
}
}
int main()
{
init_platform();
init_ddr();
print("Hello World\n\r");
/*
int l;
int addr;
print("mallocs\n");
for(l = 0; l < 1000000; l ++){
addr = hw_malloc(8);
Xil_Out32(DEBUG_BASE + 4 * l, addr);
}
putnum(addr);
print("frees\n");
for(l = 0; l < 1000000; l ++){
addr = Xil_In32(DEBUG_BASE + 4 * l);
hw_mfree(addr);
}
putnum(addr);
print("done!\n");
putnum(hw_malloc(8));
*/
XClist myIP;
int list_set_up;
list_set_up = XClist_Initialize(&myIP, XPAR_CLIST_0_DEVICE_ID);
list_set_up = XClist_IsReady(&myIP);
Xil_Out32(LIST_BASE + 0x20, 10);
// start list IP
XClist_Start(&myIP);
// check if list IP is done
int flag_done = 0;
flag_done = XClist_IsDone(&myIP);
while(flag_done != 1) {
flag_done = XClist_IsDone(&myIP);
}
// read counter result back
print("Overall ");
putnum(Xil_In32(COUNTER_BASE + 4 * 0));
print("\n");
print("Creating ");
putnum(Xil_In32(COUNTER_BASE + 4 * 1));
print("\n");
print("Reversing ");
putnum(Xil_In32(COUNTER_BASE + 4 * 2));
print("\n");
print("Destroying ");
putnum(Xil_In32(COUNTER_BASE + 4 * 3));
print("\n");
int myPtr;
myPtr = Xil_In32(LIST_BASE + 0x10);
putnum(myPtr);
// putnum(hw_malloc(8));
/*
int hdPtr;
hdPtr = Xil_In32(LIST_BASE + 0x10);
print("hdPtr = ");
putnum(hdPtr);
print("\n");
signed offset;
offset = Xil_In32(hdPtr);
print("offset = ");
putnum(offset);
print("\n");
int data;
data = Xil_In32(hdPtr + 4);
print("data = ");
putnum(data);
print("\n");
*/
//-----------
/*
hdPtr = hdPtr + offset;
print("hdPtr = ");
putnum(hdPtr);
print("\n");
offset = Xil_In32(hdPtr);
print("offset = ");
putnum(offset);
print("\n");
data = Xil_In32(hdPtr + 4);
print("data = ");
putnum(data);
print("\n");
*/
//-----------
/*
int l;
int nowPtr;
l = 0;
int i;
// while(hdPtr != 0){
for(i = 0; i <10; i++){
nowPtr = hdPtr;
offset = Xil_In32(hdPtr);
hdPtr = hdPtr + offset;
hw_mfree(nowPtr);
putnum(hdPtr);
print("\n");
}
print("finished processing\n");
putnum(hw_malloc(8));
*/
cleanup_platform();
return 0;
}
int main()
{
init_platform();
print("Hello World\n\r");
uint x = 0xFFFFFFFF;
INTPTR Addr = 0x88000000;
x = (uint) Xil_In32(Addr);
printf("Value at 0x%08x is 0x%08x:\n", (uint) Addr, x);
Addr = Addr + 4;
x = (uint) Xil_In32(Addr);
printf("Value at 0x%08x is 0x%08x:\n", (uint) Addr, x);
Addr = Addr + 4;
x = (uint) Xil_In32(Addr);
printf("Value at 0x%08x is 0x%08x:\n", (uint) Addr, x);
Addr = Addr + 4;
x = (uint) Xil_In32(Addr);
printf("Value at 0x%08x is 0x%08x:\n", (uint) Addr, x);
Addr = Addr + 4;
x = (uint) Xil_In32(Addr);
printf("Value at 0x%08x is 0x%08x:\n", (uint) Addr, x);
Addr = Addr + 4;
x = (uint) Xil_In32(Addr);
printf("Value at 0x%08x is 0x%08x:\n", (uint) Addr, x);
Addr = Addr + 4;
x = (uint) Xil_In32(Addr);
printf("Value at 0x%08x is 0x%08x:\n", (uint) Addr, x);
Addr = Addr + 4;
x = (uint) Xil_In32(Addr);
printf("Value at 0x%08x is 0x%08x:\n", (uint) Addr, x);
Addr = 0x88000010;
x = 0xFF;
Xil_Out32(Addr, (u32) x);
Addr = 0x88000018;
x = 0xFF;
Xil_Out32(Addr, (u32) x);
Addr = 0x8800001C;
x = 0x0;
Xil_Out32(Addr, (u32) x);
Addr = 0x88000010;
x = (uint) Xil_In32(Addr);
printf("Value at 0x%08x is 0x%08x:\n", (uint) Addr, x);
Addr = 0x88000018;
x = (uint) Xil_In32(Addr);
printf("Value at 0x%08x is 0x%08x:\n", (uint) Addr, x);
Addr = 0x8800001C;
x = (uint) Xil_In32(Addr);
printf("Value at 0x%08x is 0x%08x:\n", (uint) Addr, x);
Addr = 0x88000018;
x = 0x0;
INTPTR Addr_z = 0x88000034;
uint z = 1;
uint y;
uint i, j, k;
uint b = 0;
i = 0;
j = 0;
k = 0;
while (1) {
i++;
k++;
if (i == 1000) {
i = 0;
j++;
if (j > 100) {
y = 0xFF;
j = 0;
Xil_Out32(Addr, (u32) (x & y));
}
if (j > (b/100)) {
y = 0x00;
Xil_Out32(Addr, (u32) (x & y));
}
}
if (k == 3000000) {
k = 0;
z = (uint) Xil_In32(Addr_z);
b = b + z;
if (b > 3000) {
b = 1;
}
if (x == 0) {
x = 0x22222200;
x = 0xFF;
} else {
x = x >> 1;
}
}
}
int main (){
//s32 i, j;
//s32 len, status;
FATTIE * fp;
u8 * str = (u8 *)"Test string to demonstrate that\nsdcard filesystem works properly\n";
init_platform();
while(*cd_ptr != 0);
sd_trivial_delay(1000000);
spi_dev_status |= SD_FS_CARD_DETECT;
switch(init_fat_filesystem()) {
case 0:
xil_printf("microSD initialized successfully\n\r");
break;
default:
xil_printf("Exiting\n\r");
return -1;
}
fp = fat_open((u8 *)"TESTERIN.SGF");
if(fp == NULL) {
xil_printf("Couldn't open file\n\r");
goto end;
}
// Pass in the sgf config structure into init_sgf_file() for writing the header of SGF
init_sgf_file(fp);
/* Read from memory */
// Just for testing the function out
Move one, two, three, four;
one.stoneColor = BLACK_STONE;
one.stoneX = 3;
one.stoneY = 3;
two.stoneColor = WHITE_STONE;
two.stoneX = 15;
two.stoneY = 15;
three.stoneColor = BLACK_STONE;
three.stoneX = 15;
three.stoneY = 3;
four.stoneColor = WHITE_STONE;
four.stoneX = 3;
four.stoneY = 15;
// This is where you append the newly placed stone in the SGF file (filename)
// Obviously, you can just declare one Move struct and reuse it using a while loop until stoneColor == 0 like below
write_sgf_move(fp, one.stoneX, one.stoneY, one.stoneColor);
write_sgf_move(fp, two.stoneX, two.stoneY, two.stoneColor);
write_sgf_move(fp, three.stoneX, three.stoneY, three.stoneColor);
write_sgf_move(fp, four.stoneX, four.stoneY, four.stoneColor);
/*
Move tmp;
unsigned int offset = 0;
tmp = *(some_memory_address + offset);
while(tmp.stoneColor != NO_STONE) {
write_sgf_move(filename, tmp.stoneX, tmp.stoneY, tmp.stoneColor);
offset += 3; // The structs are stacked perfectly into the memory, so add 3 bytes.
tmp = *(some_memory_address + offset);
}
*/
/* Write a simple ")" to close off the main branch in SGF */
// You may want to read extra Move from the memory and check if the stoneColor == 0;
end_sgf_file(fp);
fat_close(fp);
fp = fat_open((u8 *)"ABCDEFGH.TXT");
fat_write(fp, str, strlen(str));
fat_close(fp);
end: sd_eject_card();
return 0;
}
