void intc_cpu_int_group_4(void)
{
/* Determine interrupt number. */
int intc_group_4 = intc_get_ec_int();
switch (intc_group_4) {
#ifdef CONFIG_LPC
case IT83XX_IRQ_PMC_IN:
pm1_ibf_interrupt();
break;
case IT83XX_IRQ_PMC2_IN:
pm2_ibf_interrupt();
break;
case IT83XX_IRQ_PMC3_IN:
pm3_ibf_interrupt();
break;
case IT83XX_IRQ_PMC4_IN:
pm4_ibf_interrupt();
break;
case IT83XX_IRQ_PMC5_IN:
pm5_ibf_interrupt();
break;
#endif
default:
break;
}
}
void intc_cpu_int_group_6(void)
{
/* Determine interrupt number. */
int intc_group_6 = intc_get_ec_int();
switch (intc_group_6) {
#ifdef CONFIG_I2C
case IT83XX_IRQ_SMB_A:
i2c_interrupt(IT83XX_I2C_CH_A);
break;
case IT83XX_IRQ_SMB_B:
i2c_interrupt(IT83XX_I2C_CH_B);
break;
case IT83XX_IRQ_SMB_C:
i2c_interrupt(IT83XX_I2C_CH_C);
break;
case IT83XX_IRQ_SMB_D:
i2c_interrupt(IT83XX_I2C_CH_D);
break;
case IT83XX_IRQ_SMB_E:
i2c_interrupt(IT83XX_I2C_CH_E);
break;
case IT83XX_IRQ_SMB_F:
i2c_interrupt(IT83XX_I2C_CH_F);
break;
#endif
default:
break;
}
}
/**
* Define one IRQ function to handle all GPIO interrupts. The IRQ determines
* the interrupt number which was triggered, calls the master handler above,
* and clears status registers.
*/
static void __gpio_irq(void)
{
/* Determine interrupt number. */
int irq = intc_get_ec_int();
#ifdef HAS_TASK_KEYSCAN
if (irq == IT83XX_IRQ_WKINTC) {
keyboard_raw_interrupt();
return;
}
#endif
if (irq == IT83XX_IRQ_WKINTAD) {
IT83XX_WUC_WUESR4 = 0xff;
task_clear_pending_irq(IT83XX_IRQ_WKINTAD);
return;
}
/*
* Clear the WUC status register. Note the external pin first goes
* to the WUC module and is always edge triggered.
*/
*(wuesr(gpio_irqs[irq].wuc_group)) = gpio_irqs[irq].wuc_mask;
/*
* Clear the interrupt controller status register. Note the interrupt
* controller is level triggered from the WUC status.
*/
task_clear_pending_irq(irq);
/* Run the GPIO master handler above with corresponding port/mask. */
gpio_interrupt(gpio_irqs[irq].gpio_port, gpio_irqs[irq].gpio_mask);
}
void intc_cpu_int_group_12(void)
{
/* Determine interrupt number. */
int intc_group_12 = intc_get_ec_int();
switch (intc_group_12) {
#ifdef CONFIG_PECI
case IT83XX_IRQ_PECI:
peci_interrupt();
break;
#endif
default:
break;
}
}
void intc_cpu_int_group_5(void)
{
/* Determine interrupt number. */
int intc_group_5 = intc_get_ec_int();
switch (intc_group_5) {
#ifdef CONFIG_LPC
case IT83XX_IRQ_KBC_OUT:
lpc_kbc_obe_interrupt();
break;
case IT83XX_IRQ_KBC_IN:
lpc_kbc_ibf_interrupt();
break;
#endif
default:
break;
}
}
void intc_cpu_int_group_6(void)
{
/* Determine interrupt number. */
int intc_group_6 = intc_get_ec_int();
switch (intc_group_6) {
case IT83XX_IRQ_SMB_A:
i2c_interrupt(0);
break;
case IT83XX_IRQ_SMB_B:
i2c_interrupt(1);
break;
case IT83XX_IRQ_SMB_C:
i2c_interrupt(2);
break;
default:
break;
}
}
void intc_cpu_int_group_12(void)
{
/* Determine interrupt number. */
int intc_group_12 = intc_get_ec_int();
switch (intc_group_12) {
#ifdef CONFIG_PECI
case IT83XX_IRQ_PECI:
peci_interrupt();
break;
#endif
#ifdef CONFIG_USB_PD_TCPM_ITE83XX
case IT83XX_IRQ_USBPD0:
chip_pd_irq(USBPD_PORT_A);
break;
case IT83XX_IRQ_USBPD1:
chip_pd_irq(USBPD_PORT_B);
break;
#endif /* CONFIG_USB_PD_TCPM_ITE83XX */
default:
break;
}
}
