static void intel_dsi_post_disable(struct intel_encoder *encoder) { struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); DRM_DEBUG_KMS("\n"); intel_dsi_clear_device_ready(encoder); if (intel_dsi->dev.dev_ops->disable_panel_power) intel_dsi->dev.dev_ops->disable_panel_power(&intel_dsi->dev); }
static void intel_dsi_post_disable(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); int pipe = intel_crtc->pipe; u32 tmp; int count = 1; wait_for_dsi_fifo_empty(intel_dsi); intel_dsi_port_disable(encoder); /* Panel commands can be sent when clock is in LP11 */ if (intel_dsi->dual_link) count = 2; do { tmp = I915_READ(MIPI_DEVICE_READY(pipe)); tmp &= ~DEVICE_READY; I915_WRITE(MIPI_DEVICE_READY(pipe), tmp); tmp = I915_READ(MIPI_CTRL(pipe)); tmp &= ~ESCAPE_CLOCK_DIVIDER_MASK; I915_WRITE(MIPI_CTRL(pipe), tmp | intel_dsi->escape_clk_div << ESCAPE_CLOCK_DIVIDER_SHIFT); tmp = I915_READ(MIPI_DSI_FUNC_PRG(pipe)); tmp &= ~VID_MODE_FORMAT_MASK; I915_WRITE(MIPI_DSI_FUNC_PRG(pipe), tmp); I915_WRITE(MIPI_EOT_DISABLE(pipe), CLOCKSTOP); tmp = I915_READ(MIPI_DSI_FUNC_PRG(pipe)); tmp &= ~VID_MODE_FORMAT_MASK; I915_WRITE(MIPI_DSI_FUNC_PRG(pipe), tmp); tmp = I915_READ(MIPI_DEVICE_READY(pipe)); tmp &= DEVICE_READY; I915_WRITE(MIPI_DEVICE_READY(pipe), tmp); pipe = PIPE_B; } while (--count > 0); /* if disable packets are sent before sending shutdown packet then in * some next enable sequence send turn on packet error is observed */ if (intel_dsi->dev.dev_ops->disable) intel_dsi->dev.dev_ops->disable(&intel_dsi->dev); wait_for_dsi_fifo_empty(intel_dsi); intel_dsi_clear_device_ready(encoder); }
static void intel_dsi_post_disable(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); u32 val; DRM_DEBUG_KMS("\n"); intel_dsi_disable(encoder); intel_dsi_clear_device_ready(encoder); val = I915_READ(DSPCLK_GATE_D); val &= ~DPOUNIT_CLOCK_GATE_DISABLE; I915_WRITE(DSPCLK_GATE_D, val); if (intel_dsi->dev.dev_ops->disable_panel_power) intel_dsi->dev.dev_ops->disable_panel_power(&intel_dsi->dev); msleep(intel_dsi->panel_off_delay); msleep(intel_dsi->panel_pwr_cycle_delay); }