int dma_setup() {
clock_gate_switch(DMAC0_CLOCKGATE, ON);
clock_gate_switch(DMAC1_CLOCKGATE, ON);
interrupt_install(DMAC0_INTERRUPT, dmaIRQHandler, 1);
interrupt_install(DMAC1_INTERRUPT, dmaIRQHandler, 2);
interrupt_enable(DMAC0_INTERRUPT);
interrupt_enable(DMAC1_INTERRUPT);
return 0;
}
int event_setup() {
#if !defined(CONFIG_IPHONE_4) && !defined(CONFIG_IPAD)
// In our implementation, we set TicksPerSec when we setup the clock
// so we don't have to do it here
init_event_list();
Timers[EventTimer].handler2 = eventTimerHandler;
// Initialize the timer hardware for something that goes off once every 100 Hz.
// The handler for the timer will reset it so it's periodic
timer_init(EventTimer, TicksPerSec/100, 0, 0, 0, FALSE, FALSE, FALSE, FALSE, TRUE);
// Turn the timer on
timer_on_off(EventTimer, ON);
#else
RTCHasInit = TRUE;
init_event_list();
// SET_REG(TIMER_REGISTER_TICK, TIMER_STATE_MANUALUPDATE);
interrupt_install(TIMER_IRQ, eventTimerHandler, 0);
interrupt_enable(TIMER_IRQ);
#endif
return 0;
}
int spi_setup()
{
int i;
for(i = 0; i < SPICount; i++)
{
// Only enable SPIs 1-3.
if(((0x7 >> i) & 1) == 0)
continue;
SPIRegisters *regs = &SPIRegs[i];
SPIStruct *data = &SPIData[i];
memset(data, 0, sizeof(*data));
data->registers = regs;
data->clockSource = NCLK;
clock_gate_switch(regs->gate, ON);
SET_REG(data->registers->control, 0);
interrupt_install(regs->irq, spi_irq_handler, i);
interrupt_enable(regs->irq);
}
return 0;
}
int gpio_setup() {
int i;
GPIORegs = (GPIORegisters*) GPIO;
for(i = 0; i < GPIO_NUMINTGROUPS; i++) {
// writes to all the interrupt status register to acknowledge and discard any pending
SET_REG(GPIOIC + GPIO_INTSTAT + (i * 0x4), GPIO_INTSTAT_RESET);
// disable all interrupts
SET_REG(GPIOIC + GPIO_INTEN + (i * 0x4), GPIO_INTEN_RESET);
}
memset(InterruptGroups, 0, sizeof(InterruptGroups));
interrupt_install(0x21, gpio_handle_interrupt, 0);
interrupt_install(0x20, gpio_handle_interrupt, 1);
interrupt_install(0x1f, gpio_handle_interrupt, 2);
interrupt_install(0x03, gpio_handle_interrupt, 3);
interrupt_install(0x02, gpio_handle_interrupt, 4);
interrupt_install(0x01, gpio_handle_interrupt, 5);
interrupt_install(0x00, gpio_handle_interrupt, 6);
interrupt_enable(0x21);
interrupt_enable(0x20);
interrupt_enable(0x1f);
interrupt_enable(0x03);
interrupt_enable(0x02);
interrupt_enable(0x01);
interrupt_enable(0x00);
clock_gate_switch(GPIO_CLOCKGATE, ON);
return 0;
}
int spi_setup() {
clock_gate_switch(SPI0_CLOCKGATE, ON);
clock_gate_switch(SPI1_CLOCKGATE, ON);
clock_gate_switch(SPI2_CLOCKGATE, ON);
memset(spi_info, 0, sizeof(SPIInfo) * NUM_SPIPORTS);
int i;
for(i = 0; i < NUM_SPIPORTS; i++) {
spi_info[i].clockSource = NCLK;
SET_REG(SPIRegs[i].control, 0);
}
interrupt_install(SPI0_IRQ, spiIRQHandler, 0);
interrupt_install(SPI1_IRQ, spiIRQHandler, 1);
interrupt_install(SPI2_IRQ, spiIRQHandler, 2);
interrupt_enable(SPI0_IRQ);
interrupt_enable(SPI1_IRQ);
interrupt_enable(SPI2_IRQ);
return 0;
}
int gpio_setup() {
// Initialise it
uint8_t v[8];
if (!(GET_REG(POWER + POWER_ID) & 1)) {
gpio_custom_io(0x502, 0);
gpio_custom_io(0x503, 0);
gpio_custom_io(0x504, 0);
gpio_pulldown_configure(0x502, GPIOPDDown);
gpio_pulldown_configure(0x503, GPIOPDDown);
gpio_pulldown_configure(0x504, GPIOPDDown);
gpio_custom_io(0x202, 0);
gpio_custom_io(0x301, 0);
gpio_custom_io(0x304, 0);
gpio_custom_io(0x305, 0);
gpio_pulldown_configure(0x202, GPIOPDDown);
gpio_pulldown_configure(0x301, GPIOPDDown);
gpio_pulldown_configure(0x304, GPIOPDDown);
gpio_pulldown_configure(0x305, GPIOPDDown);
udelay(100);
v[0] = chipid_get_gpio_epoch();
v[1] = gpio_pin_state(0x504);
v[2] = gpio_pin_state(0x503);
v[3] = gpio_pin_state(0x502);
v[4] = gpio_pin_state(0x305);
v[5] = gpio_pin_state(0x304);
v[6] = gpio_pin_state(0x301);
v[7] = gpio_pin_state(0x202);
gpio_custom_io(0x502, 4);
gpio_custom_io(0x503, 4);
gpio_custom_io(0x504, 4);
gpio_custom_io(0x202, 4);
gpio_custom_io(0x301, 4);
gpio_custom_io(0x304, 4);
gpio_custom_io(0x305, 4);
uint32_t new_status = ((v[0] << 3 | v[1] << 2 | v[2] << 1 | v[3]) << 16) | ((v[4] << 3 | v[5] << 2 | v[6] << 1 | v[7]) << 8) | 1;
SET_REG(POWER + POWER_ID, (GET_REG(POWER + POWER_ID) & 0xFF000000) | (new_status & 0xFFFFFF));
}
interrupt_install(GPIO_INTERRUPT, gpio_handle_interrupt, 0);
interrupt_enable(GPIO_INTERRUPT);
return 0;
}
static void init_i2c(I2CInfo* i2c) {
clock_gate_switch(i2c->clockgate, ON);
gpio_custom_io(i2c->iic_sda_gpio, 2); // pull sda low?
int i;
for (i = 0; i < 19; i++) {
gpio_custom_io(i2c->iic_scl_gpio, (i % 2) ? 2 : 0);
udelay(5);
}
gpio_custom_io(i2c->iic_scl_gpio, 5); // generate stop condition?
gpio_custom_io(i2c->iic_sda_gpio, 5);
SET_REG(i2c->register_8, 0x30);
SET_REG(i2c->register_C, 0x37);
i2c->operation_result = 0;
interrupt_install(i2c->interrupt, i2cIRQHandler, (uint32_t)i2c);
interrupt_enable(i2c->interrupt);
}
int gpio_setup() {
// iboot writes to these registers on the S5L8720
// this probably is some weird replacement for a clock gate
SET_REG(GPIOIC + 0x70, 0x32);
SET_REG(GPIOIC + 0x6C, 3);
while (!(GET_REG(GPIOIC + 0x7C) & 0x1));
SET_REG(GPIOIC + 0x6C, 2);
int i;
GPIORegs = (GPIORegisters*) GPIO;
for(i = 0; i < GPIO_NUMINTGROUPS; i++) {
// writes to all the interrupt status register to acknowledge and discard any pending
SET_REG(GPIOIC + GPIO_INTSTAT + (i * 0x4), GPIO_INTSTAT_RESET);
// disable all interrupts
SET_REG(GPIOIC + GPIO_INTEN + (i * 0x4), GPIO_INTEN_RESET);
}
memset(InterruptGroups, 0, sizeof(InterruptGroups));
interrupt_install(0x21, gpio_handle_interrupt, 0);
interrupt_install(0x20, gpio_handle_interrupt, 1);
interrupt_install(0x1f, gpio_handle_interrupt, 2);
interrupt_install(0x03, gpio_handle_interrupt, 3);
interrupt_install(0x02, gpio_handle_interrupt, 4);
interrupt_install(0x01, gpio_handle_interrupt, 5);
interrupt_install(0x00, gpio_handle_interrupt, 6);
interrupt_enable(0x21);
interrupt_enable(0x20);
interrupt_enable(0x1f);
interrupt_enable(0x03);
interrupt_enable(0x02);
interrupt_enable(0x01);
interrupt_enable(0x00);
return 0;
}
int timer_setup() {
/* timer needs clock signal */
clock_gate_switch(TIMER_CLOCKGATE, ON);
/* stop/cleanup any existing timers */
timer_stop_all();
/* do some voodoo */
timer_init_rtc();
int i;
for(i = 0; i < NUM_TIMERS; i++) {
timer_setup_clk(i, 1, 2, 0);
}
// In our implementation, event dispatch timer setup is handled by a subsequent function
// Install the timer interrupt
interrupt_install(TIMER_IRQ, timerIRQHandler, 1);
interrupt_enable(TIMER_IRQ);
return 0;
}
int usb_setup() {
int i;
if(usb_inited) {
return 0;
}
InEPRegs = (USBEPRegisters*)(USB + USB_INREGS);
OutEPRegs = (USBEPRegisters*)(USB + USB_OUTREGS);
change_state(USBStart);
// Power on hardware
power_ctrl(POWER_USB, ON);
udelay(USB_START_DELAYUS);
// Initialize our data structures
for(i = 0; i < USB_NUM_ENDPOINTS; i++) {
switch(USB_EP_DIRECTION(i)) {
case USB_ENDPOINT_DIRECTIONS_BIDIR:
endpoint_directions[i] = USBBiDir;
break;
case USB_ENDPOINT_DIRECTIONS_IN:
endpoint_directions[i] = USBIn;
break;
case USB_ENDPOINT_DIRECTIONS_OUT:
endpoint_directions[i] = USBOut;
break;
}
bufferPrintf("EP %d: %d\r\n", i, endpoint_directions[i]);
}
memset(endpoint_handlers, 0, sizeof(endpoint_handlers));
// Set up the hardware
clock_gate_switch(USB_OTGCLOCKGATE, ON);
clock_gate_switch(USB_PHYCLOCKGATE, ON);
clock_gate_switch(EDRAM_CLOCKGATE, ON);
// Generate a soft disconnect on host
SET_REG(USB + DCTL, GET_REG(USB + DCTL) | DCTL_SFTDISCONNECT);
udelay(USB_SFTDISCONNECT_DELAYUS);
// power on OTG
SET_REG(USB + USB_ONOFF, GET_REG(USB + USB_ONOFF) & (~USB_ONOFF_OFF));
udelay(USB_ONOFFSTART_DELAYUS);
// power on PHY
SET_REG(USB_PHY + OPHYPWR, OPHYPWR_POWERON);
udelay(USB_PHYPWRPOWERON_DELAYUS);
// select clock
SET_REG(USB_PHY + OPHYCLK, (GET_REG(USB_PHY + OPHYCLK) & OPHYCLK_CLKSEL_MASK) | OPHYCLK_CLKSEL_48MHZ);
// reset phy
SET_REG(USB_PHY + ORSTCON, GET_REG(USB_PHY + ORSTCON) | ORSTCON_PHYSWRESET);
udelay(USB_RESET2_DELAYUS);
SET_REG(USB_PHY + ORSTCON, GET_REG(USB_PHY + ORSTCON) & (~ORSTCON_PHYSWRESET));
udelay(USB_RESET_DELAYUS);
SET_REG(USB + GRSTCTL, GRSTCTL_CORESOFTRESET);
// wait until reset takes
while((GET_REG(USB + GRSTCTL) & GRSTCTL_CORESOFTRESET) == GRSTCTL_CORESOFTRESET);
// wait until reset completes
while((GET_REG(USB + GRSTCTL) & ~GRSTCTL_AHBIDLE) != 0);
udelay(USB_RESETWAITFINISH_DELAYUS);
// allow host to reconnect
SET_REG(USB + DCTL, GET_REG(USB + DCTL) & (~DCTL_SFTDISCONNECT));
udelay(USB_SFTCONNECT_DELAYUS);
// flag all interrupts as positive, maybe to disable them
// Set 7th EP? This is what iBoot does
InEPRegs[USB_NUM_ENDPOINTS].interrupt = USB_EPINT_INEPNakEff | USB_EPINT_INTknEPMis | USB_EPINT_INTknTXFEmp
| USB_EPINT_TimeOUT | USB_EPINT_AHBErr | USB_EPINT_EPDisbld | USB_EPINT_XferCompl;
OutEPRegs[USB_NUM_ENDPOINTS].interrupt = USB_EPINT_OUTTknEPDis
| USB_EPINT_SetUp | USB_EPINT_AHBErr | USB_EPINT_EPDisbld | USB_EPINT_XferCompl;
for(i = 0; i < USB_NUM_ENDPOINTS; i++) {
InEPRegs[i].interrupt = USB_EPINT_INEPNakEff | USB_EPINT_INTknEPMis | USB_EPINT_INTknTXFEmp
| USB_EPINT_TimeOUT | USB_EPINT_AHBErr | USB_EPINT_EPDisbld | USB_EPINT_XferCompl;
OutEPRegs[i].interrupt = USB_EPINT_OUTTknEPDis
| USB_EPINT_SetUp | USB_EPINT_AHBErr | USB_EPINT_EPDisbld | USB_EPINT_XferCompl;
}
// disable all interrupts until endpoint descriptors and configuration structures have been setup
SET_REG(USB + GINTMSK, GINTMSK_NONE);
SET_REG(USB + DIEPMSK, USB_EPINT_NONE);
SET_REG(USB + DOEPMSK, USB_EPINT_NONE);
interrupt_install(USB_INTERRUPT, usbIRQHandler, 0);
usb_inited = TRUE;
return 0;
}
signed int dma_init_channel(uint8_t direction, uint32_t channel, int segmentationSetting, uint32_t txrx_register, uint32_t size, uint32_t Setting1Index, uint32_t Setting2Index, void* handler) {
int i = 0;
DMAInfo* dma = &dmaInfo[channel];
if (!dma->signalled) {
dma->segmentBuffer = memalign(0x20, 32 * sizeof(*dma->segmentBuffer));
memset(dma->segmentBuffer, 0, (32 * sizeof(*dma->segmentBuffer)));
//bufferPrintf("cdma: new segment buffer 0x%08x.\r\n", dma->segmentBuffer);
if (!dma->segmentBuffer)
system_panic("CDMA: can't allocate command chain\r\n");
for (i = 0; i != 32; i ++)
dma->segmentBuffer[i].address = get_physical_address((uint32_t)(&dma->segmentBuffer[i+1]));
dma->signalled = 1;
dma->txrx_register = 0;
dma->unk_separator = 0;
interrupt_set_int_type(DMA_CHANNEL_INTERRUPT_BASE + channel, 0);
interrupt_install(DMA_CHANNEL_INTERRUPT_BASE + channel, dmaIRQHandler, channel);
interrupt_enable(DMA_CHANNEL_INTERRUPT_BASE + channel);
}
dma->irq_state = 0;
dma->dmaSegmentNumber = 0;
dma->segmentationSetting = segmentationSetting;
dma->segmentOffset = 0;
dma->dataSize = size;
dma->unsegmentedSize = size;
dma->handler = handler;
dma->channel = channel;
uint8_t Setting1;
uint8_t Setting2;
switch(Setting1Index)
{
case 1:
Setting1 = 0 << 2;
break;
case 2:
Setting1 = 1 << 2;
break;
case 4:
Setting1 = 2 << 2;
break;
default:
return -1;
}
switch (Setting2Index)
{
case 1:
Setting2 = 0 << 4;
break;
case 2:
Setting2 = 1 << 4;
break;
case 4:
Setting2 = 2 << 4;
break;
case 8:
Setting2 = 3 << 4;
break;
case 16:
Setting2 = 4 << 4;
break;
case 32:
Setting2 = 5 << 4;
break;
default:
return -1;
}
uint32_t channel_reg = channel << 12;
SET_REG(DMA + channel_reg, 2);
uint8_t direction_setting;
if (direction == 1) // if out
direction_setting = 1 << 1;
else
direction_setting = 0 << 1;
SET_REG(DMA + DMA_SETTINGS + channel_reg, dma->unk_separator | Setting1 | Setting2 | direction_setting);
SET_REG(DMA + DMA_TXRX_REGISTER + channel_reg, txrx_register);
SET_REG(DMA + DMA_SIZE + channel_reg, size);
if (dma->dmaAESInfo)
dma->current_segment = 0;
dma_continue_async(channel);
return 0;
}
int main(int argc, char **argv)
{
stm_display_plane_t *pPlane;
stm_display_buffer_t buffer_setup;
char *fbuffer;
void *fbufferphys;
interrupt_t *vsync_interrupt=0;
interrupt_t *hdmi_interrupt=0;
int err;
int seconds;
int clip;
int rgb;
int dvi;
stm_plane_id_t planeid;
osclock_t lasttime;
kernel_initialize(NULL);
kernel_start();
kernel_timeslice(OS21_TRUE);
framerate_sem = semaphore_create_fifo(0);
frameupdate_sem = semaphore_create_fifo(0);
hotplug_sem = semaphore_create_fifo(0);
task_create(displayupdate_task_fn, 0, OS21_DEF_MIN_STACK_SIZE, MAX_USER_PRIORITY, "displayupdate", 0);
pDev = stm_display_get_device(0);
if(!pDev)
{
printf("Unable to create device instance\n");
return 1;
}
if(argc<2)
usage();
argc--;
argv++;
seconds = 60;
rgb = 0;
dvi = 0;
clip = 0;
while(argc>0)
{
switch(**argv)
{
case 'C':
{
printf("Clipping video signal selected\n");
clip = 1;
break;
}
case 'd':
{
printf("Setting DVI mode on HDMI output\n");
dvi = 1;
break;
}
case 'h':
{
int refresh;
argc--;
argv++;
if(argc <= 0)
{
fprintf(stderr,"Missing HD vertical refresh frequency\n");
usage();
}
refresh = atoi(*argv);
switch(refresh)
{
case 50:
printf("Setting 1280x720-50\n");
MODE = STVTG_TIMING_MODE_720P50000_74250;
STANDARD = STM_OUTPUT_STD_SMPTE296M;
framerate = 50;
break;
case 59:
printf("Setting 1280x720-59\n");
MODE = STVTG_TIMING_MODE_720P59940_74176;
STANDARD = STM_OUTPUT_STD_SMPTE296M;
framerate = 60;
break;
case 60:
printf("Setting 1280x720-60\n");
MODE = STVTG_TIMING_MODE_720P60000_74250;
STANDARD = STM_OUTPUT_STD_SMPTE296M;
framerate = 60;
break;
default:
fprintf(stderr,"Unsupported HD vertical refresh frequency\n");
usage();
}
break;
}
case 'r':
{
printf("Setting Component RGB Outputs\n");
rgb = 1;
break;
}
case 'p':
{
int refresh;
argc--;
argv++;
if(argc <= 0)
{
fprintf(stderr,"Missing 1080p vertical refresh frequency\n");
usage();
}
refresh = atoi(*argv);
switch(refresh)
{
case 23:
printf("Setting 1920x1080-23\n");
MODE = STVTG_TIMING_MODE_1080P23976_74176;
STANDARD = STM_OUTPUT_STD_SMPTE274M;
framerate = 24;
break;
case 24:
printf("Setting 1920x1080-24\n");
MODE = STVTG_TIMING_MODE_1080P24000_74250;
STANDARD = STM_OUTPUT_STD_SMPTE274M;
framerate = 24;
break;
case 25:
printf("Setting 1920x1080-25\n");
MODE = STVTG_TIMING_MODE_1080P25000_74250;
STANDARD = STM_OUTPUT_STD_SMPTE274M;
framerate = 25;
break;
case 29:
printf("Setting 1920x1080-29\n");
MODE = STVTG_TIMING_MODE_1080P29970_74176;
STANDARD = STM_OUTPUT_STD_SMPTE274M;
framerate = 30;
break;
case 30:
printf("Setting 1920x1080-30\n");
MODE = STVTG_TIMING_MODE_1080P30000_74250;
STANDARD = STM_OUTPUT_STD_SMPTE274M;
framerate = 30;
break;
case 50:
printf("Setting 1920x1080-50\n");
MODE = STVTG_TIMING_MODE_1080P50000_148500;
STANDARD = STM_OUTPUT_STD_SMPTE274M;
framerate = 50;
break;
case 59:
printf("Setting 1920x1080-59\n");
MODE = STVTG_TIMING_MODE_1080P59940_148352;
STANDARD = STM_OUTPUT_STD_SMPTE274M;
framerate = 60;
break;
case 60:
printf("Setting 1920x1080-60\n");
MODE = STVTG_TIMING_MODE_1080P60000_148500;
STANDARD = STM_OUTPUT_STD_SMPTE274M;
framerate = 60;
break;
default:
fprintf(stderr,"Unsupported HD vertical refresh frequency\n");
usage();
}
break;
}
case 's':
{
int refresh;
argc--;
argv++;
if(argc <= 0)
{
fprintf(stderr,"Missing SD vertical refresh frequency\n");
usage();
}
refresh = atoi(*argv);
switch(refresh)
{
case 50:
printf("Setting 720x576-50\n");
MODE = STVTG_TIMING_MODE_576P50000_27000;
STANDARD = STM_OUTPUT_STD_SMPTE293M;
framerate = 50;
break;
case 59:
printf("Setting 720x480-59\n");
MODE = STVTG_TIMING_MODE_480P59940_27000;
STANDARD = STM_OUTPUT_STD_SMPTE293M;
framerate = 60;
break;
case 60:
printf("Setting 720x480-60\n");
MODE = STVTG_TIMING_MODE_480P60000_27027;
STANDARD = STM_OUTPUT_STD_SMPTE293M;
framerate = 60;
break;
default:
fprintf(stderr,"Unsupported SD vertical refresh frequency\n");
usage();
}
break;
}
case 't':
{
argc--;
argv++;
if(argc <= 0)
{
fprintf(stderr,"Missing seconds\n");
usage();
}
seconds = atoi(*argv);
if(seconds<0)
usage();
break;
}
case 'v':
{
int refresh;
argc--;
argv++;
if(argc <= 0)
{
fprintf(stderr,"Missing vertical refresh frequency\n");
usage();
}
refresh = atoi(*argv);
switch(refresh)
{
case 59:
printf("Setting 640x480-59\n");
MODE = STVTG_TIMING_MODE_480P59940_25180;
STANDARD = STM_OUTPUT_STD_VESA;
framerate = 60;
break;
case 60:
printf("Setting 640x480-60\n");
MODE = STVTG_TIMING_MODE_480P60000_25200;
STANDARD = STM_OUTPUT_STD_VESA;
framerate = 60;
break;
default:
fprintf(stderr,"Unsupported vertical refresh frequency\n");
usage();
}
break;
}
default:
fprintf(stderr,"Unknown option '%s'\n",*argv);
usage();
}
argc--;
argv++;
}
planeid = OUTPUT_GDP1;
vsync_interrupt = get_main_vtg_interrupt();
setup_soc();
if(!vsync_interrupt)
{
printf("Cannot find VSYNC interrupt handler\n");
return 1;
}
err = interrupt_install(vsync_interrupt, vsync_isr, pDev);
err += interrupt_enable(vsync_interrupt);
if(err>0)
{
printf("Unable to install and enable VSYNC interrupt\n");
return 1;
}
fbuffer = (char *)malloc(FBSIZE);
if(!fbuffer)
{
printf("Unable to allocate framebuffer\n");
return 1;
}
memset(fbuffer, 0x00, FBSIZE);
create_test_pattern(fbuffer, FBWIDTH, FBHEIGHT, FBSTRIDE);
cache_purge_data(fbuffer, FBSIZE);
pOutput = stm_display_get_output(pDev, 0);
if(!pOutput)
{
printf("Unable to get output\n");
return 1;
}
setup_analogue_voltages(pOutput);
stm_display_output_set_control(pOutput, STM_CTRL_SIGNAL_RANGE, clip?STM_SIGNAL_VIDEO_RANGE:STM_SIGNAL_FILTER_SAV_EAV);
pDVO = get_dvo_output(pDev);
{
pHDMI = get_hdmi_output(pDev);
if(pHDMI)
{
/*
* Now we have a HDMI output pointer to handle hotplug interrupts,
* we can enable the interrupt handlers.
*/
hdmi_interrupt = get_hdmi_interrupt();
if(hdmi_interrupt)
{
err = interrupt_install(hdmi_interrupt, hdmi_isr, pHDMI);
err += interrupt_enable(hdmi_interrupt);
}
if(err>0)
{
printf("Unable to install and enable hdmi interrupts\n");
return 1;
}
stm_display_output_set_control(pHDMI, STM_CTRL_SIGNAL_RANGE, clip?STM_SIGNAL_VIDEO_RANGE:STM_SIGNAL_FILTER_SAV_EAV);
}
else
{
printf("Hmmm, no HDMI output available\n");
}
}
pModeLine = stm_display_output_get_display_mode(pOutput, MODE);
if(!pModeLine)
{
printf("Unable to use requested display mode\n");
return 1;
}
pPlane = stm_display_get_plane(pDev, planeid);
if(!pPlane)
{
printf("Unable to get graphics plane\n");
return 1;
}
if(stm_display_plane_connect_to_output(pPlane, pOutput)<0)
{
printf("Unable to display plane on output\n");
return 1;
}
if(stm_display_plane_lock(pPlane)<0)
{
printf("Unable to lock plane's buffer queue\n");
return 1;
}
memset(&buffer_setup, 0, sizeof(buffer_setup));
vmem_virt_to_phys(fbuffer, &fbufferphys);
buffer_setup.src.ulVideoBufferAddr = (ULONG)fbufferphys;
buffer_setup.src.ulVideoBufferSize = FBSIZE;
buffer_setup.src.ulStride = FBSTRIDE;
buffer_setup.src.ulPixelDepth = FBDEPTH;
buffer_setup.src.ulColorFmt = FBPIXFMT;
buffer_setup.src.Rect.width = FBWIDTH;
buffer_setup.src.Rect.height = FBHEIGHT;
buffer_setup.dst.Rect.width = FBWIDTH;
buffer_setup.dst.Rect.height = FBHEIGHT;
buffer_setup.info.ulFlags = STM_PLANE_PRESENTATION_PERSISTENT;
printf("Clock is running at %ld ticks per second\n",(long)time_ticks_per_sec());
ULONG format=0;
format = rgb?STM_VIDEO_OUT_RGB:STM_VIDEO_OUT_YUV;
stm_display_output_set_control(pOutput, STM_CTRL_VIDEO_OUT_SELECT, format);
if(pHDMI)
{
ULONG format = 0;
format |= rgb?STM_VIDEO_OUT_RGB:STM_VIDEO_OUT_YUV;
format |= dvi?STM_VIDEO_OUT_DVI:STM_VIDEO_OUT_HDMI;
stm_display_output_set_control(pHDMI, STM_CTRL_VIDEO_OUT_SELECT, format);
}
if(stm_display_output_start(pOutput, pModeLine, STANDARD)<0)
{
printf("Unable to start display\n");
return 1;
}
if(pDVO)
{
printf("Info: Attempting to start DVO\n");
if(stm_display_output_start(pDVO, pModeLine, STANDARD)<0)
{
printf("Info: Unable to start DVO\n");
}
}
lasttime = time_now(); // VTG Start time (approx)
if(stm_display_plane_queue_buffer(pPlane, &buffer_setup)<0)
{
printf("Unable to queue framebuffer for display on graphics plane\n");
return 1;
}
task_create(hotplug_task_fn, 0, OS21_DEF_MIN_STACK_SIZE, MIN_USER_PRIORITY, "hotplug", 0);
if(seconds == 0)
{
task_delay(time_ticks_per_sec()*5);
task_priority_set(NULL,MIN_USER_PRIORITY);
silent_hotplug = 1;
err = get_yesno();
}
else
{
while(seconds>0)
{
osclock_t now,delta;
semaphore_wait(framerate_sem);
now = time_now();
delta = time_minus(now,lasttime);
printf("%d frames took %ld ticks.\n",framerate, (long)delta);
lasttime = now;
seconds--;
}
err = 0;
}
stm_display_plane_flush(pPlane);
stm_display_plane_disconnect_from_output(pPlane, pOutput);
stm_display_output_stop(pOutput);
interrupt_disable(vsync_interrupt);
interrupt_disable(hdmi_interrupt);
stm_display_plane_release(pPlane);
if(pDVO)
stm_display_output_release(pDVO);
if(pHDMI)
stm_display_output_release(pHDMI);
stm_display_output_release(pOutput);
stm_display_release_device(pDev);
return err;
}
int gpio_setup() {
#if !defined(CONFIG_IPHONE_4) && !defined(CONFIG_IPAD)
int i;
GPIORegs = (GPIORegisters*) GPIO;
for(i = 0; i < GPIO_NUMINTGROUPS; i++) {
// writes to all the interrupt status register to acknowledge and discard any pending
SET_REG(GPIOIC + GPIO_INTSTAT + (i * 0x4), GPIO_INTSTAT_RESET);
// disable all interrupts
SET_REG(GPIOIC + GPIO_INTEN + (i * 0x4), GPIO_INTEN_RESET);
}
memset(InterruptGroups, 0, sizeof(InterruptGroups));
interrupt_install(0x21, gpio_handle_interrupt, 0);
interrupt_install(0x20, gpio_handle_interrupt, 1);
interrupt_install(0x1f, gpio_handle_interrupt, 2);
interrupt_install(0x03, gpio_handle_interrupt, 3);
interrupt_install(0x02, gpio_handle_interrupt, 4);
interrupt_install(0x01, gpio_handle_interrupt, 5);
interrupt_install(0x00, gpio_handle_interrupt, 6);
interrupt_enable(0x21);
interrupt_enable(0x20);
interrupt_enable(0x1f);
interrupt_enable(0x03);
interrupt_enable(0x02);
interrupt_enable(0x01);
interrupt_enable(0x00);
clock_gate_switch(GPIO_CLOCKGATE, ON);
return 0;
#else
uint8_t v[8];
if (!(GET_REG(GPIO) & 1)) {
gpio_set(0x502, 0);
gpio_set(0x503, 0);
gpio_set(0x504, 0);
gpio_switch(0x502, 0xFFFFFFFF);
gpio_switch(0x503, 0xFFFFFFFF);
gpio_switch(0x504, 0xFFFFFFFF);
gpio_set(0x202, 0);
gpio_set(0x301, 0);
gpio_set(0x304, 0);
gpio_set(0x305, 0);
gpio_switch(0x202, 0xFFFFFFFF);
gpio_switch(0x301, 0xFFFFFFFF);
gpio_switch(0x304, 0xFFFFFFFF);
gpio_switch(0x305, 0xFFFFFFFF);
udelay(100);
v[0] = chipid_get_gpio();
v[1] = gpio_pin_state(0x504);
v[2] = gpio_pin_state(0x503);
v[3] = gpio_pin_state(0x502);
v[4] = gpio_pin_state(0x305);
v[5] = gpio_pin_state(0x304);
v[6] = gpio_pin_state(0x301);
v[7] = gpio_pin_state(0x202);
gpio_set(0x502, 4);
gpio_set(0x503, 4);
gpio_set(0x504, 4);
gpio_set(0x202, 4);
gpio_set(0x301, 4);
gpio_set(0x304, 4);
gpio_set(0x305, 4);
uint32_t new_status = ((v[0] << 3 | v[1] << 2 | v[2] << 1 | v[3]) << 16) | ((v[4] << 3 | v[5] << 2 | v[6] << 1 | v[7]) << 8) | 1;
SET_REG(POWER + POWER_ID, (GET_BITS(GET_REG(POWER + POWER_ID), 24, 8)) | (new_status & 0xFFFFFF));
}
return 0;
#endif
}
int usb_setup(USBEnumerateHandler hEnumerate, USBStartHandler hStart)
{
usb_shutdown();
// This is not relevant to the hardware,
// and usb_setup is called when setting up a new
// USB protocol. So we should reset the EP
// handlers here! -- Ricky26
memset(endpoint_handlers, 0, sizeof(endpoint_handlers));
startHandler = hStart;
enumerateHandler = hEnumerate;
setupHandler = NULL;
if(usb_inited)
return 0;
if(controlSendBuffer == NULL)
controlSendBuffer = memalign(DMA_ALIGN, CONTROL_SEND_BUFFER_LEN);
if(controlRecvBuffer == NULL)
controlRecvBuffer = memalign(DMA_ALIGN, CONTROL_RECV_BUFFER_LEN);
InEPRegs = (USBEPRegisters*)(USB + USB_INREGS);
OutEPRegs = (USBEPRegisters*)(USB + USB_OUTREGS);
change_state(USBStart);
initializeDescriptors();
// Initialize our data structures
memset(usb_message_queue, 0, sizeof(usb_message_queue));
#ifdef USB_PHY_1G
// Power on hardware
power_ctrl(POWER_USB, ON);
udelay(USB_START_DELAYUS);
#else
// Wait for USB hardware to come alive
udelay(10000);
#endif
// Set up the hardware
clock_gate_switch(USB_OTGCLOCKGATE, ON);
clock_gate_switch(USB_PHYCLOCKGATE, ON);
#ifdef USB_PHY_1G
clock_gate_switch(EDRAM_CLOCKGATE, ON);
#endif
// power on OTG
SET_REG(USB + PCGCCTL, (GET_REG(USB + PCGCCTL) & (~PCGCCTL_ONOFF_MASK)) | PCGCCTL_ON);
udelay(USB_ONOFFSTART_DELAYUS);
// Generate a soft disconnect on host
//SET_REG(USB + DCTL, GET_REG(USB + DCTL) | DCTL_SFTDISCONNECT);
//udelay(USB_SFTDISCONNECT_DELAYUS);
// Initialise PHY
usb_phy_init();
bufferPrintf("USB: Hardware Configuration\n"
" HWCFG1 = 0x%08x\n"
" HWCFG2 = 0x%08x\n"
" HWCFG3 = 0x%08x\n"
" HWCFG4 = 0x%08x\n",
GET_REG(USB+GHWCFG1),
GET_REG(USB+GHWCFG2),
GET_REG(USB+GHWCFG3),
GET_REG(USB+GHWCFG4));
usb_inited = TRUE;
interrupt_install(USB_INTERRUPT, usbIRQHandler, 0);
// Start USB
usb_start();
return 0;
}
