static Uart* uartisa(int ctlrno, ISAConf* isa) { int io; void *ctlr; Uart *uart; char buf[64]; io = isa->port; snprint(buf, sizeof(buf), "%s%d", isaphysuart.name, ctlrno); if(ioalloc(io, 8, 0, buf) < 0) { print("uartisa: I/O 0x%uX in use\n", io); return nil; } uart = malloc(sizeof(Uart)); ctlr = i8250alloc(io, isa->irq, BUSUNKNOWN); if(uart == nil || ctlr == nil) { iofree(io); free(uart); free(ctlr); return nil; } uart->regs = ctlr; snprint(buf, sizeof(buf), "COM%d", ctlrno+1); kstrdup(&uart->name, buf); uart->freq = isa->freq; uart->phys = &i8250physuart; return uart; }
static int reset(Ether* ether) { ushort buf[16]; ulong port; Dp8390 *ctlr; int i, slot; uchar ea[Eaddrlen], sum, x; Ec2t *ec2t, tmpec2t; /* * Set up the software configuration. * Use defaults for port, irq, mem and size * if not specified. * The manual says 16KB memory, the box * says 32KB. The manual seems to be correct. */ if(ether->port == 0) ether->port = 0x300; if(ether->irq == 0) ether->irq = 9; if(ether->mem == 0) ether->mem = 0x4000; if(ether->size == 0) ether->size = 16*1024; port = ether->port; if(ioalloc(ether->port, 0x20, 0, "ec2t") < 0) return -1; slot = -1; for(ec2t = ec2tpcmcia; ec2t->name != nil; ec2t++){ if((slot = pcmspecial(ec2t->name, ether)) >= 0) break; } if(ec2t->name == nil){ ec2t = &tmpec2t; ec2t->name = nil; ec2t->iochecksum = 0; for(i = 0; i < ether->nopt; i++){ if(cistrncmp(ether->opt[i], "id=", 3) == 0){ ec2t->name = ðer->opt[i][3]; slot = pcmspecial(ec2t->name, ether); } else if(cistrncmp(ether->opt[i], "iochecksum", 10) == 0) ec2t->iochecksum = 1; } } ctlr = malloc(sizeof(Dp8390)); if(ctlr == nil || slot < 0){ iofree(port); free(ctlr); return -1; } ether->ctlr = ctlr; ctlr->width = 2; ctlr->ram = 0; ctlr->port = port; ctlr->data = port+Data; ctlr->tstart = HOWMANY(ether->mem, Dp8390BufSz); ctlr->pstart = ctlr->tstart + HOWMANY(sizeof(Etherpkt), Dp8390BufSz); ctlr->pstop = ctlr->tstart + HOWMANY(ether->size, Dp8390BufSz); ctlr->dummyrr = 0; for(i = 0; i < ether->nopt; i++){ if(cistrcmp(ether->opt[i], "nodummyrr") == 0) ctlr->dummyrr = 0; else if(cistrncmp(ether->opt[i], "dummyrr=", 8) == 0) ctlr->dummyrr = strtol(ðer->opt[i][8], nil, 0); } /* * Reset the board. This is done by doing a read * followed by a write to the Reset address. */ buf[0] = inb(port+Reset); delay(2); outb(port+Reset, buf[0]); delay(2); /* * Init the (possible) chip, then use the (possible) * chip to read the (possible) PROM for ethernet address * and a marker byte. * Could just look at the DP8390 command register after * initialisation has been tried, but that wouldn't be * enough, there are other ethernet boards which could * match. */ dp8390reset(ether); sum = 0; if(ec2t->iochecksum){ /* * These cards have the ethernet address in I/O space. * There's a checksum over 8 bytes which sums to 0xFF. */ for(i = 0; i < 8; i++){ x = inb(port+0x14+i); sum += x; buf[i] = (x<<8)|x; } } else{ memset(buf, 0, sizeof(buf)); dp8390read(ctlr, buf, 0, sizeof(buf)); if((buf[0x0E] & 0xFF) == 0x57 && (buf[0x0F] & 0xFF) == 0x57) sum = 0xFF; } if(sum != 0xFF){ pcmspecialclose(slot); iofree(ether->port); free(ether->ctlr); return -1; } /* * Stupid machine. Shorts were asked for, * shorts were delivered, although the PROM is a byte array. * Set the ethernet address. */ memset(ea, 0, Eaddrlen); if(memcmp(ea, ether->ea, Eaddrlen) == 0){ for(i = 0; i < sizeof(ether->ea); i++) ether->ea[i] = buf[i]; } dp8390setea(ether); return 0; }
static int reset(Ether* ether) { int i, t, slot; char *type; int port; enum { WantAny, Want10BT, Want10B2 }; int want; uchar ea[6]; char *p; if(ether->irq == 0) ether->irq = 10; if(ether->port == 0) ether->port = 0x240; port = ether->port; if(ioalloc(port, 0x10, 0, "3C589") < 0) return -1; type = nil; slot = -1; for(i = 0; tcmpcmcia[i] != nil; i++){ type = tcmpcmcia[i]; if((slot = pcmspecial(type, ether)) >= 0) break; } if(slot < 0){ iofree(port); return -1; } /* * Read Ethernet address from card memory * on 3C562, but only if the user has not * overridden it. */ memset(ea, 0, sizeof ea); if(memcmp(ea, ether->ea, 6) == 0 && strcmp(type, "3C562") == 0) { if(pcmcistuple(slot, 0x88, -1, ea, 6) == 6) { for(i = 0; i < 6; i += 2){ t = ea[i]; ea[i] = ea[i+1]; ea[i+1] = t; } memmove(ether->ea, ea, 6); } } /* * Allow user to specify desired media in plan9.ini */ want = WantAny; for(i = 0; i < ether->nopt; i++){ if(cistrncmp(ether->opt[i], "media=", 6) != 0) continue; p = ether->opt[i]+6; if(cistrcmp(p, "10base2") == 0) want = Want10B2; else if(cistrcmp(p, "10baseT") == 0) want = Want10BT; } /* try configuring as a 10BaseT */ if(want==WantAny || want==Want10BT){ if(configASIC(ether, port, xcvr10BaseT) < 0){ pcmspecialclose(slot); iofree(port); return -1; } delay(100); COMMAND(port, SelectRegisterWindow, Wdiagnostic); if((ins(port+MediaStatus)&linkBeatDetect) || want==Want10BT){ COMMAND(port, SelectRegisterWindow, Wop); print("#l%d: xcvr10BaseT %s\n", ether->ctlrno, type); return 0; } } /* try configuring as a 10base2 */ if(want==WantAny || want==Want10B2){ COMMAND(port, GlobalReset, 0); if(configASIC(ether, port, xcvr10Base2) < 0){ pcmspecialclose(slot); iofree(port); return -1; } print("#l%d: xcvr10Base2 %s\n", ether->ctlrno, type); return 0; } return -1; /* not reached */ }
static int ne2000reset(Ether* edev) { ushort buf[16]; ulong port; Dp8390 *dp8390; int i; uchar ea[Eaddrlen]; if(edev->port == 0) ne2000pnp(edev); /* * Set up the software configuration. * Use defaults for irq, mem and size * if not specified. * Must have a port, no more default. */ if(edev->port == 0) return -1; if(edev->irq == 0) edev->irq = 2; if(edev->mem == 0) edev->mem = 0x4000; if(edev->size == 0) edev->size = 16*1024; port = edev->port; if(ioalloc(edev->port, 0x20, 0, "ne2000") < 0) return -1; edev->ctlr = malloc(sizeof(Dp8390)); dp8390 = edev->ctlr; if(dp8390 == nil) error(Enomem); dp8390->width = 2; dp8390->ram = 0; dp8390->port = port; dp8390->data = port+Data; dp8390->tstart = HOWMANY(edev->mem, Dp8390BufSz); dp8390->pstart = dp8390->tstart + HOWMANY(sizeof(Etherpkt), Dp8390BufSz); dp8390->pstop = dp8390->tstart + HOWMANY(edev->size, Dp8390BufSz); dp8390->dummyrr = 1; for(i = 0; i < edev->nopt; i++){ if(strcmp(edev->opt[i], "nodummyrr")) continue; dp8390->dummyrr = 0; break; } /* * Reset the board. This is done by doing a read * followed by a write to the Reset address. */ buf[0] = inb(port+Reset); delay(2); outb(port+Reset, buf[0]); delay(2); /* * Init the (possible) chip, then use the (possible) * chip to read the (possible) PROM for ethernet address * and a marker byte. * Could just look at the DP8390 command register after * initialisation has been tried, but that wouldn't be * enough, there are other ethernet boards which could * match. * Parallels has buf[0x0E] == 0x00 whereas real hardware * usually has 0x57. */ dp8390reset(edev); memset(buf, 0, sizeof(buf)); dp8390read(dp8390, buf, 0, sizeof(buf)); i = buf[0x0E] & 0xFF; if((i != 0x00 && i != 0x57) || (buf[0x0F] & 0xFF) != 0x57){ iofree(edev->port); free(edev->ctlr); return -1; } /* * Stupid machine. Shorts were asked for, * shorts were delivered, although the PROM is a byte array. * Set the ethernet address. */ memset(ea, 0, Eaddrlen); if(memcmp(ea, edev->ea, Eaddrlen) == 0){ for(i = 0; i < sizeof(edev->ea); i++) edev->ea[i] = buf[i]; } dp8390setea(edev); return 0; }
/* * set up for slot cards */ void devi82365link(void) { static int already; int i, j; I82365 *cp; PCMslot *pp; char buf[32], *p; if(already) return; already = 1; if((p=getconf("pcmcia0")) && strncmp(p, "disabled", 8)==0) return; if(_pcmspecial) return; /* look for controllers if the ports aren't already taken */ if(ioalloc(0x3E0, 2, 0, "i82365.0") >= 0){ i82365probe(0x3E0, 0x3E1, 0); i82365probe(0x3E0, 0x3E1, 1); if(ncontroller == 0) iofree(0x3E0); } if(ioalloc(0x3E2, 2, 0, "i82365.1") >= 0){ i = ncontroller; i82365probe(0x3E2, 0x3E3, 0); i82365probe(0x3E2, 0x3E3, 1); if(ncontroller == i) iofree(0x3E2); } if(ncontroller == 0) return; _pcmspecial = pcmcia_pcmspecial; _pcmspecialclose = pcmcia_pcmspecialclose; for(i = 0; i < ncontroller; i++) nslot += controller[i]->nslot; slot = xalloc(nslot * sizeof(PCMslot)); lastslot = slot; for(i = 0; i < ncontroller; i++){ cp = controller[i]; print("#y%d: %d slot %s: port 0x%uX irq %d\n", i, cp->nslot, chipname[cp->type], cp->xreg, cp->irq); for(j = 0; j < cp->nslot; j++){ pp = lastslot++; pp->slotno = pp - slot; pp->memlen = 64*MB; pp->base = (cp->dev<<7) | (j<<6); pp->cp = cp; pp->msec = ~0; pp->verstr[0] = 0; slotdis(pp); /* interrupt on status change */ wrreg(pp, Rcscic, (cp->irq<<4) | Fchangeena); rdreg(pp, Rcsc); } /* for card management interrupts */ snprint(buf, sizeof buf, "i82365.%d", i); intrenable(cp->irq, i82365intr, 0, BUSUNKNOWN, buf); } }