void board_init(void) { #ifndef CONF_BOARD_KEEP_WATCHDOG_AT_INIT /* Disable the watchdog */ WDT->WDT_MR = WDT_MR_WDDIS; #endif /* Initialize IOPORTs */ ioport_init(); /* Configure the pins connected to LEDs as output and set their * default initial state to high (LEDs off). */ ioport_set_pin_dir(LED0_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED0_GPIO, LED0_INACTIVE_LEVEL); ioport_set_pin_dir(LED1_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED1_GPIO, LED0_INACTIVE_LEVEL); ioport_set_pin_dir(LED2_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED2_GPIO, LED0_INACTIVE_LEVEL); /* Configure Push Button pins */ ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_1, GPIO_PUSH_BUTTON_1_FLAGS, GPIO_PUSH_BUTTON_1_SENSE); ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_2, GPIO_PUSH_BUTTON_2_FLAGS, GPIO_PUSH_BUTTON_2_SENSE); ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_3, GPIO_PUSH_BUTTON_3_FLAGS, GPIO_PUSH_BUTTON_3_SENSE); ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_4, GPIO_PUSH_BUTTON_4_FLAGS, GPIO_PUSH_BUTTON_4_SENSE); #ifdef CONF_BOARD_UART_CONSOLE /* Configure UART pins */ ioport_set_port_peripheral_mode(PINS_UART0_PORT, PINS_UART0, PINS_UART0_FLAGS); #endif #ifdef CONF_BOARD_PWM_LED0 /* Configure PWM LED0 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED0_GPIO, PIN_PWM_LED0_FLAGS); #endif #ifdef CONF_BOARD_PWM_LED1 /* Configure PWM LED1 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED1_GPIO, PIN_PWM_LED1_FLAGS); #endif #ifdef CONF_BOARD_PWM_LED2 /* Configure PWM LED2 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED2_GPIO, PIN_PWM_LED2_FLAGS); #endif #ifdef CONF_BOARD_PWM_LED3 /* Configure PWM LED3 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED3_GPIO, PIN_PWM_LED3_FLAGS); #endif #ifdef CONF_BOARD_USART_RXD /* Configure USART RXD pin */ ioport_set_pin_peripheral_mode(PIN_USART1_RXD_IDX, PIN_USART1_RXD_FLAGS); #endif #ifdef CONF_BOARD_USART_TXD /* Configure USART TXD pin */ ioport_set_pin_peripheral_mode(PIN_USART1_TXD_IDX, PIN_USART1_TXD_FLAGS); #endif #ifdef CONF_BOARD_USART_CTS /* Configure USART CTS pin */ ioport_set_pin_peripheral_mode(PIN_USART1_CTS_IDX, PIN_USART1_CTS_FLAGS); #endif #ifdef CONF_BOARD_USART_RTS /* Configure USART RTS pin */ ioport_set_pin_peripheral_mode(PIN_USART1_RTS_IDX, PIN_USART1_RTS_FLAGS); #endif #ifdef CONF_BOARD_USART_SCK /* Configure USART synchronous communication SCK pin */ ioport_set_pin_peripheral_mode(PIN_USART1_SCK_IDX, PIN_USART1_SCK_FLAGS); #endif #ifdef CONF_BOARD_ADM3312_EN /* Configure ADM3312 enable pin */ ioport_set_pin_dir(PIN_USART1_EN_IDX, IOPORT_DIR_OUTPUT); #ifdef CONF_BOARD_ADM3312_EN_DISABLE_AT_INIT ioport_set_pin_level(PIN_USART1_EN_IDX, PIN_USART1_EN_INACTIVE_LEVEL); #else ioport_set_pin_level(PIN_USART1_EN_IDX, PIN_USART1_EN_ACTIVE_LEVEL); #endif #endif #ifdef CONF_BOARD_ADS7843 /* Configure Touchscreen SPI pins */ ioport_set_pin_dir(BOARD_ADS7843_IRQ_GPIO, IOPORT_DIR_INPUT); ioport_set_pin_mode(BOARD_ADS7843_IRQ_GPIO, BOARD_ADS7843_IRQ_FLAGS); ioport_set_pin_dir(BOARD_ADS7843_BUSY_GPIO, IOPORT_DIR_INPUT); ioport_set_pin_mode(BOARD_ADS7843_BUSY_GPIO, BOARD_ADS7843_BUSY_FLAGS); ioport_set_pin_peripheral_mode(SPI_MISO_GPIO, SPI_MISO_FLAGS); ioport_set_pin_peripheral_mode(SPI_MOSI_GPIO, SPI_MOSI_FLAGS); ioport_set_pin_peripheral_mode(SPI_SPCK_GPIO, SPI_SPCK_FLAGS); ioport_set_pin_peripheral_mode(SPI_NPCS0_GPIO, SPI_NPCS0_FLAGS); #endif #ifdef CONF_BOARD_CAN0 /* Configure the CAN0 TX and RX pins. */ ioport_set_pin_peripheral_mode(PIN_CAN0_RX_IDX, PIN_CAN0_RX_FLAGS); ioport_set_pin_peripheral_mode(PIN_CAN0_TX_IDX, PIN_CAN0_TX_FLAGS); /* Configure the transiver0 RS & EN pins. */ ioport_set_pin_dir(PIN_CAN0_TR_RS_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(PIN_CAN0_TR_EN_IDX, IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_CAN1 /* Configure the CAN1 TX and RX pin. */ ioport_set_pin_peripheral_mode(PIN_CAN1_RX_IDX, PIN_CAN1_RX_FLAGS); ioport_set_pin_peripheral_mode(PIN_CAN1_TX_IDX, PIN_CAN1_TX_FLAGS); /* Configure the transiver1 RS & EN pins. */ ioport_set_pin_dir(PIN_CAN1_TR_RS_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(PIN_CAN1_TR_EN_IDX, IOPORT_DIR_OUTPUT); #endif #if defined(CONF_BOARD_USB_PORT) # if defined(CONF_BOARD_USB_VBUS_DETECT) gpio_configure_pin(USB_VBUS_PIN, USB_VBUS_FLAGS); # endif #endif #if defined(CONF_BOARD_ILI9325) || defined(CONF_BOARD_ILI93XX) /* Configure LCD EBI pins */ ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D0,PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D1,PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D2,PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D3,PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D4,PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D5,PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D6,PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D7,PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NRD,PIN_EBI_NRD_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NWE,PIN_EBI_NWE_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NCS1,PIN_EBI_NCS1_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_LCD_RS,PIN_EBI_LCD_RS_FLAGS); #endif #ifdef CONF_BOARD_AAT3155 /* Configure Backlight control pin */ ioport_set_pin_dir(BOARD_AAT31XX_SET_GPIO, IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_SPI ioport_set_pin_peripheral_mode(SPI_MISO_GPIO, SPI_MISO_FLAGS); ioport_set_pin_peripheral_mode(SPI_MOSI_GPIO, SPI_MOSI_FLAGS); ioport_set_pin_peripheral_mode(SPI_SPCK_GPIO, SPI_SPCK_FLAGS); #ifdef CONF_BOARD_SPI_NPCS0 ioport_set_pin_peripheral_mode(SPI_NPCS0_GPIO, SPI_NPCS0_FLAGS); #endif #ifdef CONF_BOARD_SPI_NPCS3 #if defined(CONF_BOARD_SPI_NPCS3_GPIO) && defined(CONF_BOARD_SPI_NPCS3_FLAGS) ioport_set_pin_peripheral_mode(CONF_BOARD_SPI_NPCS3_GPIO, CONF_BOARD_SPI_NPCS3_FLAGS); #else ioport_set_pin_peripheral_mode(SPI_NPCS3_PA5_GPIO, SPI_NPCS3_PA5_FLAGS); #endif #endif #endif #if (defined(CONF_BOARD_TWI0) || defined(CONF_BOARD_QTOUCH)) ioport_set_pin_peripheral_mode(TWI0_DATA_GPIO, TWI0_DATA_FLAGS); ioport_set_pin_peripheral_mode(TWI0_CLK_GPIO, TWI0_CLK_FLAGS); #endif #if defined (CONF_BOARD_SD_MMC_HSMCI) /* Configure HSMCI pins */ ioport_set_pin_peripheral_mode(PIN_HSMCI_MCCDA_GPIO, PIN_HSMCI_MCCDA_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCCK_GPIO, PIN_HSMCI_MCCK_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA0_GPIO, PIN_HSMCI_MCDA0_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA1_GPIO, PIN_HSMCI_MCDA1_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA2_GPIO, PIN_HSMCI_MCDA2_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA3_GPIO, PIN_HSMCI_MCDA3_FLAGS); /* Configure SD/MMC card detect pin */ ioport_set_pin_peripheral_mode(SD_MMC_0_CD_GPIO, SD_MMC_0_CD_FLAGS); #endif #ifdef CONF_BOARD_TWI1 ioport_set_pin_peripheral_mode(TWI1_DATA_GPIO, TWI1_DATA_FLAGS); ioport_set_pin_peripheral_mode(TWI1_CLK_GPIO, TWI1_CLK_FLAGS); #endif #ifdef CONF_BOARD_KSZ8051MNL ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXC_IDX, PIN_KSZ8051MNL_RXC_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXC_IDX, PIN_KSZ8051MNL_TXC_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXEN_IDX, PIN_KSZ8051MNL_TXEN_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD3_IDX, PIN_KSZ8051MNL_TXD3_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD2_IDX, PIN_KSZ8051MNL_TXD2_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD1_IDX, PIN_KSZ8051MNL_TXD1_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD0_IDX, PIN_KSZ8051MNL_TXD0_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD3_IDX, PIN_KSZ8051MNL_RXD3_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD2_IDX, PIN_KSZ8051MNL_RXD2_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD1_IDX, PIN_KSZ8051MNL_RXD1_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD0_IDX, PIN_KSZ8051MNL_RXD0_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXER_IDX, PIN_KSZ8051MNL_RXER_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXDV_IDX, PIN_KSZ8051MNL_RXDV_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_CRS_IDX, PIN_KSZ8051MNL_CRS_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_COL_IDX, PIN_KSZ8051MNL_COL_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_MDC_IDX, PIN_KSZ8051MNL_MDC_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_MDIO_IDX, PIN_KSZ8051MNL_MDIO_FLAGS); ioport_set_pin_dir(PIN_KSZ8051MNL_INTRP_IDX, IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_TFDU4300_SD /* Configure IrDA transceiver shutdown pin */ ioport_set_pin_dir(PIN_IRDA_SD_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_level(PIN_IRDA_SD_IDX, IOPORT_PIN_LEVEL_HIGH); #endif #ifdef CONF_BOARD_ADM3485_RE /* Configure RS485 transceiver RE pin */ ioport_set_pin_dir(PIN_RE_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_level(PIN_RE_IDX, IOPORT_PIN_LEVEL_LOW); #endif #ifdef CONF_BOARD_ISO7816_RST /* Configure ISO7816 card reset pin */ ioport_set_pin_dir(PIN_ISO7816_RST_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_level(PIN_ISO7816_RST_IDX, IOPORT_PIN_LEVEL_LOW); #endif #ifdef CONF_BOARD_ISO7816 /* Configure ISO7816 interface TXD & SCK pin */ ioport_set_pin_peripheral_mode(PIN_USART1_TXD_IDX, PIN_USART1_TXD_FLAGS); ioport_set_pin_peripheral_mode(PIN_USART1_SCK_IDX, PIN_USART1_SCK_FLAGS); #endif #ifdef CONF_BOARD_NAND ioport_set_pin_peripheral_mode(PIN_EBI_NANDOE, PIN_EBI_NANDOE_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDWE, PIN_EBI_NANDWE_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDCLE, PIN_EBI_NANDCLE_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDALE, PIN_EBI_NANDALE_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_0, PIN_EBI_NANDIO_0_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_1, PIN_EBI_NANDIO_1_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_2, PIN_EBI_NANDIO_2_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_3, PIN_EBI_NANDIO_3_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_4, PIN_EBI_NANDIO_4_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_5, PIN_EBI_NANDIO_5_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_6, PIN_EBI_NANDIO_6_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_7, PIN_EBI_NANDIO_7_FLAGS); ioport_set_pin_dir(PIN_NF_CE_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(PIN_NF_RB_IDX, IOPORT_DIR_INPUT); ioport_set_pin_mode(PIN_NF_RB_IDX, IOPORT_MODE_PULLUP); #endif #ifdef CONF_BOARD_QTOUCH /* Configure CHANGE pin for QTouch device */ ioport_set_pin_input_mode(BOARD_QT_CHANGE_PIN_IDX, BOARD_QT_CHANGE_PIN_FLAGS, BOARD_QT_CHANGE_PIN_SENSE); #endif }
void board_init(void) { #ifndef CONF_BOARD_KEEP_WATCHDOG_AT_INIT /* Disable the watchdog */ WDT->WDT_MR = WDT_MR_WDDIS; #endif /* Initialize IOPORTs */ ioport_init(); /* Configure the pins connected to LEDs as output and set their * default initial state to high (LEDs off). */ ioport_set_pin_dir(LED0_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED0_GPIO, LED0_INACTIVE_LEVEL); ioport_set_pin_dir(LED1_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED1_GPIO, LED0_INACTIVE_LEVEL); ioport_set_pin_dir(LED2_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED2_GPIO, LED0_INACTIVE_LEVEL); /* Configure Push Button pins */ ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_1, GPIO_PUSH_BUTTON_1_FLAGS, GPIO_PUSH_BUTTON_1_SENSE); ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_2, GPIO_PUSH_BUTTON_2_FLAGS, GPIO_PUSH_BUTTON_2_SENSE); ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_3, GPIO_PUSH_BUTTON_3_FLAGS, GPIO_PUSH_BUTTON_3_SENSE); ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_4, GPIO_PUSH_BUTTON_4_FLAGS, GPIO_PUSH_BUTTON_4_SENSE); #ifdef CONF_BOARD_UART_CONSOLE /* Configure UART pins */ ioport_set_port_peripheral_mode(PINS_UART0_PORT, PINS_UART0, PINS_UART0_MASK); #endif #ifdef CONF_BOARD_PWM_LED0 /* Configure PWM LED0 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED0_GPIO, PIN_PWM_LED0_FLAGS); #endif #ifdef CONF_BOARD_PWM_LED1 /* Configure PWM LED1 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED1_GPIO, PIN_PWM_LED1_FLAGS); #endif #ifdef CONF_BOARD_PWM_LED2 /* Configure PWM LED2 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED2_GPIO, PIN_PWM_LED2_FLAGS); #endif #ifdef CONF_BOARD_PWM_LED3 /* Configure PWM LED3 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED3_GPIO, PIN_PWM_LED3_FLAGS); #endif #ifdef CONF_BOARD_USART_RXD /* Configure USART RXD pin */ ioport_set_pin_peripheral_mode(PIN_USART1_RXD_IDX, PIN_USART1_RXD_FLAGS); #endif #ifdef CONF_BOARD_USART_TXD /* Configure USART TXD pin */ ioport_set_pin_peripheral_mode(PIN_USART1_TXD_IDX, PIN_USART1_TXD_FLAGS); #endif #ifdef CONF_BOARD_USART_CTS /* Configure USART CTS pin */ ioport_set_pin_peripheral_mode(PIN_USART1_CTS_IDX, PIN_USART1_CTS_FLAGS); #endif #ifdef CONF_BOARD_USART_RTS /* Configure USART RTS pin */ ioport_set_pin_peripheral_mode(PIN_USART1_RTS_IDX, PIN_USART1_RTS_FLAGS); #endif #ifdef CONF_BOARD_USART_SCK /* Configure USART synchronous communication SCK pin */ ioport_set_pin_peripheral_mode(PIN_USART1_SCK_IDX, PIN_USART1_SCK_FLAGS); #endif #ifdef CONF_BOARD_ADM3312_EN /* Configure ADM3312 enable pin */ ioport_set_pin_dir(PIN_USART1_EN_IDX, IOPORT_DIR_OUTPUT); #ifdef CONF_BOARD_ADM3312_EN_DISABLE_AT_INIT ioport_set_pin_level(PIN_USART1_EN_IDX, PIN_USART1_EN_INACTIVE_LEVEL); #else ioport_set_pin_level(PIN_USART1_EN_IDX, PIN_USART1_EN_ACTIVE_LEVEL); #endif #endif #ifdef CONF_BOARD_CAN0 /* Configure the CAN0 TX and RX pins. */ ioport_set_pin_peripheral_mode(PIN_CAN0_RX_IDX, PIN_CAN0_RX_FLAGS); ioport_set_pin_peripheral_mode(PIN_CAN0_TX_IDX, PIN_CAN0_TX_FLAGS); /* Configure the transiver0 RS & EN pins. */ ioport_set_pin_dir(PIN_CAN0_TR_RS_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(PIN_CAN0_TR_EN_IDX, IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_CAN1 /* Configure the CAN1 TX and RX pin. */ ioport_set_pin_peripheral_mode(PIN_CAN1_RX_IDX, PIN_CAN1_RX_FLAGS); ioport_set_pin_peripheral_mode(PIN_CAN1_TX_IDX, PIN_CAN1_TX_FLAGS); /* Configure the transiver1 RS & EN pins. */ ioport_set_pin_dir(PIN_CAN1_TR_RS_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(PIN_CAN1_TR_EN_IDX, IOPORT_DIR_OUTPUT); #endif #if defined(CONF_BOARD_USB_PORT) # if defined(CONF_BOARD_USB_VBUS_DETECT) gpio_configure_pin(USB_VBUS_PIN, USB_VBUS_FLAGS); # endif #endif #ifdef CONF_BOARD_SPI ioport_set_pin_peripheral_mode(SPI_MISO_GPIO, SPI_MISO_FLAGS); ioport_set_pin_peripheral_mode(SPI_MOSI_GPIO, SPI_MOSI_FLAGS); ioport_set_pin_peripheral_mode(SPI_SPCK_GPIO, SPI_SPCK_FLAGS); #ifdef CONF_BOARD_SPI_NPCS0 ioport_set_pin_peripheral_mode(SPI_NPCS0_GPIO, SPI_NPCS0_FLAGS); #endif #ifdef CONF_BOARD_SPI_NPCS3 #if defined(CONF_BOARD_SPI_NPCS3_GPIO) && defined(CONF_BOARD_SPI_NPCS3_FLAGS) ioport_set_pin_peripheral_mode(CONF_BOARD_SPI_NPCS3_GPIO, CONF_BOARD_SPI_NPCS3_FLAGS); #else ioport_set_pin_peripheral_mode(SPI_NPCS3_PA5_GPIO, SPI_NPCS3_PA5_FLAGS); #endif #endif #endif #ifdef CONF_BOARD_TWI0 ioport_set_pin_peripheral_mode(TWI0_DATA_GPIO, TWI0_DATA_FLAGS); ioport_set_pin_peripheral_mode(TWI0_CLK_GPIO, TWI0_CLK_FLAGS); #endif #if defined (CONF_BOARD_SD_MMC_HSMCI) /* Configure HSMCI pins */ ioport_set_pin_peripheral_mode(PIN_HSMCI_MCCDA_GPIO, PIN_HSMCI_MCCDA_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCCK_GPIO, PIN_HSMCI_MCCK_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA0_GPIO, PIN_HSMCI_MCDA0_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA1_GPIO, PIN_HSMCI_MCDA1_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA2_GPIO, PIN_HSMCI_MCDA2_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA3_GPIO, PIN_HSMCI_MCDA3_FLAGS); /* Configure SD/MMC card detect pin */ ioport_set_pin_peripheral_mode(SD_MMC_0_CD_GPIO, SD_MMC_0_CD_FLAGS); #endif #ifdef CONF_BOARD_TWI1 ioport_set_pin_peripheral_mode(TWI1_DATA_GPIO, TWI1_DATA_FLAGS); ioport_set_pin_peripheral_mode(TWI1_CLK_GPIO, TWI1_CLK_FLAGS); #endif #ifdef CONF_BOARD_KSZ8051MNL ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXC_IDX, PIN_KSZ8051MNL_RXC_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXC_IDX, PIN_KSZ8051MNL_TXC_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXEN_IDX, PIN_KSZ8051MNL_TXEN_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD3_IDX, PIN_KSZ8051MNL_TXD3_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD2_IDX, PIN_KSZ8051MNL_TXD2_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD1_IDX, PIN_KSZ8051MNL_TXD1_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD0_IDX, PIN_KSZ8051MNL_TXD0_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD3_IDX, PIN_KSZ8051MNL_RXD3_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD2_IDX, PIN_KSZ8051MNL_RXD2_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD1_IDX, PIN_KSZ8051MNL_RXD1_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD0_IDX, PIN_KSZ8051MNL_RXD0_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXER_IDX, PIN_KSZ8051MNL_RXER_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXDV_IDX, PIN_KSZ8051MNL_RXDV_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_CRS_IDX, PIN_KSZ8051MNL_CRS_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_COL_IDX, PIN_KSZ8051MNL_COL_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_MDC_IDX, PIN_KSZ8051MNL_MDC_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_MDIO_IDX, PIN_KSZ8051MNL_MDIO_FLAGS); ioport_set_pin_dir(PIN_KSZ8051MNL_INTRP_IDX, IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_TFDU4300_SD /* Configure IrDA transceiver shutdown pin */ ioport_set_pin_dir(PIN_IRDA_SD_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_level(PIN_IRDA_SD_IDX, IOPORT_PIN_LEVEL_HIGH); #endif #ifdef CONF_BOARD_ADM3485_RE /* Configure RS485 transceiver RE pin */ ioport_set_pin_dir(PIN_RE_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_level(PIN_RE_IDX, IOPORT_PIN_LEVEL_LOW); #endif #ifdef CONF_BOARD_ISO7816_RST /* Configure ISO7816 card reset pin */ ioport_set_pin_dir(PIN_ISO7816_RST_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_level(PIN_ISO7816_RST_IDX, IOPORT_PIN_LEVEL_LOW); #endif #ifdef CONF_BOARD_ISO7816 /* Configure ISO7816 interface TXD & SCK pin */ ioport_set_pin_peripheral_mode(PIN_USART1_TXD_IDX, PIN_USART1_TXD_FLAGS); ioport_set_pin_peripheral_mode(PIN_USART1_SCK_IDX, PIN_USART1_SCK_FLAGS); #endif }
void board_init(void) { #ifndef CONF_BOARD_KEEP_WATCHDOG_AT_INIT /* Disable the watchdog */ WDT->WDT_MR = WDT_MR_WDDIS; #endif /* Initialize IOPORTs */ ioport_init(); /* Configure the pins connected to LED as output and set their * default initial state to high (LED off). */ ioport_set_pin_dir(LED0_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED0_GPIO, LED0_INACTIVE_LEVEL); /* Configure Push Button pins */ ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_1, GPIO_PUSH_BUTTON_1_FLAGS, GPIO_PUSH_BUTTON_1_SENSE); #ifdef CONF_BOARD_UART_CONSOLE /* Configure UART pins */ ioport_set_port_peripheral_mode(PINS_UART0_PORT, PINS_UART0, PINS_UART0_MASK); #endif #ifdef CONF_BOARD_PWM_LED0 /* Configure PWM LED0 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED0_GPIO, PIN_PWM_LED0_FLAGS); #endif #ifdef CONF_BOARD_CAN /* Configure the CAN1 TX and RX pin. */ ioport_set_pin_peripheral_mode(PIN_CAN1_RX_IDX, PIN_CAN1_RX_FLAGS); ioport_set_pin_peripheral_mode(PIN_CAN1_TX_IDX, PIN_CAN1_TX_FLAGS); /* Configure the transiver1 RS & EN pins. */ ioport_set_pin_dir(PIN_CAN1_TR_RS_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(PIN_CAN1_TR_EN_IDX, IOPORT_DIR_OUTPUT); #endif #if defined(CONF_BOARD_USB_PORT) # if defined(CONF_BOARD_USB_VBUS_DETECT) ioport_set_pin_peripheral_mode(USB_VBUS_PIN, USB_VBUS_FLAGS); # endif #endif #if defined (CONF_BOARD_SD_MMC_HSMCI) /* Configure HSMCI pins */ ioport_set_pin_peripheral_mode(PIN_HSMCI_MCCDA_GPIO, PIN_HSMCI_MCCDA_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCCK_GPIO, PIN_HSMCI_MCCK_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA0_GPIO, PIN_HSMCI_MCDA0_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA1_GPIO, PIN_HSMCI_MCDA1_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA2_GPIO, PIN_HSMCI_MCDA2_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA3_GPIO, PIN_HSMCI_MCDA3_FLAGS); #endif #ifdef CONF_BOARD_KSZ8051MNL ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXC_IDX, PIN_KSZ8051MNL_RXC_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXC_IDX, PIN_KSZ8051MNL_TXC_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXEN_IDX, PIN_KSZ8051MNL_TXEN_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD3_IDX, PIN_KSZ8051MNL_TXD3_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD2_IDX, PIN_KSZ8051MNL_TXD2_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD1_IDX, PIN_KSZ8051MNL_TXD1_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD0_IDX, PIN_KSZ8051MNL_TXD0_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD3_IDX, PIN_KSZ8051MNL_RXD3_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD2_IDX, PIN_KSZ8051MNL_RXD2_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD1_IDX, PIN_KSZ8051MNL_RXD1_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD0_IDX, PIN_KSZ8051MNL_RXD0_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXER_IDX, PIN_KSZ8051MNL_RXER_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXDV_IDX, PIN_KSZ8051MNL_RXDV_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_CRS_IDX, PIN_KSZ8051MNL_CRS_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_COL_IDX, PIN_KSZ8051MNL_COL_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_MDC_IDX, PIN_KSZ8051MNL_MDC_FLAGS); ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_MDIO_IDX, PIN_KSZ8051MNL_MDIO_FLAGS); ioport_set_pin_dir(PIN_KSZ8051MNL_INTRP_IDX, IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_NAND ioport_set_pin_peripheral_mode(PIN_EBI_NANDOE, PIN_EBI_NANDOE_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDWE, PIN_EBI_NANDWE_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDCLE, PIN_EBI_NANDCLE_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDALE, PIN_EBI_NANDALE_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_0, PIN_EBI_NANDIO_0_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_1, PIN_EBI_NANDIO_1_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_2, PIN_EBI_NANDIO_2_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_3, PIN_EBI_NANDIO_3_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_4, PIN_EBI_NANDIO_4_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_5, PIN_EBI_NANDIO_5_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_6, PIN_EBI_NANDIO_6_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_7, PIN_EBI_NANDIO_7_FLAGS); ioport_set_pin_dir(PIN_NF_CE_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(PIN_NF_RB_IDX, IOPORT_DIR_INPUT); ioport_set_pin_mode(PIN_NF_RB_IDX, IOPORT_MODE_PULLUP); #endif #ifdef CONF_BOARD_SRAM ioport_set_pin_peripheral_mode(PIN_EBI_NCS1, PIN_EBI_NCS1_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NCS3, PIN_EBI_NCS3_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NRD, PIN_EBI_NRD_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_NWE, PIN_EBI_NWE_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D0, PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D1, PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D2, PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D3, PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D4, PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D5, PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D6, PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D7, PIN_EBI_DATA_BUS_FLAGS); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A0, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A1, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A2, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A3, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A4, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A5, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A6, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A7, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A8, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A9, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A10, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A11, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A12, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A13, PIN_EBI_ADDR_BUS_FLAG1); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A14, PIN_EBI_ADDR_BUS_FLAG2); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A15, PIN_EBI_ADDR_BUS_FLAG2); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A16, PIN_EBI_ADDR_BUS_FLAG2); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A17, PIN_EBI_ADDR_BUS_FLAG2); ioport_set_pin_peripheral_mode(PIN_EBI_ADDR_BUS_A18, PIN_EBI_ADDR_BUS_FLAG2); #endif }
void board_init(void) { #ifndef CONF_BOARD_KEEP_WATCHDOG_AT_INIT /* Disable the watchdog */ WDT->WDT_MR = WDT_MR_WDDIS; #endif /* Select the crystal oscillator to be the source of the slow clock, * as it provides a more accurate frequency */ #ifdef CONF_BOARD_32K_XTAL supc_switch_sclk_to_32kxtal(SUPC, 0); #endif /* GPIO has been deprecated, the old code just keeps it for compatibility. * In new designs IOPORT is used instead. * Here IOPORT must be initialized for others to use before setting up IO. */ ioport_init(); /* Configure the pins connected to LEDs as output and set their * default initial state to high (LEDs off). */ ioport_set_pin_dir(LED0_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED0_GPIO, LED0_INACTIVE_LEVEL); ioport_set_pin_dir(LED1_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED1_GPIO, LED0_INACTIVE_LEVEL); /* Configure SPI pins */ ioport_set_pin_peripheral_mode(SPI0_MISO_GPIO, SPI0_MISO_FLAGS); ioport_set_pin_peripheral_mode(SPI0_MOSI_GPIO, SPI0_MOSI_FLAGS); ioport_set_pin_peripheral_mode(SPI0_SPCK_GPIO, SPI0_SPCK_FLAGS); ioport_set_pin_peripheral_mode(SPI0_NPCS0_GPIO, SPI0_NPCS0_FLAGS); /* Configure UART0 pins */ #ifdef CONF_BOARD_UART0 ioport_set_port_peripheral_mode(PINS_UART0_PORT, PINS_UART0, PINS_UART0_FLAGS); #endif /* Configure UART1 pins */ #if defined(CONF_BOARD_UART1) || defined(CONF_BOARD_UART_CONSOLE) ioport_set_port_peripheral_mode(PINS_UART1_PORT, PINS_UART1, PINS_UART1_FLAGS); #endif #ifdef CONF_BOARD_SPI1 ioport_set_pin_peripheral_mode(SPI1_MISO_GPIO, SPI1_MISO_FLAGS); ioport_set_pin_peripheral_mode(SPI1_MOSI_GPIO, SPI1_MOSI_FLAGS); ioport_set_pin_peripheral_mode(SPI1_SPCK_GPIO, SPI1_SPCK_FLAGS); ioport_set_pin_peripheral_mode(SPI1_NPCS0_GPIO, SPI1_NPCS0_FLAGS); #endif /* Configure TWI pins */ #ifdef CONF_BOARD_TWI0 ioport_set_pin_peripheral_mode(TWIO_DATA_GPIO, TWIO_DATA_FLAG); ioport_set_pin_peripheral_mode(TWIO_CLK_GPIO, TWIO_CLK_FLAG); #endif /* Configure USART0 pins */ #ifdef CONF_BOARD_USART0_RXD /* Configure USART0 RXD pin */ ioport_set_pin_peripheral_mode(PIN_USART0_RXD_IDX, PIN_USART0_RXD_FLAGS); #endif #ifdef CONF_BOARD_USART0_TXD /* Configure USART0 TXD pin */ ioport_set_pin_peripheral_mode(PIN_USART0_TXD_IDX, PIN_USART0_TXD_FLAGS); #endif /* Configure USART1 pins */ #ifdef CONF_BOARD_USART1_RXD /* Configure USART1 RXD pin */ ioport_set_pin_peripheral_mode(PIN_USART1_RXD_IDX, PIN_USART1_RXD_FLAGS); #endif #ifdef CONF_BOARD_USART1_TXD /* Configure USART1 TXD pin */ ioport_set_pin_peripheral_mode(PIN_USART1_TXD_IDX, PIN_USART1_TXD_FLAGS); #endif #ifdef CONF_BOARD_USART1_SCK /* Configure USART1 SCK pin */ ioport_set_pin_peripheral_mode(PIN_USART1_SCK_IDX, PIN_USART1_SCK_FLAGS); #endif #ifdef CONF_BOARD_USART1_RTS /* Configure USART1 RTS pin */ ioport_set_pin_peripheral_mode(PIN_USART1_RTS_IDX, PIN_USART1_RTS_FLAGS); #endif /* Configure Xplain PRO SLP pin */ #ifdef CONF_BOARD_XP_SLP ioport_set_pin_dir(XP_SLP_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(XP_SLP_GPIO, XP_SLP_INACTIVE_LEVEL); #endif /* Configure USB Detect pin */ #ifdef CONF_BOARD_USB_DETECT ioport_set_pin_input_mode(GPIO_USB_DETECT, GPIO_USB_DETECT_FLAGS, GPIO_USB_DETECT_SENSE); #endif /* Configure Shutdown Detect pin */ #ifdef CONF_SHUTDOWN_DETECT ioport_set_pin_dir(SHUTDOWN_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(SHUTDOWN_GPIO, SHUTDOWN_INACTIVE_LEVEL); #endif }
void board_init(void) { #ifndef CONF_BOARD_KEEP_WATCHDOG_AT_INIT /* Disable the watchdog */ WDT->WDT_MR = WDT_MR_WDDIS; #endif /* GPIO has been deprecated, the old code just keeps it for compatibility. * In new designs IOPORT is used instead. * Here IOPORT must be initialized for others to use before setting up IO. */ ioport_init(); #ifdef CONFIG_CPCLK_ENABLE /* Configure the pins connected to LEDs as output and set their * default initial state to high (LEDs off). */ ioport_set_pin_dir(LED0_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED0_GPIO, LED0_INACTIVE_LEVEL); ioport_set_pin_dir(LED1_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED1_GPIO, LED0_INACTIVE_LEVEL); ioport_set_pin_dir(LED2_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED2_GPIO, LED0_INACTIVE_LEVEL); #else #warning Please enable CONFIG_CPCLK_ENABLE in conf_clock.h to use LEDs (PIOC). #endif /* Configure Push Button pins */ ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_1, GPIO_PUSH_BUTTON_1_FLAGS, GPIO_PUSH_BUTTON_1_SENSE); ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_2, GPIO_PUSH_BUTTON_2_FLAGS, GPIO_PUSH_BUTTON_2_SENSE); /* Configure UART0 pins */ #ifdef CONF_BOARD_UART_CONSOLE ioport_set_pin_peripheral_mode(PIO_PB4_IDX, IOPORT_MODE_MUX_A); ioport_set_pin_peripheral_mode(PIO_PB5_IDX, IOPORT_MODE_MUX_A); #endif /* Configure LCD backlight */ #ifdef CONF_BOARD_BL ioport_set_pin_dir(LCD_BL_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LCD_BL_GPIO, LCD_BL_INACTIVE_LEVEL); #endif /* Configure PWM LED pins */ #ifdef CONF_BOARD_PWM_LED0 /* Configure PWM LED0 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED0_GPIO, PIN_PWM_LED0_FLAGS); #endif #ifdef CONF_BOARD_PWM_LED1 /* Configure PWM LED1 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED1_GPIO, PIN_PWM_LED1_FLAGS); #endif #ifdef CONF_BOARD_PWM_LED2 /* Configure PWM LED2 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED2_GPIO, PIN_PWM_LED2_FLAGS); #endif /* Configure SPI pins */ #ifdef CONF_BOARD_SPI0 ioport_set_pin_peripheral_mode(SPI0_MISO_GPIO, SPI0_MISO_FLAGS); ioport_set_pin_peripheral_mode(SPI0_MOSI_GPIO, SPI0_MOSI_FLAGS); ioport_set_pin_peripheral_mode(SPI0_SPCK_GPIO, SPI0_SPCK_FLAGS); #ifdef CONF_BOARD_SPI0_NPCS0 ioport_set_pin_peripheral_mode(SPI0_NPCS0_GPIO, SPI0_NPCS0_FLAGS); #endif #endif #ifdef CONF_BOARD_SPI1 ioport_set_pin_peripheral_mode(SPI1_MISO_GPIO, SPI1_MISO_FLAGS); ioport_set_pin_peripheral_mode(SPI1_MOSI_GPIO, SPI1_MOSI_FLAGS); ioport_set_pin_peripheral_mode(SPI1_SPCK_GPIO, SPI1_SPCK_FLAGS); #ifdef CONF_BOARD_SPI1_NPCS0 ioport_set_pin_peripheral_mode(SPI1_NPCS0_GPIO, SPI1_NPCS0_FLAGS); #endif #endif /* Configure TWI pins */ #if defined(CONF_BOARD_TWI0) || defined(CONF_BOARD_AT30TSE) ioport_set_pin_peripheral_mode(TWIO_DATA_GPIO, TWIO_DATA_FLAG); ioport_set_pin_peripheral_mode(TWIO_CLK_GPIO, TWIO_CLK_FLAG); #endif #ifdef CONF_BOARD_TWI1 ioport_set_pin_peripheral_mode(TWI1_DATA_GPIO, TWI1_DATA_FLAG); ioport_set_pin_peripheral_mode(TWI1_CLK_GPIO, TWI1_CLK_FLAG); #endif /* Configure USART pins */ #ifdef CONF_BOARD_USART_RXD /* Configure USART RXD pin */ ioport_set_pin_peripheral_mode(PIN_USART2_RXD_IDX, PIN_USART2_RXD_FLAGS); #endif #ifdef CONF_BOARD_USART_TXD /* Configure USART TXD pin */ ioport_set_pin_peripheral_mode(PIN_USART2_TXD_IDX, PIN_USART2_TXD_FLAGS); #endif #ifdef CONF_BOARD_USART_CTS /* Configure USART CTS pin */ ioport_set_pin_peripheral_mode(PIN_USART2_CTS_IDX, PIN_USART2_CTS_FLAGS); #endif #ifdef CONF_BOARD_USART_RTS /* Configure USART RTS pin */ ioport_set_pin_peripheral_mode(PIN_USART2_RTS_IDX, PIN_USART2_RTS_FLAGS); #endif #ifdef CONF_BOARD_USART_SCK /* Configure USART synchronous communication SCK pin */ ioport_set_pin_peripheral_mode(PIN_USART2_SCK_IDX, PIN_USART2_SCK_FLAGS); #endif #ifdef CONF_BOARD_TFDU4300_SD /* Configure IrDA transceiver shutdown pin */ ioport_set_pin_dir(PIN_IRDA_SD_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_level(PIN_IRDA_SD_IDX, IOPORT_PIN_LEVEL_HIGH); #endif #ifdef CONF_BOARD_ADM3485_RE /* Configure RS485 transceiver RE pin */ ioport_set_pin_dir(PIN_RE_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_level(PIN_RE_IDX, IOPORT_PIN_LEVEL_LOW); #endif #ifdef CONF_BOARD_ISO7816_RST /* Configure ISO7816 card reset pin */ ioport_set_pin_dir(PIN_ISO7816_RST_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_level(PIN_ISO7816_RST_IDX, IOPORT_PIN_LEVEL_LOW); #endif #ifdef CONF_BOARD_ISO7816 /* Configure ISO7816 interface TXD & SCK pin */ ioport_set_pin_peripheral_mode(PIN_USART2_TXD_IDX, PIN_USART2_TXD_FLAGS); ioport_set_pin_peripheral_mode(PIN_USART2_SCK_IDX, PIN_USART2_SCK_FLAGS); #endif /* Configure ADC pins */ #ifdef CONF_BOARD_ADC /* TC TIOA configuration */ ioport_set_pin_peripheral_mode(PIN_TC0_TIOA0,PIN_TC0_TIOA0_FLAGS); /* ADC Trigger configuration */ ioport_set_pin_peripheral_mode(PINS_ADC_TRIG, PINS_ADC_TRIG_FLAG); #endif /* Configure EBI pins */ }
void board_init(void) { #ifndef CONF_BOARD_KEEP_WATCHDOG_AT_INIT /* Disable the watchdog */ WDT->WDT_MR = WDT_MR_WDDIS; #endif /* Initialize IOPORTs */ ioport_init(); /* Configure the pins connected to LED as output and set their * default initial state to high (LED off). */ ioport_set_pin_dir(LED0_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED0_GPIO, LED0_INACTIVE_LEVEL); ioport_set_pin_dir(LED1_GPIO, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED1_GPIO, LED0_INACTIVE_LEVEL); /* Configure Push Button pins */ ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_1, GPIO_PUSH_BUTTON_1_FLAGS, GPIO_PUSH_BUTTON_1_SENSE); #ifdef CONF_BOARD_UART_CONSOLE /* Configure UART pins */ ioport_set_pin_peripheral_mode(USART1_RXD_GPIO, USART1_RXD_FLAGS); MATRIX->CCFG_SYSIO |= CCFG_SYSIO_SYSIO4; ioport_set_pin_peripheral_mode(USART1_TXD_GPIO, USART1_TXD_FLAGS); #endif #ifdef CONF_BOARD_TWIHS0 ioport_set_pin_peripheral_mode(TWIHS0_DATA_GPIO, TWIHS0_DATA_FLAGS); ioport_set_pin_peripheral_mode(TWIHS0_CLK_GPIO, TWIHS0_CLK_FLAGS); #endif #ifdef CONF_BOARD_CAN0 /* Configure the CAN0 TX and RX pins. */ ioport_set_pin_peripheral_mode(PIN_CAN0_RX_IDX, PIN_CAN0_RX_FLAGS); ioport_set_pin_peripheral_mode(PIN_CAN0_TX_IDX, PIN_CAN0_TX_FLAGS); /* Configure the transiver0 RS & EN pins. */ ioport_set_pin_dir(PIN_CAN0_TR_RS_IDX, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(PIN_CAN0_TR_EN_IDX, IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_CAN1 /* Configure the CAN1 TX and RX pin. */ ioport_set_pin_peripheral_mode(PIN_CAN1_RX_IDX, PIN_CAN1_RX_FLAGS); ioport_set_pin_peripheral_mode(PIN_CAN1_TX_IDX, PIN_CAN1_TX_FLAGS); #endif #ifdef CONF_BOARD_SPI ioport_set_pin_peripheral_mode(SPI0_MISO_GPIO, SPI0_MISO_FLAGS); ioport_set_pin_peripheral_mode(SPI0_MOSI_GPIO, SPI0_MOSI_FLAGS); ioport_set_pin_peripheral_mode(SPI0_NPCS0_GPIO, SPI0_NPCS0_FLAGS); ioport_set_pin_peripheral_mode(SPI0_SPCK_GPIO, SPI0_SPCK_FLAGS); #endif #ifdef CONF_BOARD_QSPI ioport_set_pin_peripheral_mode(QSPI_QSCK_GPIO, QSPI_QSCK_FLAGS); ioport_set_pin_peripheral_mode(QSPI_QCS_GPIO, QSPI_QCS_FLAGS); ioport_set_pin_peripheral_mode(QSPI_QIO0_GPIO, QSPI_QIO0_FLAGS); ioport_set_pin_peripheral_mode(QSPI_QIO1_GPIO, QSPI_QIO1_FLAGS); ioport_set_pin_peripheral_mode(QSPI_QIO2_GPIO, QSPI_QIO2_FLAGS); ioport_set_pin_peripheral_mode(QSPI_QIO3_GPIO, QSPI_QIO3_FLAGS); #endif #ifdef CONF_BOARD_PWM_LED0 /* Configure PWM LED0 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED0_GPIO, PIN_PWM_LED0_FLAGS); #endif #ifdef CONF_BOARD_PWM_LED1 /* Configure PWM LED1 pin */ ioport_set_pin_peripheral_mode(PIN_PWM_LED1_GPIO, PIN_PWM_LED1_FLAGS); #endif #ifdef CONF_BOARD_USART_RXD /* Configure USART RXD pin */ ioport_set_pin_peripheral_mode(USART0_RXD_GPIO, USART0_RXD_FLAGS); #endif #ifdef CONF_BOARD_USART_TXD /* Configure USART TXD pin */ ioport_set_pin_peripheral_mode(USART0_TXD_GPIO, USART0_TXD_FLAGS); #endif #ifdef CONF_BOARD_USART_SCK /* Configure USART synchronous communication SCK pin */ ioport_set_pin_peripheral_mode(PIN_USART0_SCK_IDX,PIN_USART0_SCK_FLAGS); #endif #ifdef CONF_BOARD_USART_CTS /* Configure USART synchronous communication CTS pin */ ioport_set_pin_peripheral_mode(PIN_USART0_CTS_IDX,PIN_USART0_CTS_FLAGS); #endif #ifdef CONF_BOARD_USART_RTS /* Configure USART RTS pin */ ioport_set_pin_peripheral_mode(PIN_USART0_RTS_IDX, PIN_USART0_RTS_FLAGS); #endif #ifdef CONF_BOARD_SD_MMC_HSMCI /* Configure HSMCI pins */ ioport_set_pin_peripheral_mode(PIN_HSMCI_MCCDA_GPIO, PIN_HSMCI_MCCDA_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCCK_GPIO, PIN_HSMCI_MCCK_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA0_GPIO, PIN_HSMCI_MCDA0_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA1_GPIO, PIN_HSMCI_MCDA1_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA2_GPIO, PIN_HSMCI_MCDA2_FLAGS); ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA3_GPIO, PIN_HSMCI_MCDA3_FLAGS); ioport_set_pin_peripheral_mode(SD_MMC_0_CD_GPIO, SD_MMC_0_CD_FLAGS); #endif #ifdef CONF_BOARD_ILI9488 /**LCD pin configure on EBI*/ pio_configure(PIN_EBI_RESET_PIO, PIN_EBI_RESET_TYPE, PIN_EBI_RESET_MASK, PIN_EBI_RESET_ATTRI); pio_configure(PIN_EBI_CDS_PIO, PIN_EBI_CDS_TYPE, PIN_EBI_CDS_MASK, PIN_EBI_CDS_ATTRI); pio_configure(PIN_EBI_DATAL_PIO, PIN_EBI_DATAL_TYPE, PIN_EBI_DATAL_MASK, PIN_EBI_DATAL_ATTRI); pio_configure(PIN_EBI_DATAH_0_PIO, PIN_EBI_DATAH_0_TYPE, PIN_EBI_DATAH_0_MASK, PIN_EBI_DATAH_0_ATTRI); pio_configure(PIN_EBI_DATAH_1_PIO, PIN_EBI_DATAH_1_TYPE, PIN_EBI_DATAH_1_MASK, PIN_EBI_DATAH_1_ATTRI); pio_configure(PIN_EBI_NWE_PIO, PIN_EBI_NWE_TYPE, PIN_EBI_NWE_MASK, PIN_EBI_NWE_ATTRI); pio_configure(PIN_EBI_NRD_PIO, PIN_EBI_NRD_TYPE, PIN_EBI_NRD_MASK, PIN_EBI_NRD_ATTRI); pio_configure(PIN_EBI_CS_PIO, PIN_EBI_CS_TYPE, PIN_EBI_CS_MASK, PIN_EBI_CS_ATTRI); pio_configure(PIN_EBI_BACKLIGHT_PIO, PIN_EBI_BACKLIGHT_TYPE, PIN_EBI_BACKLIGHT_MASK, PIN_EBI_BACKLIGHT_ATTRI); pio_set(PIN_EBI_BACKLIGHT_PIO, PIN_EBI_BACKLIGHT_MASK); #endif #if (defined CONF_BOARD_USB_PORT) # if defined(CONF_BOARD_USB_VBUS_DETECT) ioport_set_pin_dir(USB_VBUS_PIN, IOPORT_DIR_INPUT); # endif # if defined(CONF_BOARD_USB_ID_DETECT) ioport_set_pin_dir(USB_ID_PIN, IOPORT_DIR_INPUT); # endif #endif #ifdef CONF_BOARD_SDRAMC pio_configure_pin(SDRAM_BA0_PIO, SDRAM_BA0_FLAGS); pio_configure_pin(SDRAM_SDCK_PIO, SDRAM_SDCK_FLAGS); pio_configure_pin(SDRAM_SDCKE_PIO, SDRAM_SDCKE_FLAGS); pio_configure_pin(SDRAM_SDCS_PIO, SDRAM_SDCS_FLAGS); pio_configure_pin(SDRAM_RAS_PIO, SDRAM_RAS_FLAGS); pio_configure_pin(SDRAM_CAS_PIO, SDRAM_CAS_FLAGS); pio_configure_pin(SDRAM_SDWE_PIO, SDRAM_SDWE_FLAGS); pio_configure_pin(SDRAM_NBS0_PIO, SDRAM_NBS0_FLAGS); pio_configure_pin(SDRAM_NBS1_PIO, SDRAM_NBS1_FLAGS); pio_configure_pin(SDRAM_A2_PIO, SDRAM_A_FLAGS); pio_configure_pin(SDRAM_A3_PIO, SDRAM_A_FLAGS); pio_configure_pin(SDRAM_A4_PIO, SDRAM_A_FLAGS); pio_configure_pin(SDRAM_A5_PIO, SDRAM_A_FLAGS); pio_configure_pin(SDRAM_A6_PIO, SDRAM_A_FLAGS); pio_configure_pin(SDRAM_A7_PIO, SDRAM_A_FLAGS); pio_configure_pin(SDRAM_A8_PIO, SDRAM_A_FLAGS); pio_configure_pin(SDRAM_A9_PIO, SDRAM_A_FLAGS); pio_configure_pin(SDRAM_A10_PIO, SDRAM_A_FLAGS); pio_configure_pin(SDRAM_A11_PIO, SDRAM_A_FLAGS); pio_configure_pin(SDRAM_SDA10_PIO, SDRAM_SDA10_FLAGS); pio_configure_pin(SDRAM_D0_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D1_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D2_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D3_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D4_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D5_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D6_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D7_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D8_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D9_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D10_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D11_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D12_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D13_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D14_PIO, SDRAM_D_FLAGS); pio_configure_pin(SDRAM_D15_PIO, SDRAM_D_FLAGS); MATRIX->CCFG_SMCNFCS = CCFG_SMCNFCS_SDRAMEN; #endif #ifdef CONF_BOARD_CONFIG_MPU_AT_INIT _setup_memory_region(); #endif }