static void nps_enet_read_rx_fifo(struct net_device *ndev,
unsigned char *dst, u32 length)
{
struct nps_enet_priv *priv = netdev_priv(ndev);
s32 i, last = length & (sizeof(u32) - 1);
u32 *reg = (u32 *)dst, len = length / sizeof(u32);
bool dst_is_aligned = IS_ALIGNED((unsigned long)dst, sizeof(u32));
/* In case dst is not aligned we need an intermediate buffer */
if (dst_is_aligned) {
ioread32_rep(priv->regs_base + NPS_ENET_REG_RX_BUF, reg, len);
reg += len;
}
else { /* !dst_is_aligned */
for (i = 0; i < len; i++, reg++) {
u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
put_unaligned_be32(buf, reg);
}
}
/* copy last bytes (if any) */
if (last) {
u32 buf;
ioread32_rep(priv->regs_base + NPS_ENET_REG_RX_BUF, &buf, 1);
memcpy((u8 *)reg, &buf, last);
}
}
static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_fmtdesc *f)
{
int ret;
struct marucam_device *dev = priv;
if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) {
return -EINVAL;
}
mutex_lock(&dev->mlock);
iowrite32(0, dev->mmregs + MARUCAM_DTC);
iowrite32(f->index, dev->mmregs + MARUCAM_S_DATA);
iowrite32(0, dev->mmregs + MARUCAM_ENUM_FMT);
ret = (int)ioread32(dev->mmregs + MARUCAM_ENUM_FMT);
if (ret) {
mutex_unlock(&dev->mlock);
return -ret;
}
f->index = ioread32(dev->mmregs + MARUCAM_G_DATA);
f->flags = ioread32(dev->mmregs + MARUCAM_G_DATA);
f->pixelformat = ioread32(dev->mmregs + MARUCAM_G_DATA);
ioread32_rep(dev->mmregs + MARUCAM_G_DATA, f->description, 8);
mutex_unlock(&dev->mlock);
return 0;
}
/** read a block of 32bit words from the DSP HPI port using auto-inc mode
*/
static void hpi_read_block(struct dsp_obj *pdo, u32 address, u32 *pdata,
u32 length)
{
u16 length16 = length - 1;
if (length == 0)
return;
if (hpi_set_address(pdo, address))
return;
ioread32_rep(pdo->prHPI_data_auto_inc, pdata, length16);
/* take care of errata in revB DSP (2.0.1) */
/* must end with non auto-inc */
*(pdata + length - 1) = ioread32(pdo->prHPI_data);
}
static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain)
{
void __iomem *base = host->base;
char *ptr = buffer;
u32 status = readl(host->base + MMCISTATUS);
int host_remain = host->size;
do {
int count = host->get_rx_fifocnt(host, status, host_remain);
if (count > remain)
count = remain;
if (count <= 0)
break;
/*
* SDIO especially may want to send something that is
* not divisible by 4 (as opposed to card sectors
* etc). Therefore make sure to always read the last bytes
* while only doing full 32-bit reads towards the FIFO.
*/
if (unlikely(count & 0x3)) {
if (count < 4) {
unsigned char buf[4];
ioread32_rep(base + MMCIFIFO, buf, 1);
memcpy(ptr, buf, count);
} else {
ioread32_rep(base + MMCIFIFO, ptr, count >> 2);
count &= ~0x3;
}
} else {
ioread32_rep(base + MMCIFIFO, ptr, count >> 2);
}
ptr += count;
remain -= count;
host_remain -= count;
if (remain == 0)
break;
status = readl(base + MMCISTATUS);
} while (status & MCI_RXDATAAVLBL);
/** read a block of 32bit words from the DSP HPI port using auto-inc mode
*/
static void HpiReadBlock(
struct dsp_obj *pdo,
u32 dwAddress,
u32 *pdwData,
u32 dwLength
)
{
u16 wLength = dwLength - 1;
if (dwLength == 0)
return;
if (HpiSetAddress(pdo, dwAddress))
return;
ioread32_rep(pdo->prHPIDataAutoInc, pdwData, wLength);
/* take care of errata in revB DSP (2.0.1) */
/* must end with non auto-inc */
*(pdwData + dwLength - 1) = ioread32(pdo->prHPIData);
}
/* controls
*
*/
static int vidioc_queryctrl(struct file *file, void *priv,
struct v4l2_queryctrl *qc)
{
int ret;
struct marucam_device *dev = priv;
mutex_lock(&dev->mlock);
switch (qc->id) {
/* we only support followed items. */
case V4L2_CID_BRIGHTNESS:
case V4L2_CID_CONTRAST:
case V4L2_CID_SATURATION:
case V4L2_CID_SHARPNESS:
break;
default:
mutex_unlock(&dev->mlock);
return -EINVAL;
}
iowrite32(0, dev->mmregs + MARUCAM_DTC);
iowrite32(qc->id, dev->mmregs + MARUCAM_S_DATA);
iowrite32(0, dev->mmregs + MARUCAM_QCTRL);
ret = (int)ioread32(dev->mmregs + MARUCAM_QCTRL);
if (ret) {
mutex_unlock(&dev->mlock);
return -ret;
}
qc->id = ioread32(dev->mmregs + MARUCAM_G_DATA);
qc->minimum = ioread32(dev->mmregs + MARUCAM_G_DATA);
qc->maximum = ioread32(dev->mmregs + MARUCAM_G_DATA);
qc->step = ioread32(dev->mmregs + MARUCAM_G_DATA);
qc->default_value = ioread32(dev->mmregs + MARUCAM_G_DATA);
qc->flags = ioread32(dev->mmregs + MARUCAM_G_DATA);
ioread32_rep(dev->mmregs + MARUCAM_G_DATA, qc->name, 8);
mutex_unlock(&dev->mlock);
return 0;
}
void insl(unsigned long port, void *dst, unsigned long count)
{
ioread32_rep(ioport_map(port, 4), dst, count);
}