/* blocking notifier support */ static int musb_otg_notifications(struct notifier_block *nb, unsigned long event, void *unused) { struct musb *musb = container_of(nb, struct musb, nb); struct device *dev = musb->controller; struct musb_hdrc_platform_data *pdata = dev->platform_data; struct omap_musb_board_data *data = pdata->board_data; switch (event) { case USB_EVENT_ID: dev_dbg(musb->controller, "ID GND\n"); if (is_otg_enabled(musb)) { if (musb->gadget_driver) { pm_runtime_get_sync(musb->controller); otg_init(musb->xceiv); omap2430_musb_set_vbus(musb, 1); } } else { pm_runtime_get_sync(musb->controller); otg_init(musb->xceiv); omap2430_musb_set_vbus(musb, 1); } break; case USB_EVENT_VBUS: dev_dbg(musb->controller, "VBUS Connect\n"); if (musb->gadget_driver) pm_runtime_get_sync(musb->controller); otg_init(musb->xceiv); break; case USB_EVENT_NONE: dev_dbg(musb->controller, "VBUS Disconnect\n"); if (is_otg_enabled(musb) || is_peripheral_enabled(musb)) if (musb->gadget_driver) { pm_runtime_mark_last_busy(musb->controller); pm_runtime_put_autosuspend(musb->controller); } if (data->interface_type == MUSB_INTERFACE_UTMI) { if (musb->xceiv->set_vbus) otg_set_vbus(musb->xceiv, 0); } otg_shutdown(musb->xceiv); break; default: dev_dbg(musb->controller, "ID float\n"); return NOTIFY_DONE; } return NOTIFY_OK; }
static void am35x_musb_try_idle(struct musb *musb, unsigned long timeout) { static unsigned long last_timer; if (!is_otg_enabled(musb)) return; if (timeout == 0) timeout = jiffies + msecs_to_jiffies(3); /* Never idle if active, or when VBUS timeout is not set as host */ if (musb->is_active || (musb->a_wait_bcon == 0 && musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { dev_dbg(musb->controller, "%s active, deleting timer\n", otg_state_string(musb->xceiv->state)); del_timer(&otg_workaround); last_timer = jiffies; return; } if (time_after(last_timer, timeout) && timer_pending(&otg_workaround)) { dev_dbg(musb->controller, "Longer idle timer already pending, ignoring...\n"); return; } last_timer = timeout; dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", otg_state_string(musb->xceiv->state), jiffies_to_msecs(timeout - jiffies)); mod_timer(&otg_workaround, timeout); }
static void davinci_musb_enable(struct musb *musb) { u32 tmp, old, val; /* workaround: setup irqs through both register sets */ tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK) << DAVINCI_USB_TXINT_SHIFT; musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); old = tmp; tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK)) << DAVINCI_USB_RXINT_SHIFT; musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); tmp |= old; val = ~MUSB_INTR_SOF; tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT); musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); if (is_dma_capable() && !dma_off) printk(KERN_WARNING "%s %s: dma not reactivated\n", __FILE__, __func__); else dma_off = 0; /* force a DRVVBUS irq so we can start polling for ID change */ if (is_otg_enabled(musb)) musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG, DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT); }
void musb_root_disconnect(struct musb *musb) { musb->port1_status = USB_PORT_STAT_POWER | (USB_PORT_STAT_C_CONNECTION << 16); usb_hcd_poll_rh_status(musb_to_hcd(musb)); musb->is_active = 0; switch (musb->xceiv->state) { case OTG_STATE_A_SUSPEND: #ifdef CONFIG_USB_MUSB_OTG if (is_otg_enabled(musb) && musb->xceiv->host->b_hnp_enable) { musb->xceiv->state = OTG_STATE_A_PERIPHERAL; musb->g.is_a_peripheral = 1; break; } #endif /* FALLTHROUGH */ case OTG_STATE_A_HOST: musb->xceiv->state = OTG_STATE_A_WAIT_BCON; musb->is_active = 0; break; case OTG_STATE_A_WAIT_VFALL: musb->xceiv->state = OTG_STATE_B_IDLE; break; default: DBG(1, "host disconnect (%s)\n", otg_state_string(musb)); } }
static void davinci_musb_enable(struct musb *musb) { u32 tmp, old, val; tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK) << DAVINCI_USB_TXINT_SHIFT; musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); old = tmp; tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK)) << DAVINCI_USB_RXINT_SHIFT; musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); tmp |= old; val = ~MUSB_INTR_SOF; tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT); musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); if (is_dma_capable() && !dma_off) printk(KERN_WARNING "%s %s: dma not reactivated\n", __FILE__, __func__); else dma_off = 0; if (is_otg_enabled(musb)) musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG, DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT); }
static void musb_otg_notifier_work(struct work_struct *data_notifier_work) { struct musb *musb = container_of(data_notifier_work, struct musb, otg_notifier_work); struct device *dev = musb->controller; struct musb_hdrc_platform_data *pdata = dev->platform_data; struct omap_musb_board_data *data = pdata->board_data; switch (musb->xceiv_event) { case USB_EVENT_ID: dev_dbg(musb->controller, "ID GND\n"); if (!is_otg_enabled(musb) || musb->gadget_driver) { pm_runtime_get_sync(musb->controller); usb_phy_init(musb->xceiv); omap2430_musb_set_vbus(musb, 1); } break; case USB_EVENT_VBUS: dev_dbg(musb->controller, "VBUS Connect\n"); if (musb->gadget_driver) pm_runtime_get_sync(musb->controller); usb_phy_init(musb->xceiv); break; case USB_EVENT_NONE: dev_dbg(musb->controller, "VBUS Disconnect\n"); if (is_otg_enabled(musb) || is_peripheral_enabled(musb)) if (musb->gadget_driver) { pm_runtime_mark_last_busy(musb->controller); pm_runtime_put_autosuspend(musb->controller); } if (data->interface_type == MUSB_INTERFACE_UTMI) { if (musb->xceiv->otg->set_vbus) otg_set_vbus(musb->xceiv->otg, 0); } usb_phy_shutdown(musb->xceiv); break; default: dev_dbg(musb->controller, "ID float\n"); } }
/* blocking notifier support */ static int musb_otg_notifications(struct notifier_block *nb, unsigned long event, void *unused) { struct musb *musb = container_of(nb, struct musb, nb); struct device *dev = musb->controller; struct musb_hdrc_platform_data *pdata = dev->platform_data; struct omap_musb_board_data *data = pdata->board_data; switch (event) { case USB_EVENT_ID: DBG(4, "ID GND\n"); if (is_otg_enabled(musb)) { #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (musb->gadget_driver) { otg_init(musb->xceiv); if (data->interface_type == MUSB_INTERFACE_UTMI) omap2430_musb_set_vbus(musb, 1); } #endif } else { otg_init(musb->xceiv); if (data->interface_type == MUSB_INTERFACE_UTMI) omap2430_musb_set_vbus(musb, 1); } break; case USB_EVENT_VBUS: DBG(4, "VBUS Connect\n"); otg_init(musb->xceiv); break; case USB_EVENT_NONE: DBG(4, "VBUS Disconnect\n"); if (data->interface_type == MUSB_INTERFACE_UTMI) { if (musb->xceiv->set_vbus) otg_set_vbus(musb->xceiv, 0); } otg_shutdown(musb->xceiv); break; default: DBG(4, "ID float\n"); return NOTIFY_DONE; } return NOTIFY_OK; }
/** * da8xx_musb_enable - enable interrupts */ static void da8xx_musb_enable(struct musb *musb) { void __iomem *reg_base = musb->ctrl_base; u32 mask; /* Workaround: setup IRQs through both register sets. */ mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) | ((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) | DA8XX_INTR_USB_MASK; musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask); /* Force the DRVVBUS IRQ so we can start polling for ID change. */ if (is_otg_enabled(musb)) musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG, DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT); }
/* * am35x_musb_enable - enable interrupts */ static void am35x_musb_enable(struct musb *musb) { void __iomem *reg_base = musb->ctrl_base; u32 epmask; /* Workaround: setup IRQs through both register sets. */ epmask = ((musb->epmask & AM35X_TX_EP_MASK) << AM35X_INTR_TX_SHIFT) | ((musb->epmask & AM35X_RX_EP_MASK) << AM35X_INTR_RX_SHIFT); musb_writel(reg_base, EP_INTR_MASK_SET_REG, epmask); musb_writel(reg_base, CORE_INTR_MASK_SET_REG, AM35X_INTR_USB_MASK); /* Force the DRVVBUS IRQ so we can start polling for ID change. */ if (is_otg_enabled(musb)) musb_writel(reg_base, CORE_INTR_SRC_SET_REG, AM35X_INTR_DRVVBUS << AM35X_INTR_USB_SHIFT); }
static void musb_port_suspend(struct musb *musb, bool do_suspend) { u8 power; void __iomem *mbase = musb->mregs; struct device *dev = musb->controller; struct musb_hdrc_platform_data *plat = dev->platform_data; struct omap_musb_board_data *data = plat->board_data; if (!is_host_active(musb)) return; /* NOTE: this doesn't necessarily put PHY into low power mode, * turning off its clock; that's a function of PHY integration and * MUSB_POWER_ENSUSPEND. PHY may need a clock (sigh) to detect * SE0 changing to connect (J) or wakeup (K) states. */ power = musb_readb(mbase, MUSB_POWER); if (do_suspend) { int retries = 10000; power &= ~MUSB_POWER_RESUME; power |= MUSB_POWER_SUSPENDM; if (data->interface_type == MUSB_INTERFACE_UTMI) power |= MUSB_POWER_ENSUSPEND; musb_writeb(mbase, MUSB_POWER, power); /* Needed for OPT A tests */ power = musb_readb(mbase, MUSB_POWER); while (power & MUSB_POWER_SUSPENDM) { power = musb_readb(mbase, MUSB_POWER); if (retries-- < 1) break; } DBG(3, "Root port suspended, power %02x\n", power); musb->port1_status |= USB_PORT_STAT_SUSPEND; switch (musb->xceiv->state) { case OTG_STATE_A_HOST: musb->xceiv->state = OTG_STATE_A_SUSPEND; musb->is_active = is_otg_enabled(musb) && musb->xceiv->host->b_hnp_enable; if (musb->is_active) mod_timer(&musb->otg_timer, jiffies + msecs_to_jiffies( OTG_TIME_A_AIDL_BDIS)); musb_platform_try_idle(musb, 0); /* * disable the phy clock when the device is supended. * this will allow the core retention */ otg_set_clk(musb->xceiv, 0); break; #ifdef CONFIG_USB_MUSB_OTG case OTG_STATE_B_HOST: musb->xceiv->state = OTG_STATE_B_WAIT_ACON; musb->is_active = is_otg_enabled(musb) && musb->xceiv->host->b_hnp_enable; musb_platform_try_idle(musb, 0); break; #endif default: DBG(1, "bogus rh suspend? %s\n", otg_state_string(musb)); } } else if (power & MUSB_POWER_SUSPENDM) { power &= ~MUSB_POWER_SUSPENDM; if (data->interface_type == MUSB_INTERFACE_UTMI) power &= ~MUSB_POWER_ENSUSPEND; power |= MUSB_POWER_RESUME; musb_writeb(mbase, MUSB_POWER, power); otg_set_clk(musb->xceiv, 1); DBG(3, "Root port resuming, power %02x\n", power); /* later, GetPortStatus will stop RESUME signaling */ musb->port1_status |= MUSB_PORT_STAT_RESUME; musb->rh_timer = jiffies + msecs_to_jiffies(20); } }
static void musb_otg_notifier_work(struct work_struct *data_notifier_work) { struct musb_otg_work *otg_work = container_of(data_notifier_work, struct musb_otg_work, work); struct musb *musb = otg_work->musb; struct device *dev = musb->controller; struct musb_hdrc_platform_data *pdata = dev->platform_data; struct omap_musb_board_data *data = pdata->board_data; enum usb_xceiv_events xceiv_event = otg_work->xceiv_event; kfree(otg_work); switch (xceiv_event) { case USB_EVENT_ID: dev_dbg(musb->controller, "ID GND\n"); if (is_otg_enabled(musb)) { #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (musb->gadget_driver) { pm_runtime_get_sync(musb->controller); otg_init(musb->xceiv); omap2430_musb_set_vbus(musb, 1); } #endif } else { pm_runtime_get_sync(musb->controller); otg_init(musb->xceiv); omap2430_musb_set_vbus(musb, 1); } break; case USB_EVENT_CHARGER: dev_dbg(musb->controller, "Dedicated charger connect\n"); musb->is_ac_charger = true; break; case USB_EVENT_VBUS: dev_dbg(musb->controller, "VBUS Connect\n"); #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (musb->gadget_driver) pm_runtime_get_sync(musb->controller); #endif otg_init(musb->xceiv); break; case USB_EVENT_NONE: if (musb->is_ac_charger) { dev_dbg(musb->controller, "Dedicated charger disconnect\n"); musb->is_ac_charger = false; break; } dev_dbg(musb->controller, "VBUS Disconnect\n"); #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (is_otg_enabled(musb) || is_peripheral_enabled(musb)) if (musb->gadget_driver) #endif { pm_runtime_mark_last_busy(musb->controller); pm_runtime_put_autosuspend(musb->controller); } if (data->interface_type == MUSB_INTERFACE_UTMI) { omap2430_musb_set_vbus(musb, 0); if (musb->xceiv->set_vbus) otg_set_vbus(musb->xceiv, 0); } otg_shutdown(musb->xceiv); break; default: dev_dbg(musb->controller, "ID float\n"); return; } return; }
static void musb_otg_notifier_work(struct work_struct *data_notifier_work) { struct musb_otg_work *otg_work = container_of(data_notifier_work, struct musb_otg_work, work); struct musb *musb = otg_work->musb; struct device *dev = musb->controller; struct musb_hdrc_platform_data *pdata = dev->platform_data; struct omap_musb_board_data *data = pdata->board_data; enum usb_xceiv_events xceiv_event = otg_work->xceiv_event; unsigned long flags; #ifdef CONFIG_USB_SAMSUNG_OMAP_NORPM int ret = 0; #endif kfree(otg_work); switch (xceiv_event) { case USB_EVENT_ID: dev_info(musb->controller, "ID GND\n"); musb->xceiv->state = OTG_STATE_A_IDLE; #ifdef CONFIG_USB_SAMSUNG_OMAP_NORPM ret = omap2430_async_resume(musb); if (ret < 0) return; #endif if (is_otg_enabled(musb)) { #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (musb->gadget_driver) { musb_otg_init(musb); } #endif } else { musb_otg_init(musb); } #ifdef CONFIG_USB_SAMSUNG_OMAP_NORPM musb_add_hcd(musb); #endif break; case USB_EVENT_VBUS_CHARGER: dev_info(musb->controller, "USB/TA Connect\n"); /* This event received from ta_connect_irq * when a usb cable is connected. Logic has still * not identified whether this is a usb cable or TA. * So just break here. */ break; case USB_EVENT_VBUS: dev_info(musb->controller, "VBUS Connect\n"); #ifdef CONFIG_USB_SAMSUNG_OMAP_NORPM ret = omap2430_async_resume(musb); if (ret < 0) return; #endif #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (musb->gadget_driver) pm_runtime_get_sync(musb->controller); #endif otg_init(musb->xceiv); #ifdef CONFIG_USB_SAMSUNG_OMAP_NORPM musb_start(musb); musb_platform_pullup(musb, 1); #endif break; case USB_EVENT_CHARGER: dev_info(musb->controller, "Dedicated charger connect\n"); musb->is_ac_charger = true; break; case USB_EVENT_HOST_NONE: #ifdef CONFIG_USB_SAMSUNG_OMAP_NORPM dev_info(musb->controller, "USB host Disconnect. ID float\n"); if (!omap2430_async_resumed(musb)) { dev_err(musb->controller, "async suspended. abnormal state.\n"); return; } musb_stop(musb); musb_remove_hcd(musb); if (data->interface_type == MUSB_INTERFACE_UTMI) { omap2430_musb_set_vbus(musb, 0); if (musb->xceiv->set_vbus) otg_set_vbus(musb->xceiv, 0); } otg_shutdown(musb->xceiv); musb_otg_core_reset(musb); ret = omap2430_async_suspend(musb); if (ret < 0) return; break; #endif case USB_EVENT_NONE: if (musb->is_ac_charger) { dev_info(musb->controller, "Dedicated charger disconnect\n"); musb->is_ac_charger = false; break; } dev_info(musb->controller, "VBUS Disconnect\n"); #ifndef CONFIG_USB_SAMSUNG_OMAP_NORPM if (pm_runtime_suspended(musb->controller)) { dev_err(musb->controller, "runtime pm suspended. abnormal state.\n"); return; } spin_lock_irqsave(&musb->lock, flags); musb_g_disconnect(musb); spin_unlock_irqrestore(&musb->lock, flags); #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (is_otg_enabled(musb) || is_peripheral_enabled(musb)) if (musb->gadget_driver) #endif { pm_runtime_mark_last_busy(musb->controller); pm_runtime_put_autosuspend(musb->controller); } if (data->interface_type == MUSB_INTERFACE_UTMI) { omap2430_musb_set_vbus(musb, 0); if (musb->xceiv->set_vbus) otg_set_vbus(musb->xceiv, 0); } otg_shutdown(musb->xceiv); #else if (!omap2430_async_resumed(musb)) { dev_err(musb->controller, "async suspended. abnormal state.\n"); return; } musb_platform_pullup(musb, 0); spin_lock_irqsave(&musb->lock, flags); musb_stop(musb); musb_g_disconnect(musb); musb_all_ep_flush(musb); spin_unlock_irqrestore(&musb->lock, flags); if (data->interface_type == MUSB_INTERFACE_UTMI) omap2430_musb_set_vbus(musb, 0); otg_shutdown(musb->xceiv); musb_otg_core_reset(musb); ret = omap2430_async_suspend(musb); if (ret < 0) return; #endif break; default: dev_info(musb->controller, "ID float\n"); } }
int musb_hub_control( struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, char *buf, u16 wLength) { struct musb *musb = hcd_to_musb(hcd); u32 temp; int retval = 0; unsigned long flags; spin_lock_irqsave(&musb->lock, flags); if (unlikely(!HCD_HW_ACCESSIBLE(hcd))) { spin_unlock_irqrestore(&musb->lock, flags); return -ESHUTDOWN; } /* hub features: always zero, setting is a NOP * port features: reported, sometimes updated when host is active * no indicators */ switch (typeReq) { case ClearHubFeature: case SetHubFeature: switch (wValue) { case C_HUB_OVER_CURRENT: case C_HUB_LOCAL_POWER: break; default: goto error; } break; case ClearPortFeature: if ((wIndex & 0xff) != 1) goto error; switch (wValue) { case USB_PORT_FEAT_ENABLE: break; case USB_PORT_FEAT_SUSPEND: musb_port_suspend(musb, false); break; case USB_PORT_FEAT_POWER: if (!(is_otg_enabled(musb) && hcd->self.is_b_host)) musb_platform_set_vbus(musb, 0); break; case USB_PORT_FEAT_C_CONNECTION: case USB_PORT_FEAT_C_ENABLE: case USB_PORT_FEAT_C_OVER_CURRENT: case USB_PORT_FEAT_C_RESET: case USB_PORT_FEAT_C_SUSPEND: break; default: goto error; } dev_dbg(musb->controller, "clear feature %d\n", wValue); musb->port1_status &= ~(1 << wValue); break; case GetHubDescriptor: { struct usb_hub_descriptor *desc = (void *)buf; desc->bDescLength = 9; desc->bDescriptorType = 0x29; desc->bNbrPorts = 1; desc->wHubCharacteristics = cpu_to_le16( 0x0001 /* per-port power switching */ | 0x0010 /* no overcurrent reporting */ ); desc->bPwrOn2PwrGood = 5; /* msec/2 */ desc->bHubContrCurrent = 0; /* workaround bogus struct definition */ desc->u.hs.DeviceRemovable[0] = 0x02; /* port 1 */ desc->u.hs.DeviceRemovable[1] = 0xff; } break; case GetHubStatus: temp = 0; *(__le32 *) buf = cpu_to_le32(temp); break; case GetPortStatus: if (wIndex != 1) goto error; /* finish RESET signaling? */ if ((musb->port1_status & USB_PORT_STAT_RESET) && time_after_eq(jiffies, musb->rh_timer)) musb_port_reset(musb, false); /* finish RESUME signaling? */ if ((musb->port1_status & MUSB_PORT_STAT_RESUME) && time_after_eq(jiffies, musb->rh_timer)) { u8 power; power = musb_readb(musb->mregs, MUSB_POWER); power &= ~MUSB_POWER_RESUME; dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power); musb_writeb(musb->mregs, MUSB_POWER, power); /* ISSUE: DaVinci (RTL 1.300) disconnects after * resume of high speed peripherals (but not full * speed ones). */ musb->is_active = 1; musb->port1_status &= ~(USB_PORT_STAT_SUSPEND | MUSB_PORT_STAT_RESUME); musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16; usb_hcd_poll_rh_status(musb_to_hcd(musb)); /* NOTE: it might really be A_WAIT_BCON ... */ musb->xceiv->state = OTG_STATE_A_HOST; } put_unaligned(cpu_to_le32(musb->port1_status & ~MUSB_PORT_STAT_RESUME), (__le32 *) buf); /* port change status is more interesting */ dev_dbg(musb->controller, "port status %08x\n", musb->port1_status); break; case SetPortFeature: if ((wIndex & 0xff) != 1) goto error; switch (wValue) { case USB_PORT_FEAT_POWER: /* NOTE: this controller has a strange state machine * that involves "requesting sessions" according to * magic side effects from incompletely-described * rules about startup... * * This call is what really starts the host mode; be * very careful about side effects if you reorder any * initialization logic, e.g. for OTG, or change any * logic relating to VBUS power-up. */ if (!(is_otg_enabled(musb) && hcd->self.is_b_host)) musb_start(musb); break; case USB_PORT_FEAT_RESET: musb_port_reset(musb, true); break; case USB_PORT_FEAT_SUSPEND: musb_port_suspend(musb, true); break; case USB_PORT_FEAT_TEST: if (unlikely(is_host_enabled(musb))) goto error; wIndex >>= 8; switch (wIndex) { case 1: pr_debug("TEST_J\n"); temp = MUSB_TEST_J; break; case 2: pr_debug("TEST_K\n"); temp = MUSB_TEST_K; break; case 3: pr_debug("TEST_SE0_NAK\n"); temp = MUSB_TEST_SE0_NAK; break; case 4: pr_debug("TEST_PACKET\n"); temp = MUSB_TEST_PACKET; musb_load_testpacket(musb); break; case 5: pr_debug("TEST_FORCE_ENABLE\n"); temp = MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_HS; musb_writeb(musb->mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); break; case 6: pr_debug("TEST_FIFO_ACCESS\n"); temp = MUSB_TEST_FIFO_ACCESS; break; default: goto error; } musb_writeb(musb->mregs, MUSB_TESTMODE, temp); if (wIndex == 4) { musb_writew(musb->endpoints[0].regs, MUSB_CSR0, MUSB_CSR0_TXPKTRDY); } break; default: goto error; } dev_dbg(musb->controller, "set feature %d\n", wValue); musb->port1_status |= 1 << wValue; break; default: error: /* "protocol stall" on error */ retval = -EPIPE; } spin_unlock_irqrestore(&musb->lock, flags); return retval; }
static irqreturn_t am35x_musb_interrupt(int irq, void *hci) { struct musb *musb = hci; void __iomem *reg_base = musb->ctrl_base; struct device *dev = musb->controller; struct musb_hdrc_platform_data *plat = dev->platform_data; struct omap_musb_board_data *data = plat->board_data; unsigned long flags; irqreturn_t ret = IRQ_NONE; u32 epintr, usbintr; spin_lock_irqsave(&musb->lock, flags); /* Get endpoint interrupts */ epintr = musb_readl(reg_base, EP_INTR_SRC_MASKED_REG); if (epintr) { musb_writel(reg_base, EP_INTR_SRC_CLEAR_REG, epintr); musb->int_rx = (epintr & AM35X_RX_INTR_MASK) >> AM35X_INTR_RX_SHIFT; musb->int_tx = (epintr & AM35X_TX_INTR_MASK) >> AM35X_INTR_TX_SHIFT; } /* Get usb core interrupts */ usbintr = musb_readl(reg_base, CORE_INTR_SRC_MASKED_REG); if (!usbintr && !epintr) goto eoi; if (usbintr) { musb_writel(reg_base, CORE_INTR_SRC_CLEAR_REG, usbintr); musb->int_usb = (usbintr & AM35X_INTR_USB_MASK) >> AM35X_INTR_USB_SHIFT; } /* * DRVVBUS IRQs are the only proxy we have (a very poor one!) for * AM35x's missing ID change IRQ. We need an ID change IRQ to * switch appropriately between halves of the OTG state machine. * Managing DEVCTL.SESSION per Mentor docs requires that we know its * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. * Also, DRVVBUS pulses for SRP (but not at 5V) ... */ if (usbintr & (AM35X_INTR_DRVVBUS << AM35X_INTR_USB_SHIFT)) { int drvvbus = musb_readl(reg_base, USB_STAT_REG); void __iomem *mregs = musb->mregs; u8 devctl = musb_readb(mregs, MUSB_DEVCTL); int err; err = is_host_enabled(musb) && (musb->int_usb & MUSB_INTR_VBUSERROR); if (err) { /* * The Mentor core doesn't debounce VBUS as needed * to cope with device connect current spikes. This * means it's not uncommon for bus-powered devices * to get VBUS errors during enumeration. * * This is a workaround, but newer RTL from Mentor * seems to allow a better one: "re"-starting sessions * without waiting for VBUS to stop registering in * devctl. */ musb->int_usb &= ~MUSB_INTR_VBUSERROR; musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); WARNING("VBUS error workaround (delay coming)\n"); } else if (is_host_enabled(musb) && drvvbus) { MUSB_HST_MODE(musb); musb->xceiv->default_a = 1; musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; portstate(musb->port1_status |= USB_PORT_STAT_POWER); del_timer(&otg_workaround); } else { musb->is_active = 0; MUSB_DEV_MODE(musb); musb->xceiv->default_a = 0; musb->xceiv->state = OTG_STATE_B_IDLE; portstate(musb->port1_status &= ~USB_PORT_STAT_POWER); } /* NOTE: this must complete power-on within 100 ms. */ dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", drvvbus ? "on" : "off", otg_state_string(musb->xceiv->state), err ? " ERROR" : "", devctl); ret = IRQ_HANDLED; } /* Drop spurious RX and TX if device is disconnected */ if (musb->int_usb & MUSB_INTR_DISCONNECT) { musb->int_tx = 0; musb->int_rx = 0; } if (musb->int_tx || musb->int_rx || musb->int_usb) ret |= musb_interrupt(musb); eoi: /* EOI needs to be written for the IRQ to be re-asserted. */ if (ret == IRQ_HANDLED || epintr || usbintr) { /* clear level interrupt */ if (data->clear_irq) data->clear_irq(); /* write EOI */ musb_writel(reg_base, USB_END_OF_INTR_REG, 0); } /* Poll for ID change */ if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); spin_unlock_irqrestore(&musb->lock, flags); return ret; }
static irqreturn_t da8xx_musb_interrupt(int irq, void *hci) { struct musb *musb = hci; void __iomem *reg_base = musb->ctrl_base; struct usb_otg *otg = musb->xceiv->otg; unsigned long flags; irqreturn_t ret = IRQ_NONE; u32 status; spin_lock_irqsave(&musb->lock, flags); /* * NOTE: DA8XX shadows the Mentor IRQs. Don't manage them through * the Mentor registers (except for setup), use the TI ones and EOI. */ /* Acknowledge and handle non-CPPI interrupts */ status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG); if (!status) goto eoi; musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status); dev_dbg(musb->controller, "USB IRQ %08x\n", status); musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT; musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT; musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT; /* * DRVVBUS IRQs are the only proxy we have (a very poor one!) for * DA8xx's missing ID change IRQ. We need an ID change IRQ to * switch appropriately between halves of the OTG state machine. * Managing DEVCTL.Session per Mentor docs requires that we know its * value but DEVCTL.BDevice is invalid without DEVCTL.Session set. * Also, DRVVBUS pulses for SRP (but not at 5 V)... */ if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) { int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG); void __iomem *mregs = musb->mregs; u8 devctl = musb_readb(mregs, MUSB_DEVCTL); int err; err = is_host_enabled(musb) && (musb->int_usb & MUSB_INTR_VBUSERROR); if (err) { /* * The Mentor core doesn't debounce VBUS as needed * to cope with device connect current spikes. This * means it's not uncommon for bus-powered devices * to get VBUS errors during enumeration. * * This is a workaround, but newer RTL from Mentor * seems to allow a better one: "re"-starting sessions * without waiting for VBUS to stop registering in * devctl. */ musb->int_usb &= ~MUSB_INTR_VBUSERROR; musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); WARNING("VBUS error workaround (delay coming)\n"); } else if (is_host_enabled(musb) && drvvbus) { MUSB_HST_MODE(musb); otg->default_a = 1; musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; portstate(musb->port1_status |= USB_PORT_STAT_POWER); del_timer(&otg_workaround); } else { musb->is_active = 0; MUSB_DEV_MODE(musb); otg->default_a = 0; musb->xceiv->state = OTG_STATE_B_IDLE; portstate(musb->port1_status &= ~USB_PORT_STAT_POWER); } dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", drvvbus ? "on" : "off", otg_state_string(musb->xceiv->state), err ? " ERROR" : "", devctl); ret = IRQ_HANDLED; } if (musb->int_tx || musb->int_rx || musb->int_usb) ret |= musb_interrupt(musb); eoi: /* EOI needs to be written for the IRQ to be re-asserted. */ if (ret == IRQ_HANDLED || status) musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0); /* Poll for ID change */ if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); spin_unlock_irqrestore(&musb->lock, flags); return ret; }
static irqreturn_t davinci_musb_interrupt(int irq, void *__hci) { unsigned long flags; irqreturn_t retval = IRQ_NONE; struct musb *musb = __hci; void __iomem *tibase = musb->ctrl_base; struct cppi *cppi; u32 tmp; spin_lock_irqsave(&musb->lock, flags); /* NOTE: DaVinci shadows the Mentor IRQs. Don't manage them through * the Mentor registers (except for setup), use the TI ones and EOI. * * Docs describe irq "vector" registers associated with the CPPI and * USB EOI registers. These hold a bitmask corresponding to the * current IRQ, not an irq handler address. Would using those bits * resolve some of the races observed in this dispatch code?? */ /* CPPI interrupts share the same IRQ line, but have their own * mask, state, "vector", and EOI registers. */ cppi = container_of(musb->dma_controller, struct cppi, controller); if (is_cppi_enabled(musb) && musb->dma_controller && !cppi->irq) retval = cppi_interrupt(irq, __hci); /* ack and handle non-CPPI interrupts */ tmp = musb_readl(tibase, DAVINCI_USB_INT_SRC_MASKED_REG); musb_writel(tibase, DAVINCI_USB_INT_SRC_CLR_REG, tmp); DBG(4, "IRQ %08x\n", tmp); musb->int_rx = (tmp & DAVINCI_USB_RXINT_MASK) >> DAVINCI_USB_RXINT_SHIFT; musb->int_tx = (tmp & DAVINCI_USB_TXINT_MASK) >> DAVINCI_USB_TXINT_SHIFT; musb->int_usb = (tmp & DAVINCI_USB_USBINT_MASK) >> DAVINCI_USB_USBINT_SHIFT; /* DRVVBUS irqs are the only proxy we have (a very poor one!) for * DaVinci's missing ID change IRQ. We need an ID change IRQ to * switch appropriately between halves of the OTG state machine. * Managing DEVCTL.SESSION per Mentor docs requires we know its * value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. * Also, DRVVBUS pulses for SRP (but not at 5V) ... */ if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) { int drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG); void __iomem *mregs = musb->mregs; u8 devctl = musb_readb(mregs, MUSB_DEVCTL); int err = musb->int_usb & MUSB_INTR_VBUSERROR; err = is_host_enabled(musb) && (musb->int_usb & MUSB_INTR_VBUSERROR); if (err) { /* The Mentor core doesn't debounce VBUS as needed * to cope with device connect current spikes. This * means it's not uncommon for bus-powered devices * to get VBUS errors during enumeration. * * This is a workaround, but newer RTL from Mentor * seems to allow a better one: "re"starting sessions * without waiting (on EVM, a **long** time) for VBUS * to stop registering in devctl. */ musb->int_usb &= ~MUSB_INTR_VBUSERROR; musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); WARNING("VBUS error workaround (delay coming)\n"); } else if (is_host_enabled(musb) && drvvbus) { MUSB_HST_MODE(musb); musb->xceiv->default_a = 1; musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; portstate(musb->port1_status |= USB_PORT_STAT_POWER); del_timer(&otg_workaround); } else { musb->is_active = 0; MUSB_DEV_MODE(musb); musb->xceiv->default_a = 0; musb->xceiv->state = OTG_STATE_B_IDLE; portstate(musb->port1_status &= ~USB_PORT_STAT_POWER); } /* NOTE: this must complete poweron within 100 msec * (OTG_TIME_A_WAIT_VRISE) but we don't check for that. */ davinci_musb_source_power(musb, drvvbus, 0); DBG(2, "VBUS %s (%s)%s, devctl %02x\n", drvvbus ? "on" : "off", otg_state_string(musb), err ? " ERROR" : "", devctl); retval = IRQ_HANDLED; } if (musb->int_tx || musb->int_rx || musb->int_usb) retval |= musb_interrupt(musb); /* irq stays asserted until EOI is written */ musb_writel(tibase, DAVINCI_USB_EOI_REG, 0); /* poll for ID change */ if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); spin_unlock_irqrestore(&musb->lock, flags); return retval; }
static irqreturn_t davinci_musb_interrupt(int irq, void *__hci) { unsigned long flags; irqreturn_t retval = IRQ_NONE; struct musb *musb = __hci; struct usb_otg *otg = musb->xceiv->otg; void __iomem *tibase = musb->ctrl_base; struct cppi *cppi; u32 tmp; spin_lock_irqsave(&musb->lock, flags); cppi = container_of(musb->dma_controller, struct cppi, controller); if (is_cppi_enabled() && musb->dma_controller && !cppi->irq) retval = cppi_interrupt(irq, __hci); tmp = musb_readl(tibase, DAVINCI_USB_INT_SRC_MASKED_REG); musb_writel(tibase, DAVINCI_USB_INT_SRC_CLR_REG, tmp); dev_dbg(musb->controller, "IRQ %08x\n", tmp); musb->int_rx = (tmp & DAVINCI_USB_RXINT_MASK) >> DAVINCI_USB_RXINT_SHIFT; musb->int_tx = (tmp & DAVINCI_USB_TXINT_MASK) >> DAVINCI_USB_TXINT_SHIFT; musb->int_usb = (tmp & DAVINCI_USB_USBINT_MASK) >> DAVINCI_USB_USBINT_SHIFT; if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) { int drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG); void __iomem *mregs = musb->mregs; u8 devctl = musb_readb(mregs, MUSB_DEVCTL); int err = musb->int_usb & MUSB_INTR_VBUSERROR; err = is_host_enabled(musb) && (musb->int_usb & MUSB_INTR_VBUSERROR); if (err) { musb->int_usb &= ~MUSB_INTR_VBUSERROR; musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); WARNING("VBUS error workaround (delay coming)\n"); } else if (is_host_enabled(musb) && drvvbus) { MUSB_HST_MODE(musb); otg->default_a = 1; musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; portstate(musb->port1_status |= USB_PORT_STAT_POWER); del_timer(&otg_workaround); } else { musb->is_active = 0; MUSB_DEV_MODE(musb); otg->default_a = 0; musb->xceiv->state = OTG_STATE_B_IDLE; portstate(musb->port1_status &= ~USB_PORT_STAT_POWER); } davinci_musb_source_power(musb, drvvbus, 0); dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", drvvbus ? "on" : "off", otg_state_string(musb->xceiv->state), err ? " ERROR" : "", devctl); retval = IRQ_HANDLED; } if (musb->int_tx || musb->int_rx || musb->int_usb) retval |= musb_interrupt(musb); /* irq stays asserted until EOI is written */ musb_writel(tibase, DAVINCI_USB_EOI_REG, 0); if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); spin_unlock_irqrestore(&musb->lock, flags); return retval; }
static void musb_port_reset(struct musb *musb, bool do_reset) { u8 power; void __iomem *mbase = musb->mregs; if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) { dev_dbg(musb->controller, "HNP: Returning from HNP; no hub reset from b_idle\n"); musb->port1_status &= ~USB_PORT_STAT_RESET; return; } if (!is_host_enabled(musb)) return; /* NOTE: caller guarantees it will turn off the reset when * the appropriate amount of time has passed */ power = musb_readb(mbase, MUSB_POWER); if (do_reset) { /* * If RESUME is set, we must make sure it stays minimum 20 ms. * Then we must clear RESUME and wait a bit to let musb start * generating SOFs. If we don't do this, OPT HS A 6.8 tests * fail with "Error! Did not receive an SOF before suspend * detected". */ if (power & MUSB_POWER_RESUME) { while (time_before(jiffies, musb->rh_timer)) msleep(1); musb_writeb(mbase, MUSB_POWER, power & ~MUSB_POWER_RESUME); msleep(1); } musb->ignore_disconnect = true; power &= 0xf0; musb_writeb(mbase, MUSB_POWER, power | MUSB_POWER_RESET); musb->port1_status |= USB_PORT_STAT_RESET; musb->port1_status &= ~USB_PORT_STAT_ENABLE; musb->rh_timer = jiffies + msecs_to_jiffies(50); } else { dev_dbg(musb->controller, "root port reset stopped\n"); musb_writeb(mbase, MUSB_POWER, power & ~MUSB_POWER_RESET); musb->ignore_disconnect = false; power = musb_readb(mbase, MUSB_POWER); if (power & MUSB_POWER_HSMODE) { dev_dbg(musb->controller, "high-speed device connected\n"); musb->port1_status |= USB_PORT_STAT_HIGH_SPEED; } musb->port1_status &= ~USB_PORT_STAT_RESET; musb->port1_status |= USB_PORT_STAT_ENABLE | (USB_PORT_STAT_C_RESET << 16) | (USB_PORT_STAT_C_ENABLE << 16); usb_hcd_poll_rh_status(musb_to_hcd(musb)); musb->vbuserr_retry = VBUSERR_RETRY_COUNT; } }
static void musb_otg_notifier_work(struct work_struct *data_notifier_work) { u32 val; struct musb_otg_work *otg_work = container_of(data_notifier_work, struct musb_otg_work, work); struct musb *musb = otg_work->musb; struct device *dev = musb->controller; struct musb_hdrc_platform_data *pdata = dev->platform_data; struct omap_musb_board_data *data = pdata->board_data; enum usb_xceiv_events xceiv_event = otg_work->xceiv_event; static int last_event = -1; kfree(otg_work); /* avoid duplicate notifications */ if (last_event == xceiv_event) { WARN(1, "Duplicated event(%d): ignored\n", xceiv_event); return; } /* check for incorrect transitions */ if ((last_event == USB_EVENT_VBUS && xceiv_event == USB_EVENT_ID) || (last_event == USB_EVENT_ID && xceiv_event == USB_EVENT_VBUS)) { WARN(1, "Incorrect transition (%d)->(%d)\n", last_event, xceiv_event); } /* store last event */ last_event = xceiv_event; switch (xceiv_event) { case USB_EVENT_ID: dev_dbg(musb->controller, "ID GND\n"); if (is_otg_enabled(musb)) { #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (musb->gadget_driver) { pm_runtime_get_sync(musb->controller); val = musb_readl(musb->mregs, OTG_INTERFSEL); otg_set_suspend(musb->xceiv, 1); if (data->interface_type == MUSB_INTERFACE_UTMI) { val &= ~ULPI_12PIN; val |= UTMI_8BIT; } else { val |= ULPI_12PIN; } musb_writel(musb->mregs, OTG_INTERFSEL, val); otg_set_suspend(musb->xceiv, 0); otg_init(musb->xceiv); omap2430_musb_set_vbus(musb, 1); } #endif } else { pm_runtime_get_sync(musb->controller); val = musb_readl(musb->mregs, OTG_INTERFSEL); otg_set_suspend(musb->xceiv, 1); if (data->interface_type == MUSB_INTERFACE_UTMI) { val &= ~ULPI_12PIN; val |= UTMI_8BIT; } else { val |= ULPI_12PIN; } musb_writel(musb->mregs, OTG_INTERFSEL, val); otg_set_suspend(musb->xceiv, 0); otg_init(musb->xceiv); omap2430_musb_set_vbus(musb, 1); } break; case USB_EVENT_CHARGER: dev_dbg(musb->controller, "Dedicated charger connect\n"); musb->is_ac_charger = true; break; case USB_EVENT_VBUS: dev_dbg(musb->controller, "VBUS Connect\n"); #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (musb->gadget_driver) { pm_runtime_get_sync(musb->controller); val = musb_readl(musb->mregs, OTG_INTERFSEL); otg_set_suspend(musb->xceiv, 1); if (data->interface_type == MUSB_INTERFACE_UTMI) { val &= ~ULPI_12PIN; val |= UTMI_8BIT; } else { val |= ULPI_12PIN; } musb_writel(musb->mregs, OTG_INTERFSEL, val); otg_set_suspend(musb->xceiv, 0); } #endif otg_init(musb->xceiv); break; case USB_EVENT_NONE: if (musb->is_ac_charger) { dev_dbg(musb->controller, "Dedicated charger disconnect\n"); musb->is_ac_charger = false; break; } dev_dbg(musb->controller, "VBUS Disconnect\n"); pm_runtime_get_sync(musb->controller); if (data->interface_type == MUSB_INTERFACE_UTMI) { omap2430_musb_set_vbus(musb, 0); if (musb->xceiv->set_vbus) otg_set_vbus(musb->xceiv, 0); } otg_shutdown(musb->xceiv); otg_set_suspend(musb->xceiv, 1); val = musb_readl(musb->mregs, OTG_INTERFSEL); val |= ULPI_12PIN; musb_writel(musb->mregs, OTG_INTERFSEL, val); pm_runtime_mark_last_busy(musb->controller); pm_runtime_put_autosuspend(musb->controller); #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (is_otg_enabled(musb) || is_peripheral_enabled(musb)) if (musb->gadget_driver) #endif pm_runtime_put_autosuspend(musb->controller); break; default: dev_dbg(musb->controller, "ID float\n"); } }
static void musb_port_suspend(struct musb *musb, bool do_suspend) { u8 power; void __iomem *mbase = musb->mregs; if (!is_host_enabled(musb)) return; /* NOTE: this doesn't necessarily put PHY into low power mode, * turning off its clock; that's a function of PHY integration and * MUSB_POWER_ENSUSPEND. PHY may need a clock (sigh) to detect * SE0 changing to connect (J) or wakeup (K) states. */ power = musb_readb(mbase, MUSB_POWER); if (do_suspend) { int retries = 10000; power &= ~MUSB_POWER_RESUME; power |= MUSB_POWER_SUSPENDM; musb_writeb(mbase, MUSB_POWER, power); /* Needed for OPT A tests */ power = musb_readb(mbase, MUSB_POWER); while (power & MUSB_POWER_SUSPENDM) { power = musb_readb(mbase, MUSB_POWER); if (retries-- < 1) break; } dev_dbg(musb->controller, "Root port suspended, power %02x\n", power); musb->port1_status |= USB_PORT_STAT_SUSPEND; switch (musb->xceiv->state) { case OTG_STATE_A_HOST: musb->xceiv->state = OTG_STATE_A_SUSPEND; musb->is_active = is_otg_enabled(musb) && musb->xceiv->host->b_hnp_enable; musb_platform_try_idle(musb, 0); break; case OTG_STATE_B_HOST: if (is_otg_enabled(musb)) { musb->xceiv->state = OTG_STATE_B_WAIT_ACON; musb->is_active = is_otg_enabled(musb) && musb->xceiv->host->b_hnp_enable; musb_platform_try_idle(musb, 0); } break; default: dev_dbg(musb->controller, "bogus rh suspend? %s\n", otg_state_string(musb->xceiv->state)); } } else if (power & MUSB_POWER_SUSPENDM) { power &= ~MUSB_POWER_SUSPENDM; power |= MUSB_POWER_RESUME; musb_writeb(mbase, MUSB_POWER, power); dev_dbg(musb->controller, "Root port resuming, power %02x\n", power); /* later, GetPortStatus will stop RESUME signaling */ musb->port1_status |= MUSB_PORT_STAT_RESUME; musb->rh_timer = jiffies + msecs_to_jiffies(20); } }
static void musb_otg_notifier_work(struct work_struct *data_notifier_work) { u32 val; struct musb_otg_work *otg_work = container_of(data_notifier_work, struct musb_otg_work, work); struct musb *musb = otg_work->musb; struct device *dev = musb->controller; struct musb_hdrc_platform_data *pdata = dev->platform_data; struct omap_musb_board_data *data = pdata->board_data; enum usb_xceiv_events xceiv_event = otg_work->xceiv_event; int status; kfree(otg_work); if (xceiv_event == xceiv_event_last) { /* sync pm runtime if already got */ if (xceiv_event == USB_EVENT_VBUS || xceiv_event == USB_EVENT_ID) { pm_runtime_put_sync(musb->controller); } } xceiv_event_last = xceiv_event; switch (xceiv_event) { case USB_EVENT_ID: dev_dbg(musb->controller, "ID GND\n"); pm_runtime_get_sync(musb->controller); if (is_otg_enabled(musb)) { #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (musb->gadget_driver) { val = musb_readl(musb->mregs, OTG_INTERFSEL); if (data->interface_type == MUSB_INTERFACE_UTMI) { val &= ~ULPI_12PIN; val |= UTMI_8BIT; } else { val |= ULPI_12PIN; } musb_writel(musb->mregs, OTG_INTERFSEL, val); otg_init(musb->xceiv); omap2430_musb_set_vbus(musb, 1); } #endif } else { val = musb_readl(musb->mregs, OTG_INTERFSEL); if (data->interface_type == MUSB_INTERFACE_UTMI) { val &= ~ULPI_12PIN; val |= UTMI_8BIT; } else { val |= ULPI_12PIN; } musb_writel(musb->mregs, OTG_INTERFSEL, val); otg_init(musb->xceiv); omap2430_musb_set_vbus(musb, 1); } break; case USB_EVENT_CHARGER: dev_dbg(musb->controller, "Dedicated charger connect\n"); musb->is_ac_charger = true; break; case USB_EVENT_VBUS: dev_dbg(musb->controller, "VBUS Connect\n"); pm_runtime_get_sync(musb->controller); #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (musb->gadget_driver) { val = musb_readl(musb->mregs, OTG_INTERFSEL); if (data->interface_type == MUSB_INTERFACE_UTMI) { val &= ~ULPI_12PIN; val |= UTMI_8BIT; } else { val |= ULPI_12PIN; } musb_writel(musb->mregs, OTG_INTERFSEL, val); } #endif otg_init(musb->xceiv); break; case USB_EVENT_NONE: if (musb->is_ac_charger) { dev_dbg(musb->controller, "Dedicated charger disconnect\n"); musb->is_ac_charger = false; break; } dev_dbg(musb->controller, "VBUS Disconnect\n"); // pm_runtime_get_sync(musb->controller); if (data->interface_type == MUSB_INTERFACE_UTMI) { omap2430_musb_set_vbus(musb, 0); if (musb->xceiv->set_vbus) otg_set_vbus(musb->xceiv, 0); } otg_shutdown(musb->xceiv); val = musb_readl(musb->mregs, OTG_INTERFSEL); val |= ULPI_12PIN; musb_writel(musb->mregs, OTG_INTERFSEL, val); #ifdef CONFIG_USB_GADGET_MUSB_HDRC if (is_otg_enabled(musb) || is_peripheral_enabled(musb)) { if (musb->gadget_driver) #endif { pm_runtime_mark_last_busy(musb->controller); pm_runtime_put_autosuspend(musb->controller); } #ifdef CONFIG_USB_GADGET_MUSB_HDRC else { pm_runtime_put_sync(musb->controller); } } else { pm_runtime_put_sync(musb->controller); } #endif break; default: dev_dbg(musb->controller, "ID float\n"); } }