void *
sun68k_mainbus_intr_establish(bus_space_tag_t t, int pil, int level, int flags,
int (*handler)(void *), void *arg)
{
isr_add_autovect(handler, arg, pil);
return (NULL);
}
void
ie_obio_attach(device_t parent, device_t self, void *args)
{
struct ie_softc *sc = device_private(self);
struct confargs *ca = args;
sc->sc_dev = self;
sc->hard_type = IE_OBIO;
sc->reset_586 = ie_obreset;
sc->chan_attn = ie_obattend;
sc->run_586 = ie_obrun;
sc->sc_memcpy = memcpy;
sc->sc_memset = memset;
/* Map in the control registers. */
sc->sc_reg = bus_mapin(ca->ca_bustype,
ca->ca_paddr, sizeof(struct ieob));
/*
* The on-board "ie" is wired-up such that its
* memory access goes to the high 16 megabytes
* of the on-board memory space (on-board DVMA).
*/
sc->sc_iobase = (void *)DVMA_OBIO_SLAVE_BASE;
/*
* The on-board "ie" just uses main memory, so
* we can choose how much memory to give it.
* XXX: Would like to use less than 64K...
*/
sc->sc_msize = 0x8000; /* MEMSIZE 32K */
/* Allocate "shared" memory (in DVMA space). */
sc->sc_maddr = dvma_malloc(sc->sc_msize);
if (sc->sc_maddr == NULL)
panic(": not enough dvma space");
/*
* Set the System Configuration Pointer (SCP).
* Its location is system-dependent because the
* i82586 reads it from a fixed physical address.
* On this hardware, the i82586 address maps to
* a 24-bit offset in on-board DVMA space. The
* SCP happens to fall in a page used by the
* PROM monitor, which the PROM knows about.
*/
sc->scp = (volatile void *)((char *)sc->sc_iobase + IE_SCP_ADDR);
/*
* The rest of ram is used for buffers.
*/
sc->buf_area = sc->sc_maddr;
sc->buf_area_sz = sc->sc_msize;
/* Install interrupt handler. */
isr_add_autovect(ie_intr, sc, ca->ca_intpri);
/* Set the ethernet address. */
idprom_etheraddr(sc->sc_addr);
/* Do machine-independent parts of attach. */
ie_attach(sc);
}
/*
* Attach a found zs.
*
* Match slave number to zs unit number, so that misconfiguration will
* not set up the keyboard as ttya, etc.
*/
static void
zs_attach(device_t parent, device_t self, void *aux)
{
struct zsc_softc *zsc = device_private(self);
struct confargs *ca = aux;
struct zsc_attach_args zsc_args;
volatile struct zschan *zc;
struct zs_chanstate *cs;
int s, zs_unit, channel;
static int didintr;
zsc->zsc_dev = self;
zs_unit = device_unit(self);
aprint_normal(": (softpri %d)\n", ZSSOFT_PRI);
/* Use the mapping setup by the Sun PROM. */
if (zsaddr[zs_unit] == NULL)
panic("zs_attach: zs%d not mapped", zs_unit);
/*
* Initialize software state for each channel.
*/
for (channel = 0; channel < 2; channel++) {
zsc_args.channel = channel;
zsc_args.hwflags = zs_hwflags[zs_unit][channel];
cs = &zsc->zsc_cs_store[channel];
zsc->zsc_cs[channel] = cs;
zs_lock_init(cs);
cs->cs_channel = channel;
cs->cs_private = NULL;
cs->cs_ops = &zsops_null;
cs->cs_brg_clk = PCLK / 16;
zc = zs_get_chan_addr(zs_unit, channel);
cs->cs_reg_csr = &zc->zc_csr;
cs->cs_reg_data = &zc->zc_data;
memcpy(cs->cs_creg, zs_init_reg, 16);
memcpy(cs->cs_preg, zs_init_reg, 16);
/* XXX: Get these from the EEPROM instead? */
/* XXX: See the mvme167 code. Better. */
if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
cs->cs_defspeed = zs_get_speed(cs);
else
cs->cs_defspeed = zs_defspeed[zs_unit][channel];
cs->cs_defcflag = zs_def_cflag;
/* Make these correspond to cs_defcflag (-crtscts) */
cs->cs_rr0_dcd = ZSRR0_DCD;
cs->cs_rr0_cts = 0;
cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
cs->cs_wr5_rts = 0;
/*
* Clear the master interrupt enable.
* The INTENA is common to both channels,
* so just do it on the A channel.
*/
if (channel == 0) {
zs_write_reg(cs, 9, 0);
}
/*
* Look for a child driver for this channel.
* The child attach will setup the hardware.
*/
if (!config_found(self, (void *)&zsc_args, zs_print)) {
/* No sub-driver. Just reset it. */
uint8_t reset = (channel == 0) ?
ZSWR9_A_RESET : ZSWR9_B_RESET;
s = splhigh();
zs_write_reg(cs, 9, reset);
splx(s);
}
}
/*
* Now safe to install interrupt handlers. Note the arguments
* to the interrupt handlers aren't used. Note, we only do this
* once since both SCCs interrupt at the same level and vector.
*/
if (!didintr) {
didintr = 1;
isr_add_autovect(zshard, NULL, ca->ca_intpri);
}
zsc->zs_si = softint_establish(SOFTINT_SERIAL,
(void (*)(void *))zsc_intr_soft, zsc);
/* XXX; evcnt_attach() ? */
/*
* Set the master interrupt enable and interrupt vector.
* (common to both channels, do it on A)
*/
cs = zsc->zsc_cs[0];
s = splhigh();
/* interrupt vector */
zs_write_reg(cs, 2, zs_init_reg[2]);
/* master interrupt control (enable) */
zs_write_reg(cs, 9, zs_init_reg[9]);
splx(s);
/*
* XXX: L1A hack - We would like to be able to break into
* the debugger during the rest of autoconfiguration, so
* lower interrupts just enough to let zs interrupts in.
* This is done after both zs devices are attached.
*/
if (zs_unit == 1) {
(void)spl5(); /* splzs - 1 */
}
}
