u08 itg3200_init() { u08 byte; // sampling rate to 100Hz byte = 9; itg3200_write_register(ITG3200_REG_SMPLRT, &byte, 1); _delay_us(20); // range, only full range supported, low pass 98hz byte = BV(3)|BV(4) | 2; itg3200_write_register(ITG3200_REG_DLPF_FS, &byte, 1); _delay_us(20); // set internal clk source to X axis byte = BV(0); itg3200_write_register(ITG3200_REG_PWR_MGM, &byte, 1); _delay_us(20); // set interrupt pin to: active hight, latch until read, data_ready byte = BV(5)|BV(4)|BV(0); itg3200_write_register(ITG3200_REG_INT_CFG, &byte, 1); return 0; }
void itg3200_set_samplerate_divider(int fd, uint8_t divider) { const ssize_t write_result = itg3200_write_register(fd, samplerate_divider, divider); }
void itg3200_set_lowpass_samplerate(int fd, uint8_t samplerate_lowpass_setting) { const ssize_t write_result = itg3200_write_register(fd, lowpass_samplerate, samplerate_lowpass_setting); }