/*
* Get the child iWMMXt state.
*/
static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
{
struct thread_info *thread = task_thread_info(tsk);
if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
return -ENODATA;
iwmmxt_task_disable(thread); /* force it to ram */
return copy_to_user(ufp, &thread->fpstate.iwmmxt, IWMMXT_SIZE)
? -EFAULT : 0;
}
int pxa_pm_enter(suspend_state_t state)
{
unsigned long sleep_save_checksum = 0, checksum = 0;
int i;
#ifdef CONFIG_IWMMXT
/* force any iWMMXt context to ram **/
if (elf_hwcap & HWCAP_IWMMXT)
iwmmxt_task_disable(NULL);
#endif
/* skip registers saving for standby */
if (state != PM_SUSPEND_STANDBY) {
pxa_cpu_pm_fns->save(sleep_save);
/* before sleeping, calculate and save a checksum */
for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++)
sleep_save_checksum += sleep_save[i];
}
/* Clear sleep reset status */
RCSR = RCSR_SMR;
/* *** go zzz *** */
pxa_cpu_pm_fns->enter(state);
cpu_init();
if (state != PM_SUSPEND_STANDBY) {
/* after sleeping, validate the checksum */
for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++)
checksum += sleep_save[i];
/* if invalid, display message and wait for a hardware reset */
if (checksum != sleep_save_checksum) {
#ifdef CONFIG_ARCH_LUBBOCK
LUB_HEXLED = 0xbadbadc5;
#endif
while (1)
pxa_cpu_pm_fns->enter(state);
}
pxa_cpu_pm_fns->restore(sleep_save);
}
pr_debug("*** made it back from resume\n");
return 0;
}
int pxa_pm_enter(suspend_state_t state)
{
unsigned long sleep_save_checksum = 0, checksum = 0;
int i;
#ifdef CONFIG_IWMMXT
if (elf_hwcap & HWCAP_IWMMXT)
iwmmxt_task_disable(NULL);
#endif
if (state != PM_SUSPEND_STANDBY && pxa_cpu_pm_fns->save) {
pxa_cpu_pm_fns->save(sleep_save);
for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
sleep_save_checksum += sleep_save[i];
}
pxa_cpu_pm_fns->enter(state);
if (state != PM_SUSPEND_STANDBY && pxa_cpu_pm_fns->restore) {
for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
checksum += sleep_save[i];
if (checksum != sleep_save_checksum) {
lubbock_set_hexled(0xbadbadc5);
while (1)
pxa_cpu_pm_fns->enter(state);
}
pxa_cpu_pm_fns->restore(sleep_save);
}
pr_debug("*** made it back from resume\n");
return 0;
}
int pxa_pm_enter(suspend_state_t state)
{
unsigned long sleep_save[SLEEP_SAVE_SIZE];
unsigned long checksum = 0;
struct timespec delta, rtc;
int i;
extern void pxa_cpu_pm_enter(suspend_state_t state);
#ifdef CONFIG_IWMMXT
/* force any iWMMXt context to ram **/
iwmmxt_task_disable(NULL);
#endif
/* preserve current time */
rtc.tv_sec = RCNR;
rtc.tv_nsec = 0;
save_time_delta(&delta, &rtc);
SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2);
SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
SAVE(GFER0); SAVE(GFER1); SAVE(GFER2);
SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
SAVE(GAFR0_L); SAVE(GAFR0_U);
SAVE(GAFR1_L); SAVE(GAFR1_U);
SAVE(GAFR2_L); SAVE(GAFR2_U);
#ifdef CONFIG_PXA27x
SAVE(MDREFR);
SAVE(GPLR3); SAVE(GPDR3); SAVE(GRER3); SAVE(GFER3); SAVE(PGSR3);
SAVE(GAFR3_L); SAVE(GAFR3_U);
SAVE(PWER); SAVE(PCFR); SAVE(PRER);
SAVE(PFER); SAVE(PKWR);
#endif
SAVE(ICMR);
ICMR = 0;
SAVE(CKEN);
SAVE(PSTR);
/* Note: wake up source are set up in each machine specific files */
/* clear GPIO transition detect bits */
GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
#ifdef CONFIG_PXA27x
GEDR3 = GEDR3;
#endif
/* Clear sleep reset status */
RCSR = RCSR_SMR;
/* before sleeping, calculate and save a checksum */
for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
checksum += sleep_save[i];
sleep_save[SLEEP_SAVE_CKSUM] = checksum;
/* *** go zzz *** */
pxa_cpu_pm_enter(state);
cpu_init();
/* after sleeping, validate the checksum */
checksum = 0;
for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
checksum += sleep_save[i];
/* if invalid, display message and wait for a hardware reset */
if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) {
#ifdef CONFIG_ARCH_LUBBOCK
LUB_HEXLED = 0xbadbadc5;
#endif
while (1)
pxa_cpu_pm_enter(state);
}
/* ensure not to come back here if it wasn't intended */
PSPR = 0;
/* restore registers */
RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
RESTORE(GAFR0_L); RESTORE(GAFR0_U);
RESTORE(GAFR1_L); RESTORE(GAFR1_U);
RESTORE(GAFR2_L); RESTORE(GAFR2_U);
RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
#ifdef CONFIG_PXA27x
RESTORE(MDREFR);
RESTORE_GPLEVEL(3); RESTORE(GPDR3);
RESTORE(GAFR3_L); RESTORE(GAFR3_U);
RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
RESTORE(PFER); RESTORE(PKWR);
#endif
PSSR = PSSR_RDH | PSSR_PH;
RESTORE(CKEN);
ICLR = 0;
ICCR = 1;
RESTORE(ICMR);
RESTORE(PSTR);
/* restore current time */
rtc.tv_sec = RCNR;
restore_time_delta(&delta, &rtc);
#ifdef DEBUG
printk(KERN_DEBUG "*** made it back from resume\n");
#endif
return 0;
}