示例#1
0
/*
 * We only do anything if we are the master NPU on the board.
 * The slave NPU only has the ethernet chip going directly to
 * the PCIB interrupt input.
 */
void __init ixdp2x01_init_irq(void)
{
	int irq = 0;

	/* initialize chip specific interrupts */
	ixp2000_init_irq();

	if (machine_is_ixdp2401())
		valid_irq_mask = IXDP2401_VALID_IRQ_MASK;
	else
		valid_irq_mask = IXDP2801_VALID_IRQ_MASK;

	/* Mask all interrupts from CPLD, disable simulation */
	ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG, 0xffffffff);
	ixp2000_reg_write(IXDP2X01_INT_SIM_REG, 0);

	for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) {
		if (irq & valid_irq_mask) {
			set_irq_chip(irq, &ixdp2x01_irq_chip);
			set_irq_handler(irq, do_level_IRQ);
			set_irq_flags(irq, IRQF_VALID);
		} else {
			set_irq_flags(irq, 0);
		}
	}

	/* Hook into PCI interrupts */
	set_irq_chained_handler(IRQ_IXP2000_PCIB, &ixdp2x01_irq_handler);
}
void __init ixdp2800_init_irq(void)
{
	int i = 0;
	
	*IXDP2800_CPLD_INT_MASK = 0;		/* turn off interrupts */

	/* initialize chip specific interrupts */
	ixp2000_init_irq();

	/*
	 * Slave only has NIC routed to it, so we don't init everything
	 */
	if (npu_is_master()) {
		for(i = NR_IXP2000_IRQS; i < NR_IXDP2800_IRQS; i++) {
			irq_desc[i].valid 	= 1;
			irq_desc[i].probe_ok	= 0;
			irq_desc[i].mask_ack	= ext_irq_mask;
			irq_desc[i].mask	= ext_irq_mask;
			irq_desc[i].unmask	= ext_irq_unmask;
		}

		/* init PCI interrupts */
		setup_arm_irq(IRQ_IXP2000_PCIB, &ext_irq);
	}
}
/*
 * We only do anything if we are the master NPU on the board.
 * The slave NPU only has the ethernet chip going directly to
 * the PCIB interrupt input.
 */
void __init ixdp2400_init_irq(void)
{
	int i = 0;

	/* initialize chip specific interrupts */
	ixp2000_init_irq();

	if (npu_is_master()) {

		/* Disable all CPLD interrupts */
		acquire_slowport(&slowport_cpld_cfg);
		*IXDP2400_CPLD_INT_MASK = 0xff;
		release_slowport();

		for(i = NR_IXP2000_IRQS; i < NR_IXDP2400_IRQS; i++) {
			irq_desc[i].valid 	= 1;
			irq_desc[i].probe_ok	= 0;
			irq_desc[i].mask_ack	= ext_irq_mask;
			irq_desc[i].mask	= ext_irq_mask;
			irq_desc[i].unmask	= ext_irq_unmask;
		}

		/* Hook into PCI interrupts */
		setup_arm_irq(IRQ_IXP2000_PCIB, &ext_irq);
	}
}
void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_of_irqs)
{
	unsigned int irq;

	ixp2000_init_irq();
	
	if (!ixdp2x00_master_npu())
		return;

	board_irq_stat = stat_reg;
	board_irq_mask = mask_reg;
	board_irq_count = nr_of_irqs;

	*board_irq_mask = 0xffffffff;

	for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) {
		irq_set_chip_and_handler(irq, &ixdp2x00_cpld_irq_chip,
					 handle_level_irq);
		set_irq_flags(irq, IRQF_VALID);
	}

	/* Hook into PCI interrupt */
	irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler);
}