static int __init hawaii_init(void)
{
	pm_power_off = hawaii_poweroff;

	cpu_info_verbose();
	pinmux_init();

#ifdef CONFIG_KONA_ATAG_DT
	printk(KERN_INFO "pinmux_gpio_mask: 0x%x, 0x%x, 0x%x, 0x%x\n",
	       dt_pinmux_gpio_mask[0], dt_pinmux_gpio_mask[1],
	       dt_pinmux_gpio_mask[2], dt_pinmux_gpio_mask[3]);
#endif

#ifdef CONFIG_GPIOLIB
	/* hawaii has 4 banks of GPIO pins */
	kona_gpio_init(4);
#endif
	/*
	  Ensure that all MM accesss to CENTRAL HUB are blocked.
	  This is to ensure that spurious access such as :
	  1. reset value of UNICAM address registers,
	  2. V3D access (un-intentional)
	  are ignored.
	*/
	block_mm_access_to_hub();
	//scu_init((void __iomem *)KONA_SCU_VA);
	return 0;
}
示例#2
0
static int __init rhea_init(void)
{
	pm_power_off = rhea_poweroff;
	arm_pm_restart = rhea_restart;

#ifdef CONFIG_CACHE_L2X0
	rhea_l2x0_init();
#endif

	pinmux_init();

#ifdef CONFIG_KONA_ATAG_DT
	printk(KERN_INFO "pinmux_gpio_mask: 0x%x, 0x%x, 0x%x, 0x%x\n",
		dt_pinmux_gpio_mask[0], dt_pinmux_gpio_mask[1],
		dt_pinmux_gpio_mask[2], dt_pinmux_gpio_mask[3]);
#endif

#ifdef CONFIG_GPIOLIB
	/* rhea has 4 banks of GPIO pins */
	kona_gpio_init(4);
#endif


	return 0;
}
示例#3
0
static int __init hawaii_init(void)
{
	pm_power_off = hawaii_poweroff;

	cpu_info_verbose();
	pinmux_init();

#ifdef CONFIG_KONA_ATAG_DT
	printk(KERN_INFO "pinmux_gpio_mask: 0x%x, 0x%x, 0x%x, 0x%x\n",
	       dt_pinmux_gpio_mask[0], dt_pinmux_gpio_mask[1],
	       dt_pinmux_gpio_mask[2], dt_pinmux_gpio_mask[3]);
#endif

#ifdef CONFIG_GPIOLIB
	/* hawaii has 4 banks of GPIO pins */
	kona_gpio_init(4);
#endif

	scu_init((void __iomem *)KONA_SCU_VA);
	return 0;
}