unsigned long write_coreboot_table( unsigned long low_table_start, unsigned long low_table_end, unsigned long rom_table_start, unsigned long rom_table_end) { struct lb_header *head; struct lb_memory *mem; if (low_table_start || low_table_end) { printk(BIOS_DEBUG, "Writing table forward entry at 0x%08lx\n", low_table_end); head = lb_table_init(low_table_end); lb_forward(head, (struct lb_header*)rom_table_end); low_table_end = (unsigned long) lb_table_fini(head, 0); printk(BIOS_DEBUG, "Table forward entry ends at 0x%08lx.\n", low_table_end); low_table_end = ALIGN(low_table_end, 4096); printk(BIOS_DEBUG, "... aligned to 0x%08lx\n", low_table_end); } printk(BIOS_DEBUG, "Writing coreboot table at 0x%08lx\n", rom_table_end); head = lb_table_init(rom_table_end); rom_table_end = (unsigned long)head; printk(BIOS_DEBUG, "rom_table_end = 0x%08lx\n", rom_table_end); rom_table_end = ALIGN(rom_table_end, (64 * 1024)); printk(BIOS_DEBUG, "... aligned to 0x%08lx\n", rom_table_end); #if CONFIG_USE_OPTION_TABLE { struct cmos_option_table *option_table = cbfs_get_file_content( CBFS_DEFAULT_MEDIA, "cmos_layout.bin", CBFS_COMPONENT_CMOS_LAYOUT); if (option_table) { struct lb_record *rec_dest = lb_new_record(head); /* Copy the option config table, it's already a lb_record... */ memcpy(rec_dest, option_table, option_table->size); /* Create cmos checksum entry in coreboot table */ lb_cmos_checksum(head); } else { printk(BIOS_ERR, "cmos_layout.bin could not be found!\n"); } } #endif /* The Linux kernel assumes this region is reserved */ /* Record where RAM is located */ mem = build_lb_mem(head); if (low_table_start || low_table_end) { /* Record the mptable and the the lb_table. * (This will be adjusted later) */ lb_add_memory_range(mem, LB_MEM_TABLE, low_table_start, low_table_end - low_table_start); } /* Record the pirq table, acpi tables, and maybe the mptable. However, * these only need to be added when the rom_table is sitting below * 1MiB. If it isn't that means high tables are being written. * The code below handles high tables correctly. */ if (rom_table_end <= (1 << 20)) lb_add_memory_range(mem, LB_MEM_TABLE, rom_table_start, rom_table_end - rom_table_start); #if CONFIG_DYNAMIC_CBMEM cbmem_add_lb_mem(mem); #else /* CONFIG_DYNAMIC_CBMEM */ lb_add_memory_range(mem, LB_MEM_TABLE, high_tables_base, high_tables_size); #endif /* CONFIG_DYNAMIC_CBMEM */ /* Add reserved regions */ add_lb_reserved(mem); lb_dump_memory_ranges(mem); /* Note: * I assume that there is always memory at immediately after * the low_table_end. This means that after I setup the coreboot table. * I can trivially fixup the reserved memory ranges to hold the correct * size of the coreboot table. */ /* Record our motherboard */ lb_mainboard(head); /* Record the serial port, if present */ lb_serial(head); /* Record our console setup */ lb_console(head); /* Record our various random string information */ lb_strings(head); /* Record our framebuffer */ lb_framebuffer(head); #if CONFIG_CHROMEOS /* Record our GPIO settings (ChromeOS specific) */ lb_gpios(head); /* pass along the VDAT buffer adress */ lb_vdat(head); /* pass along VBNV offsets in CMOS */ lb_vbnv(head); /* pass along the vboot_handoff address. */ lb_vboot_handoff(head); #endif add_cbmem_pointers(head); /* Remember where my valid memory ranges are */ return lb_table_fini(head, 1); }
unsigned long write_coreboot_table( unsigned long low_table_start, unsigned long low_table_end, unsigned long rom_table_start, unsigned long rom_table_end) { struct lb_header *head; struct lb_memory *mem; #if CONFIG_WRITE_HIGH_TABLES == 1 printk(BIOS_DEBUG, "Writing high table forward entry at 0x%08lx\n", low_table_end); head = lb_table_init(low_table_end); lb_forward(head, (struct lb_header*)rom_table_end); low_table_end = (unsigned long) lb_table_fini(head, 0); printk(BIOS_DEBUG, "New low_table_end: 0x%08lx\n", low_table_end); printk(BIOS_DEBUG, "Now going to write high coreboot table at 0x%08lx\n", rom_table_end); head = lb_table_init(rom_table_end); rom_table_end = (unsigned long)head; printk(BIOS_DEBUG, "rom_table_end = 0x%08lx\n", rom_table_end); #else if(low_table_end > (0x1000 - sizeof(struct lb_header))) { /* after 4K */ /* We need to put lbtable on to [0xf0000,0x100000) */ head = lb_table_init(rom_table_end); rom_table_end = (unsigned long)head; } else { head = lb_table_init(low_table_end); low_table_end = (unsigned long)head; } #endif printk(BIOS_DEBUG, "Adjust low_table_end from 0x%08lx to ", low_table_end); low_table_end += 0xfff; // 4K aligned low_table_end &= ~0xfff; printk(BIOS_DEBUG, "0x%08lx \n", low_table_end); /* The Linux kernel assumes this region is reserved */ printk(BIOS_DEBUG, "Adjust rom_table_end from 0x%08lx to ", rom_table_end); rom_table_end += 0xffff; // 64K align rom_table_end &= ~0xffff; printk(BIOS_DEBUG, "0x%08lx \n", rom_table_end); #if (CONFIG_USE_OPTION_TABLE == 1) { struct lb_record *rec_dest = lb_new_record(head); /* Copy the option config table, it's already a lb_record... */ memcpy(rec_dest, &option_table, option_table.size); /* Create cmos checksum entry in coreboot table */ lb_cmos_checksum(head); } #endif /* Record where RAM is located */ mem = build_lb_mem(head); /* Record the mptable and the the lb_table (This will be adjusted later) */ lb_add_memory_range(mem, LB_MEM_TABLE, low_table_start, low_table_end - low_table_start); /* Record the pirq table, acpi tables, and maybe the mptable */ lb_add_memory_range(mem, LB_MEM_TABLE, rom_table_start, rom_table_end-rom_table_start); #if CONFIG_WRITE_HIGH_TABLES == 1 printk(BIOS_DEBUG, "Adding high table area\n"); // should this be LB_MEM_ACPI? lb_add_memory_range(mem, LB_MEM_TABLE, high_tables_base, high_tables_size); #endif /* Add reserved regions */ add_lb_reserved(mem); #if (CONFIG_HAVE_MAINBOARD_RESOURCES == 1) add_mainboard_resources(mem); #endif lb_dump_memory_ranges(mem); /* Note: * I assume that there is always memory at immediately after * the low_table_end. This means that after I setup the coreboot table. * I can trivially fixup the reserved memory ranges to hold the correct * size of the coreboot table. */ /* Record our motherboard */ lb_mainboard(head); /* Record the serial port, if present */ lb_serial(head); /* Record our console setup */ lb_console(head); /* Record our various random string information */ lb_strings(head); /* Record our framebuffer */ lb_framebuffer(head); /* Remember where my valid memory ranges are */ return lb_table_fini(head, 1); }