/** * pinMode - Configures either a digital pin or tsi pin as a wakeup source. * * Teensy 3.x (digital pin) * @param pin - sleep pins(1-33), deepSleep, hibernate pins (2,4,6,7,9,10,11,13,16,21,22,26,30,33) * @param mode - |INPUT|INPUT_PULLUP|OUTPUT| * @param val - |HIGH|LOW|RISING|FALLING|CHANGE| * * Teensy 3.x (tsi pin) * @param pin - sleep pins(does not work), deepSleep, hibernate pins (0,1,15,16,17,18,19,22,23,25,32,33) * @param mode - |TSI| * @param val - threshold capacitance value, greater than this value wakes. * * Teensy LC (digital pin) * @param pin - sleep pins(1-33), deepSleep, hibernate pins (2,4,6,7,9,10,11,13,16,21,22,26) * @param mode - |INPUT|INPUT_PULLUP|OUTPUT| * @param val - |HIGH|LOW|RISING|FALLING|CHANGE| * * Teensy LC (tsi pin) * @param pin - sleep pins(does not work), deepSleep, hibernate pins (0,1,3,4,15,16,17,18,19,22,23) * @param mode - |TSI| * @param val - threshold capacitance value, greater than this value wakes. */ void SnoozeBlock::pinMode( int pin, int mode, int val ) { if ( mode == INPUT ) { digital_configure_pin_mask( pin, mode, val, &digital_mask ); llwu_configure_pin_mask( pin, val, &llwu_mask ); } else if ( mode == INPUT_PULLUP ) { digital_configure_pin_mask( pin, mode, val, &digital_mask ); llwu_configure_pin_mask( pin, val, &llwu_mask ); } else if ( mode == OUTPUT ) { digital_configure_pin_mask( pin, mode, val, &digital_mask ); llwu_configure_pin_mask( pin, val, &llwu_mask ); } else if ( mode == TSI ) { tsi_configure_pin_mask( pin, val, &tsi_mask ); llwu_configure_modules_mask( LLWU_TSI_MOD, &llwu_mask ); } }
/******************************************************************************* * Enable Driver *******************************************************************************/ void SnoozeCompare::enableDriver( void ) { if ( mode == RUN_LP ) { return; } if ( mode == VLPW || mode == VLPS ) { IRQ_NUMBER_t IRQ_CMP; switch (pin) { case 11: IRQ_CMP = IRQ_CMP0; break; #if defined(KINETISK) case 9: IRQ_CMP = IRQ_CMP1; break; case 4: IRQ_CMP = IRQ_CMP2; break; #endif default: IRQ_CMP = IRQ_CMP; return; } return_priority = NVIC_GET_PRIORITY( IRQ_CMP );//get current priority int priority = nvic_execution_priority( );// get current priority // if running from handler mode set priority higher than current handler priority = ( priority < 256 ) && ( ( priority - 16 ) > 0 ) ? priority - 16 : 128; NVIC_SET_PRIORITY( IRQ_CMP, priority );//set priority to new level __disable_irq( ); return_cmp_irq = _VectorsRam[IRQ_CMP+16];// save prev isr attachInterruptVector( IRQ_CMP, wakeupIsr ); __enable_irq( ); } if ( SIM_SCGC4 & SIM_SCGC4_CMP ) SIM_SCGC4_clock_active = true; else SIM_SCGC4 |= SIM_SCGC4_CMP; CR0 = *cmpx_cr0; CR1 = *cmpx_cr1; SCR = *cmpx_scr; FPR = *cmpx_fpr; MUXCR = *cmpx_muxcr; DACCR = *cmpx_daccr; uint8_t _pin = 0; *cmpx_cr0 = 0; *cmpx_cr1 = 0; *cmpx_scr = 0; #if defined(__MKL26Z64__) || defined(__MK66FX1M0__) if ( SIM_SCGC5 & SIM_SCGC5_LPTIMER ) SIM_SCGC5_clock_active = true; else SIM_SCGC5 |= SIM_SCGC5_LPTIMER; PSR = LPTMR0_PSR; CMR = LPTMR0_CMR; CSR = LPTMR0_CSR; #endif if ( pin == 11 ) { if ( mode >= LLS ) llwu_configure_modules_mask( LLWU_CMP0_MOD ); return_core_pin_config[0] = CORE_PIN11_CONFIG; CORE_PIN11_CONFIG = PORT_PCR_MUX( 0 ); _pin = 0x00; } else if ( pin == 4 ) { #if defined(KINETISK) if ( mode >= LLS ) llwu_configure_modules_mask( LLWU_CMP2_MOD ); return_core_pin_config[1] = CORE_PIN4_CONFIG; CORE_PIN4_CONFIG = PORT_PCR_MUX( 0 ); _pin = 0x01; #else return; #endif } else if ( pin == 9 ) { #if defined(KINETISK) if ( mode >= LLS ) llwu_configure_modules_mask( LLWU_CMP1_MOD ); return_core_pin_config[2] = CORE_PIN9_CONFIG; CORE_PIN9_CONFIG = PORT_PCR_MUX( 0 ); _pin = 0x01; #else return; #endif } // save if isr is already enabled and enable isr if not if ( mode == VLPW || mode == VLPS ) { IRQ_NUMBER_t IRQ_CMP; switch (pin) { case 11: IRQ_CMP = IRQ_CMP0; break; #if defined(KINETISK) case 9: IRQ_CMP = IRQ_CMP1; break; case 4: IRQ_CMP = IRQ_CMP2; break; #endif default: IRQ_CMP = IRQ_CMP; return; } return_isr_enabled = NVIC_IS_ENABLED( IRQ_CMP ); if ( return_isr_enabled == 0 ) NVIC_ENABLE_IRQ( IRQ_CMP ); } // setup compare *cmpx_cr0 = CMP_CR0_FILTER_CNT( 0x07 ); if ( type == CHANGE ) *cmpx_scr = CMP_SCR_CFF | CMP_SCR_CFR | CMP_SCR_IEF | CMP_SCR_IER; else if ( type == RISING || type == HIGH ) *cmpx_scr = CMP_SCR_CFF | CMP_SCR_CFR | CMP_SCR_IER; else if ( type == FALLING || type == LOW ) *cmpx_scr = CMP_SCR_CFF | CMP_SCR_CFR | CMP_SCR_IEF; else return; uint8_t tap = ( threshold_crossing/0.0515625 ) - 1; *cmpx_fpr = 0x00; *cmpx_muxcr = CMP_MUXCR_MSEL( 0x07 ) | CMP_MUXCR_PSEL( _pin ); *cmpx_daccr = CMP_DACCR_DACEN | CMP_DACCR_VRSEL | CMP_DACCR_VOSEL( tap ); #if defined(__MKL26Z64__) || defined(__MK66FX1M0__) // compare needs lptmr to operate in low power with LC, 3.6 *cmpx_cr1 = CMP_CR1_EN | CMP_CR1_TRIGM; SIM_SCGC5 |= SIM_SCGC5_LPTIMER; LPTMR0_CSR = 0; LPTMR0_PSR = LPTMR_PSR_PBYP | LPTMR_PSR_PCS( LPTMR_LPO );//LPO Clock LPTMR0_CMR = 1; LPTMR0_CSR = LPTMR_CSR_TEN | LPTMR_CSR_TCF; #else *cmpx_cr1 = CMP_CR1_EN; #endif }
/** * setAlarm - Configures RTC wakeup source. hr, min and sec will be added for the total time. * * @param hours number of hours in the future. * @param minutes number of minutes in the future. * @param seconds number of seconds in the future. */ void SnoozeBlock::setAlarm( uint8_t hours, uint8_t minutes, uint8_t seconds ) { rtc_configure_alarm_mask( hours, minutes, seconds, &rtc_mask ); llwu_configure_modules_mask( LLWU_RTCA_MOD, &llwu_mask ); }
/** * setTimer - wake up period in milli seconds in 1ms granularity. * * @param period 1ms to 65535ms */ void SnoozeBlock::setTimer( uint16_t period ) { lptmr_configure_period_mask( period, &lptmr_mask ); llwu_configure_modules_mask( LLWU_LPTMR_MOD, &llwu_mask ); }
/** * pinMode - Configures compare wakeup source. * * @param pin either pin 11 or 12 can be used * @param mode |CMP| * @param type |RISING|FALLING| * @param val threshold crossing value in volts. */ void SnoozeBlock::pinMode( int pin, int mode, int type, double val ) { if ( mode == CMP ) { cmp_configure_pin_mask( pin, mode, type, val, &cmp_mask ); llwu_configure_modules_mask( LLWU_CMP0_MOD, &llwu_mask ); } }