int board_init(void) { #ifndef CONFIG_SYS_FSL_NO_SERDES fsl_serdes_init(); #ifndef CONFIG_QSPI_BOOT config_serdes_mux(); #endif #endif ls1021x_config_caam_stream_id(sec_liodn_tbl, ARRAY_SIZE(sec_liodn_tbl)); ls102xa_config_smmu_stream_id(dev_stream_id, ARRAY_SIZE(dev_stream_id)); #ifdef CONFIG_LS102XA_NS_ACCESS enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev)); #endif #ifdef CONFIG_U_QE u_qe_init(); #endif #ifdef CONFIG_DEEP_SLEEP ls1twr_program_regulator(); #endif return 0; }
int board_init(void) { #ifndef CONFIG_SYS_FSL_NO_SERDES fsl_serdes_init(); #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) config_serdes_mux(); #endif #endif ls1021x_config_caam_stream_id(sec_liodn_tbl, ARRAY_SIZE(sec_liodn_tbl)); ls102xa_config_smmu_stream_id(dev_stream_id, ARRAY_SIZE(dev_stream_id)); #ifdef CONFIG_LAYERSCAPE_NS_ACCESS enable_layerscape_ns_access(); #endif #ifdef CONFIG_U_QE u_qe_init(); #endif #ifdef CONFIG_DEEP_SLEEP ls1twr_program_regulator(); #endif return 0; }
int board_init(void) { #ifdef CONFIG_SYS_FSL_ERRATUM_A010315 erratum_a010315(); #endif #ifndef CONFIG_SYS_FSL_NO_SERDES fsl_serdes_init(); #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) config_serdes_mux(); #endif #endif ls102xa_smmu_stream_id_init(); #ifdef CONFIG_U_QE u_qe_init(); #endif #ifdef CONFIG_DEEP_SLEEP ls1twr_program_regulator(); #endif return 0; }