示例#1
0
static void __init easy98020_init(void)
{
	falcon_register_i2c();
	falcon_register_spi_flash(&easy98020_spi_flash_data);
	ltq_add_device_gpio_leds(-1, ARRAY_SIZE(easy98020_gpio_leds),
					easy98020_gpio_leds);
}
示例#2
0
static void __init board_95C3AM1_init(void)
{
	falcon_register_i2c();
	falcon_register_spi_flash(&board_95C3AM1_flash_data);
	platform_device_register(&board_95C3AM1_i2c_gpio_device);
	ltq_add_device_gpio_leds(-1, ARRAY_SIZE(board_95C3AM1_gpio_leds),
						board_95C3AM1_gpio_leds);
}
示例#3
0
文件: mach-wbmr.c 项目: 7LK/McWRT
static void __init
wbmr_init(void)
{
#define WMBR_BRN_MAC			0x1fd0024

	ltq_add_device_gpio_leds(-1, ARRAY_SIZE(wbmr_gpio_leds), wbmr_gpio_leds);
	ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL, ARRAY_SIZE(wbmr_gpio_keys), wbmr_gpio_keys);
	ltq_register_nor(&wbmr_flash_data);
	ltq_register_pci(&ltq_pci_data);
	memcpy_fromio(&ltq_eth_data.mac.sa_data,
		(void *)KSEG1ADDR(LTQ_FLASH_START + WMBR_BRN_MAC), 6);
	ltq_register_etop(&ltq_eth_data);
	xway_register_dwc(36);
}
示例#4
0
static void __init gigasx76x_init(void) {
#define GIGASX76X_USB		29
#define GIGASX76X_MADWIFI_ADDR	0xb07f0000

	ltq_register_gpio_stp();
	ltq_register_nor(&gigasx76x_flash_data);
	ltq_register_pci(&ltq_pci_data);
	gigasx76x_register_ethernet();
	xway_register_dwc(GIGASX76X_USB);
	ltq_register_tapi();
	ltq_register_madwifi_eep(GIGASX76X_MADWIFI_ADDR);
	ltq_add_device_gpio_leds(-1, ARRAY_SIZE(gigasx76x_gpio_leds), gigasx76x_gpio_leds);
	ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL, ARRAY_SIZE(gigasx76x_gpio_keys), gigasx76x_gpio_keys);
}
示例#5
0
static void __init
p2601hnfx_init(void)
{
#define P2601HNFX_USB			9

	ltq_register_gpio_stp();
	ltq_add_device_gpio_leds(-1, ARRAY_SIZE(p2601hnfx_leds_gpio), p2601hnfx_leds_gpio);
	ltq_register_gpio_buttons(p2601hnfx_gpio_buttons, ARRAY_SIZE(p2601hnfx_gpio_buttons));
	ltq_register_nor(&p2601hnfx_flash_data);
	ltq_register_etop(&ltq_eth_data);
	xway_register_dwc(P2601HNFX_USB);

	// enable the ethernet ports on the SoC
//	ltq_w32((ltq_r32(LTQ_GPORT_P0_CTL) & ~(1 << 17)) | (1 << 18), LTQ_GPORT_P0_CTL);
//	ltq_w32((ltq_r32(LTQ_GPORT_P1_CTL) & ~(1 << 17)) | (1 << 18), LTQ_GPORT_P1_CTL);
//	ltq_w32((ltq_r32(LTQ_GPORT_P2_CTL) & ~(1 << 17)) | (1 << 18), LTQ_GPORT_P2_CTL);
}