static DoubleFuncPtr gen_invoke_double_managed_func() {
static DoubleFuncPtr func = NULL;
if (func) {
return func;
}
const int STUB_SIZE = 132;
char * stub = (char *) malloc_fixed_code_for_jit(STUB_SIZE,
DEFAULT_CODE_ALIGNMENT, CODE_BLOCK_HEAT_DEFAULT, CAA_Allocate);
func = (DoubleFuncPtr) stub;
stub = gen_invoke_common_managed_func(stub);
// Put return value on FPU stack.
M_Opnd memloc(esp_reg, -8);
stub = sse_mov(stub, memloc, xmm0_opnd, true);
stub = fld(stub, memloc, true);
stub = ret(stub);
assert(stub - (char *)func <= STUB_SIZE);
compile_add_dynamic_generated_code_chunk("invoke_double_managed_func", false, (void*)func, stub - (char*)func);
DUMP_STUB(func, "invoke_double_managed_func", stub - (char *)func);
return func;
}
static void* getaddress__pop_java_to_native_frame()
{
static void *addr = 0;
if (addr) {
return addr;
}
const int stub_size = 32 + m2n_pop_m2n_size(false, 1, 0);
char *stub = (char *)malloc_fixed_code_for_jit(stub_size, DEFAULT_CODE_ALIGNMENT, CODE_BLOCK_HEAT_MAX/2, CAA_Allocate);
#ifdef _DEBUG
memset(stub, 0xcc /*int 3*/, stub_size);
#endif
char *ss = stub;
ss = mov(ss, r12_opnd, rax_opnd);
ss = m2n_gen_pop_m2n(ss, false, 1, 8, 0);
ss = mov(ss, rax_opnd, r12_opnd);
ss = mov(ss, r11_opnd, M_Base_Opnd(rsp_reg, 0));
ss = mov(ss, r12_opnd, M_Base_Opnd(rsp_reg, m2n_sizeof_m2n_frame - 8));
ss = mov(ss, M_Base_Opnd(rsp_reg, m2n_sizeof_m2n_frame - 8), r11_opnd);
ss = alu(ss, add_opc, rsp_opnd, Imm_Opnd(m2n_sizeof_m2n_frame - 8));
ss = ret(ss);
assert((ss - stub) <= stub_size);
addr = stub;
compile_add_dynamic_generated_code_chunk("pop_java_to_native_frame", false, stub, stub_size);
// Put TI support here.
DUMP_STUB(stub, "getaddress__pop_java_to_native_frame", ss - stub);
return addr;
} //getaddress__pop_java_to_native_frame
static void* getaddress__setup_java_to_native_frame()
{
static void *addr = 0;
if (addr) {
return addr;
}
const int stub_size = 32 + m2n_push_m2n_size(1, 0);
char *stub = (char *)malloc_fixed_code_for_jit(stub_size, DEFAULT_CODE_ALIGNMENT, CODE_BLOCK_HEAT_MAX/2, CAA_Allocate);
#ifdef _DEBUG
memset(stub, 0xcc /*int 3*/, stub_size);
#endif
char *ss = stub;
// Stack changes
// prev new
//
// ... ...
// -------- -------- ------------
// ret ret
// -------- --------
// ret r12
// -------- -------- m2n frame
//
// ...
//
// -------- ------------
// ret
// --------
ss = alu(ss, sub_opc, rsp_opnd, Imm_Opnd(m2n_sizeof_m2n_frame - 8));
ss = mov(ss, r11_opnd, M_Base_Opnd(rsp_reg, m2n_sizeof_m2n_frame - 8));
ss = mov(ss, M_Base_Opnd(rsp_reg, m2n_sizeof_m2n_frame - 8), r12_opnd);
ss = mov(ss, M_Base_Opnd(rsp_reg, 0), r11_opnd);
ss = mov(ss, r12_opnd, rdi_opnd);
ss = m2n_gen_push_m2n(ss, NULL, FRAME_UNKNOWN, false, 1, 0,
m2n_sizeof_m2n_frame);
ss = mov(ss, rdi_opnd, r12_opnd);
ss = ret(ss);
assert((ss - stub) <= stub_size);
addr = stub;
compile_add_dynamic_generated_code_chunk("setup_java_to_native_frame", false, stub, stub_size);
// Put TI support here.
DUMP_STUB(stub, "getaddress__setup_java_to_native_frame", ss - stub);
return addr;
} //getaddress__setup_java_to_native_frame
static IntFuncPtr gen_invoke_int_managed_func() {
static IntFuncPtr func = NULL;
if (func) {
return func;
}
const int STUB_SIZE = 124;
char * stub = (char *) malloc_fixed_code_for_jit(STUB_SIZE,
DEFAULT_CODE_ALIGNMENT, CODE_BLOCK_HEAT_DEFAULT, CAA_Allocate);
func = (IntFuncPtr) stub;
stub = gen_invoke_common_managed_func(stub);
stub = ret(stub);
assert(stub - (char *)func <= STUB_SIZE);
compile_add_dynamic_generated_code_chunk("invoke_int_managed_func", false, (void*)func, stub - (char*)func);
DUMP_STUB(func, "invoke_int_managed_func", stub - (char *)func);
return func;
}
static transfer_control_stub_type gen_transfer_control_stub()
{
static transfer_control_stub_type addr = NULL;
if (addr) {
return addr;
}
const int STUB_SIZE = 255;
char * stub = (char *)malloc_fixed_code_for_jit(STUB_SIZE,
DEFAULT_CODE_ALIGNMENT, CODE_BLOCK_HEAT_COLD, CAA_Allocate);
char * ss = stub;
#ifndef NDEBUG
memset(stub, 0xcc /*int 3*/, STUB_SIZE);
#endif
//
// ************* LOW LEVEL DEPENDENCY! ***************
// This code sequence must be atomic. The "atomicity" effect is achieved by
// changing the rsp at the very end of the sequence.
// rdx holds the pointer to the stack iterator
#if defined (PLATFORM_POSIX) // RDI holds 1st parameter on Linux
ss = mov(ss, rdx_opnd, rdi_opnd);
#else // RCX holds 1st parameter on Windows
ss = mov(ss, rdx_opnd, rcx_opnd);
#endif
// Restore general registers
ss = get_reg(ss, rbp_opnd, rdx_reg, CONTEXT_OFFSET(p_rbp), false);
ss = get_reg(ss, rbx_opnd, rdx_reg, CONTEXT_OFFSET(p_rbx), true);
ss = get_reg(ss, r12_opnd, rdx_reg, CONTEXT_OFFSET(p_r12), true);
ss = get_reg(ss, r13_opnd, rdx_reg, CONTEXT_OFFSET(p_r13), true);
ss = get_reg(ss, r14_opnd, rdx_reg, CONTEXT_OFFSET(p_r14), true);
ss = get_reg(ss, r15_opnd, rdx_reg, CONTEXT_OFFSET(p_r15), true);
ss = get_reg(ss, rsi_opnd, rdx_reg, CONTEXT_OFFSET(p_rsi), true);
ss = get_reg(ss, rdi_opnd, rdx_reg, CONTEXT_OFFSET(p_rdi), true);
ss = get_reg(ss, r8_opnd, rdx_reg, CONTEXT_OFFSET(p_r8), true);
ss = get_reg(ss, r9_opnd, rdx_reg, CONTEXT_OFFSET(p_r9), true);
ss = get_reg(ss, r10_opnd, rdx_reg, CONTEXT_OFFSET(p_r10), true);
ss = get_reg(ss, r11_opnd, rdx_reg, CONTEXT_OFFSET(p_r11), true);
// Get the new RSP
M_Base_Opnd saved_rsp(rdx_reg, CONTEXT_OFFSET(rsp));
ss = mov(ss, rax_opnd, saved_rsp);
// Store it over return address for future use
ss = mov(ss, M_Base_Opnd(rsp_reg, 0), rax_opnd);
// Get the new RIP
ss = get_reg(ss, rcx_opnd, rdx_reg, CONTEXT_OFFSET(p_rip), false);
// Store RIP to [<new RSP> - 136] to preserve 128 bytes under RSP
// which are 'reserved' on Linux
ss = mov(ss, M_Base_Opnd(rax_reg, -136), rcx_opnd);
ss = get_reg(ss, rax_opnd, rdx_reg, CONTEXT_OFFSET(p_rax), true);
// Restore processor flags
ss = movzx(ss, rcx_opnd, M_Base_Opnd(rdx_reg, CONTEXT_OFFSET(eflags)), size_16);
ss = test(ss, rcx_opnd, rcx_opnd);
ss = branch8(ss, Condition_Z, Imm_Opnd(size_8, 0));
char* patch_offset = ((char*)ss) - 1; // Store location for jump patch
*ss++ = (char)0x9C; // PUSHFQ
M_Base_Opnd sflags(rsp_reg, 0);
ss = alu(ss, and_opc, sflags, Imm_Opnd(size_32,FLG_CLEAR_MASK), size_32);
ss = alu(ss, and_opc, rcx_opnd, Imm_Opnd(size_32,FLG_SET_MASK), size_32);
ss = alu(ss, or_opc, sflags, rcx_opnd, size_32);
*ss++ = (char)0x9D; // POPFQ
// Patch conditional jump
POINTER_SIZE_SINT offset =
(POINTER_SIZE_SINT)ss - (POINTER_SIZE_SINT)patch_offset - 1;
*patch_offset = (char)offset;
ss = get_reg(ss, rcx_opnd, rdx_reg, CONTEXT_OFFSET(p_rcx), true, true);
ss = get_reg(ss, rdx_opnd, rdx_reg, CONTEXT_OFFSET(p_rdx), true, true);
// Setup stack pointer to previously saved value
ss = mov(ss, rsp_opnd, M_Base_Opnd(rsp_reg, 0));
// Jump to address stored to [<new RSP> - 136]
ss = jump(ss, M_Base_Opnd(rsp_reg, -136));
addr = (transfer_control_stub_type)stub;
assert(ss-stub <= STUB_SIZE);
/*
The following code will be generated:
mov rdx,rcx
mov rbp,qword ptr [rdx+10h]
mov rbp,qword ptr [rbp]
mov rbx,qword ptr [rdx+20h]
test rbx,rbx
je __label1__
mov rbx,qword ptr [rbx]
__label1__
; .... The same for r12,r13,r14,r15,rsi,rdi,r8,r9,r10
mov r11,qword ptr [rdx+88h]
test r11,r11
je __label11__
mov r11,qword ptr [r11]
__label11__
mov rax,qword ptr [rdx+8]
mov qword ptr [rsp],rax
mov rcx,qword ptr [rdx+18h]
mov rcx,qword ptr [rcx]
mov qword ptr [rax-88h],rcx
mov rax,qword ptr [rdx+48h]
test rax,rax
je __label12__
mov rax,qword ptr [rax]
__label12__
movzx rcx,word ptr [rdx+90h]
test rcx,rcx
je __label13__
pushfq
and dword ptr [rsp], 0x003F7202
and ecx, 0x00000CD5
or dword ptr [esp], ecx
popfq
__label13__
mov rcx,qword ptr [rdx+50h]
pushfq
test rcx,rcx
je __label14__
mov rcx,qword ptr [rcx]
__label14__
popfq
mov rdx,qword ptr [rdx+58h]
pushfq
test rdx,rdx
je __label15__
mov rdx,qword ptr [rdx]
__label15__
popfq
mov rsp,qword ptr [rsp]
jmp qword ptr [rsp-88h]
*/
DUMP_STUB(stub, "getaddress__transfer_control", ss-stub);
return addr;
}
