static void map_cpu_to_logical_apicid(void)
{
int cpu = smp_processor_id();
int apicid = logical_smp_processor_id();
cpu_2_logical_apicid[cpu] = apicid;
map_cpu_to_node(cpu, apicid_to_node(apicid));
}
int __ref arch_register_cpu(int num)
{
#ifdef CONFIG_ACPI
/*
* If CPEI can be re-targetted or if this is not
* CPEI target, then it is hotpluggable
*/
if (can_cpei_retarget() || !is_cpu_cpei_target(num))
sysfs_cpus[num].cpu.hotpluggable = 1;
map_cpu_to_node(num, node_cpuid[num].nid);
#endif
return register_cpu(&sysfs_cpus[num].cpu, num);
}
void setup_nonnuma(void)
{
unsigned long i;
for (i = 0; i < NR_CPUS; i++)
map_cpu_to_node(i, 0);
node_data[0].node_start_pfn = 0;
node_data[0].node_spanned_pages = lmb_end_of_DRAM() / PAGE_SIZE;
for (i = 0 ; i < lmb_end_of_DRAM(); i += MEMORY_INCREMENT)
numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] = 0;
}
int arch_register_cpu(int num)
{
#if defined (CONFIG_ACPI) && defined (CONFIG_HOTPLUG_CPU)
/*
* If CPEI cannot be re-targetted, and this is
* CPEI target, then dont create the control file
*/
if (!can_cpei_retarget() && is_cpu_cpei_target(num))
sysfs_cpus[num].cpu.no_control = 1;
map_cpu_to_node(num, node_cpuid[num].nid);
#endif
return register_cpu(&sysfs_cpus[num].cpu, num);
}
/*
* Figure out to which domain a cpu belongs and stick it there.
* Return the id of the domain used.
*/
static int numa_setup_cpu(unsigned long lcpu)
{
int nid = -1;
struct device_node *cpu;
/*
* If a valid cpu-to-node mapping is already available, use it
* directly instead of querying the firmware, since it represents
* the most recent mapping notified to us by the platform (eg: VPHN).
*/
if ((nid = numa_cpu_lookup_table[lcpu]) >= 0) {
map_cpu_to_node(lcpu, nid);
return nid;
}
cpu = of_get_cpu_node(lcpu, NULL);
if (!cpu) {
WARN_ON(1);
if (cpu_present(lcpu))
goto out_present;
else
goto out;
}
nid = of_node_to_nid_single(cpu);
out_present:
if (nid < 0 || !node_online(nid))
nid = first_online_node;
map_cpu_to_node(lcpu, nid);
of_node_put(cpu);
out:
return nid;
}
/**
* build_cpu_to_node_map - setup cpu to node and node to cpumask arrays
*
* Build cpu to node mapping and initialize the per node cpu masks using
* info from the node_cpuid array handed to us by ACPI.
*/
void __init build_cpu_to_node_map(void)
{
int cpu, i, node;
for(node=0; node < MAX_NUMNODES; node++)
cpus_clear(node_to_cpu_mask[node]);
for_each_possible_early_cpu(cpu) {
node = -1;
for (i = 0; i < NR_CPUS; ++i)
if (cpu_physical_id(cpu) == node_cpuid[i].phys_id) {
node = node_cpuid[i].nid;
break;
}
map_cpu_to_node(cpu, node);
}
}
static int __init parse_numa_properties(void)
{
struct device_node *cpu = NULL;
struct device_node *memory = NULL;
int depth;
int max_domain = 0;
long entries = lmb_end_of_DRAM() >> MEMORY_INCREMENT_SHIFT;
unsigned long i;
if (strstr(saved_command_line, "numa=off")) {
printk(KERN_WARNING "NUMA disabled by user\n");
return -1;
}
numa_memory_lookup_table =
(char *)abs_to_virt(lmb_alloc(entries * sizeof(char), 1));
for (i = 0; i < entries ; i++)
numa_memory_lookup_table[i] = ARRAY_INITIALISER;
depth = find_min_common_depth();
printk(KERN_INFO "NUMA associativity depth for CPU/Memory: %d\n", depth);
if (depth < 0)
return depth;
for_each_cpu(i) {
int numa_domain;
cpu = find_cpu_node(i);
if (cpu) {
numa_domain = of_node_numa_domain(cpu, depth);
of_node_put(cpu);
if (numa_domain >= MAX_NUMNODES) {
/*
* POWER4 LPAR uses 0xffff as invalid node,
* dont warn in this case.
*/
if (numa_domain != 0xffff)
printk(KERN_ERR "WARNING: cpu %ld "
"maps to invalid NUMA node %d\n",
i, numa_domain);
numa_domain = 0;
}
} else {
printk(KERN_ERR "WARNING: no NUMA information for "
"cpu %ld\n", i);
numa_domain = 0;
}
node_set_online(numa_domain);
if (max_domain < numa_domain)
max_domain = numa_domain;
map_cpu_to_node(i, numa_domain);
}
memory = NULL;
while ((memory = of_find_node_by_type(memory, "memory")) != NULL) {
unsigned long start;
unsigned long size;
int numa_domain;
int ranges;
unsigned int *memcell_buf;
unsigned int len;
memcell_buf = (unsigned int *)get_property(memory, "reg", &len);
if (!memcell_buf || len <= 0)
continue;
ranges = memory->n_addrs;
new_range:
/* these are order-sensitive, and modify the buffer pointer */
start = read_cell_ul(memory, &memcell_buf);
size = read_cell_ul(memory, &memcell_buf);
start = _ALIGN_DOWN(start, MEMORY_INCREMENT);
size = _ALIGN_UP(size, MEMORY_INCREMENT);
numa_domain = of_node_numa_domain(memory, depth);
if (numa_domain >= MAX_NUMNODES) {
if (numa_domain != 0xffff)
printk(KERN_ERR "WARNING: memory at %lx maps "
"to invalid NUMA node %d\n", start,
numa_domain);
numa_domain = 0;
}
node_set_online(numa_domain);
if (max_domain < numa_domain)
max_domain = numa_domain;
/*
* For backwards compatibility, OF splits the first node
* into two regions (the first being 0-4GB). Check for
* this simple case and complain if there is a gap in
* memory
*/
if (node_data[numa_domain].node_spanned_pages) {
unsigned long shouldstart =
node_data[numa_domain].node_start_pfn +
node_data[numa_domain].node_spanned_pages;
if (shouldstart != (start / PAGE_SIZE)) {
printk(KERN_ERR "Hole in node, disabling "
"region start %lx length %lx\n",
start, size);
continue;
}
node_data[numa_domain].node_spanned_pages +=
size / PAGE_SIZE;
} else {
node_data[numa_domain].node_start_pfn =
start / PAGE_SIZE;
node_data[numa_domain].node_spanned_pages =
size / PAGE_SIZE;
}
for (i = start ; i < (start+size); i += MEMORY_INCREMENT)
numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] =
numa_domain;
dbg("memory region %lx to %lx maps to domain %d\n",
start, start+size, numa_domain);
ranges--;
if (ranges)
goto new_range;
}
numnodes = max_domain + 1;
return 0;
}
static int __init parse_numa_properties(void)
{
struct device_node *cpu;
struct device_node *memory;
int *cpu_associativity;
int *memory_associativity;
int depth;
int max_domain = 0;
cpu = find_type_devices("cpu");
if (!cpu)
return -1;
memory = find_type_devices("memory");
if (!memory)
return -1;
cpu_associativity = (int *)get_property(cpu, "ibm,associativity", NULL);
if (!cpu_associativity)
return -1;
memory_associativity = (int *)get_property(memory, "ibm,associativity",
NULL);
if (!memory_associativity)
return -1;
/* find common depth */
if (cpu_associativity[0] < memory_associativity[0])
depth = cpu_associativity[0];
else
depth = memory_associativity[0];
for (cpu = find_type_devices("cpu"); cpu; cpu = cpu->next) {
int *tmp;
int cpu_nr, numa_domain;
tmp = (int *)get_property(cpu, "reg", NULL);
if (!tmp)
continue;
cpu_nr = *tmp;
tmp = (int *)get_property(cpu, "ibm,associativity",
NULL);
if (!tmp)
continue;
numa_domain = tmp[depth];
/* FIXME */
if (numa_domain == 0xffff) {
dbg("cpu %d has no numa doman\n", cpu_nr);
numa_domain = 0;
}
if (numa_domain >= MAX_NUMNODES)
BUG();
if (max_domain < numa_domain)
max_domain = numa_domain;
map_cpu_to_node(cpu_nr, numa_domain);
}
for (memory = find_type_devices("memory"); memory;
memory = memory->next) {
int *tmp1, *tmp2;
unsigned long i;
unsigned long start = 0;
unsigned long size = 0;
int numa_domain;
int ranges;
tmp1 = (int *)get_property(memory, "reg", NULL);
if (!tmp1)
continue;
ranges = memory->n_addrs;
new_range:
i = prom_n_size_cells(memory);
while (i--) {
start = (start << 32) | *tmp1;
tmp1++;
}
i = prom_n_size_cells(memory);
while (i--) {
size = (size << 32) | *tmp1;
tmp1++;
}
start = _ALIGN_DOWN(start, MEMORY_INCREMENT);
size = _ALIGN_UP(size, MEMORY_INCREMENT);
if ((start + size) > MAX_MEMORY)
BUG();
tmp2 = (int *)get_property(memory, "ibm,associativity",
NULL);
if (!tmp2)
continue;
numa_domain = tmp2[depth];
/* FIXME */
if (numa_domain == 0xffff) {
dbg("memory has no numa doman\n");
numa_domain = 0;
}
if (numa_domain >= MAX_NUMNODES)
BUG();
if (max_domain < numa_domain)
max_domain = numa_domain;
/*
* For backwards compatibility, OF splits the first node
* into two regions (the first being 0-4GB). Check for
* this simple case and complain if there is a gap in
* memory
*/
if (node_data[numa_domain].node_spanned_pages) {
unsigned long shouldstart =
node_data[numa_domain].node_start_pfn +
node_data[numa_domain].node_spanned_pages;
if (shouldstart != (start / PAGE_SIZE)) {
printk(KERN_ERR "Hole in node, disabling "
"region start %lx length %lx\n",
start, size);
continue;
}
node_data[numa_domain].node_spanned_pages += size / PAGE_SIZE;
} else {
node_data[numa_domain].node_start_pfn =
start / PAGE_SIZE;
node_data[numa_domain].node_spanned_pages = size / PAGE_SIZE;
}
for (i = start ; i < (start+size); i += MEMORY_INCREMENT)
numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] =
numa_domain;
dbg("memory region %lx to %lx maps to domain %d\n",
start, start+size, numa_domain);
ranges--;
if (ranges)
goto new_range;
}
numnodes = max_domain + 1;
return 0;
}
