int
mc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
{
struct mc_softc *sc = ifp->if_softc;
struct ifaddr *ifa = (struct ifaddr *)data;
int s, err = 0;
s = splnet();
switch (cmd) {
case SIOCSIFADDR:
ifp->if_flags |= IFF_UP;
if (!(ifp->if_flags & IFF_RUNNING))
mc_init(sc);
#ifdef INET
if (ifa->ifa_addr->sa_family == AF_INET)
arp_ifinit(&sc->sc_arpcom, ifa);
#endif
break;
case SIOCSIFFLAGS:
if ((ifp->if_flags & IFF_UP) == 0 &&
(ifp->if_flags & IFF_RUNNING) != 0) {
/*
* If interface is marked down and it is running,
* then stop it.
*/
mc_stop(sc);
} else if ((ifp->if_flags & IFF_UP) != 0 &&
(ifp->if_flags & IFF_RUNNING) == 0) {
/*
* If interface is marked up and it is stopped,
* then start it.
*/
mc_init(sc);
} else {
/*
* reset the interface to pick up any other changes
* in flags
*/
mc_reset(sc);
mc_start(ifp);
}
break;
default:
err = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data);
}
if (err == ENETRESET) {
if (ifp->if_flags & IFF_RUNNING)
mc_reset(sc);
err = 0;
}
splx(s);
return (err);
}
int init_mc(struct ctx *p_ctx, res_hndl_t *res_hndl)
{
int rc;
__u64 chunks=16;
__u64 actual_size=0;
rc = mc_init();
CHECK_RC(rc, "mc_init failed");
debug("mc_init success :%d\n",rc);
rc = ctx_init(p_ctx);
CHECK_RC(rc, "Context init failed");
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *)p_ctx->p_host_map,&p_ctx->mc_hndl);
CHECK_RC(rc, "ctx reg failed");
rc = mc_open(p_ctx->mc_hndl,MC_RDWR, &p_ctx->res_hndl);
CHECK_RC(rc, "opening res_hndl");
rc = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl,chunks, &actual_size);
CHECK_RC(rc, "mc_size");
rc = mc_open(p_ctx->mc_hndl,MC_RDWR, res_hndl);
CHECK_RC(rc, "opening res_hndl");
rc = mc_size(p_ctx->mc_hndl, *res_hndl, chunks, &actual_size);
CHECK_RC(rc, "mc_size");
return 0;
}
int init_mc(struct ctx *p_ctx, res_hndl_t *res_hndl)
{
int rc;
__u64 chunks=16;
__u64 actual_size=0;
rc = mc_init();
CHECK_RC(rc, "mc_init failed");
debug("mc_init success :%d\n",rc);
rc = ctx_init(p_ctx);
CHECK_RC(rc, "Context init failed");
rc = create_res(p_ctx);
CHECK_RC(rc, "opening res_hndl");
rc = mc_size1(p_ctx,chunks, &actual_size);
CHECK_RC(rc, "mc_size");
*res_hndl = p_ctx->res_hndl;
rc = create_res(p_ctx);
CHECK_RC(rc, "opening res_hndl");
rc = mc_size1(p_ctx, chunks, &actual_size);
CHECK_RC(rc, "mc_size");
return 0;
}
static
void listen_client_callback(struct evconnlistener *evl, evutil_socket_t fd,
struct sockaddr *sock, int len, void *ctx)
{
struct server *s = (struct server *)ctx;
struct event_base *base = evconnlistener_get_base(evl);
int errcode;
log_debug("A client is connecting");
client_init_callback();
memset(&s->mc_client, 0, sizeof(s->mc_client));
/* Notifiy the mc_init that we are in an SSL_ACCEPTING state*/
/* Even if we are not in a SSL context, mc_init know what to do anyway*/
s->mc_client.ssl_flags = BUFFEREVENT_SSL_ACCEPTING;
errcode = mc_init(&s->mc_client, base, fd, sock, (socklen_t)len, s->server_ctx);
if (errcode != -1)
{
bufferevent_setcb(s->mc_client.bev, client_mc_read_cb, NULL,
client_mc_event_cb, s);
log_debug("[CLT] client connected");
}
else
{
log_notice("[CLT] Failed to init a meta connexion");
}
}
int fsl_mc_ldpaa_init(bd_t *bis)
{
int i, error = 0;
int dprc_opened = 0, container_id;
int num_child_objects = 0;
error = mc_init();
if (error < 0)
goto error;
error = dprc_get_container_id(dflt_mc_io, MC_CMD_NO_FLAGS,
&container_id);
if (error < 0) {
printf("dprc_get_container_id() failed: %d\n", error);
goto error;
}
debug("fsl-mc: Container id=0x%x\n", container_id);
error = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, container_id,
&dflt_dprc_handle);
if (error < 0) {
printf("dprc_open() failed: %d\n", error);
goto error;
}
dprc_opened = true;
error = dprc_get_obj_count(dflt_mc_io,
MC_CMD_NO_FLAGS, dflt_dprc_handle,
&num_child_objects);
if (error < 0) {
printf("dprc_get_obj_count() failed: %d\n", error);
goto error;
}
debug("Total child in container %d = %d\n", container_id,
num_child_objects);
if (num_child_objects != 0) {
/*
* Discover objects currently in the DPRC container in the MC:
*/
for (i = 0; i < num_child_objects; i++)
error = dprc_scan_container_obj(dflt_dprc_handle,
"dpbp", i);
for (i = 0; i < num_child_objects; i++)
error = dprc_scan_container_obj(dflt_dprc_handle,
"dpio", i);
for (i = 0; i < num_child_objects; i++)
error = dprc_scan_container_obj(dflt_dprc_handle,
"dpni", i);
}
error:
if (dprc_opened)
dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle);
return error;
}
//! Main Entry
//!
//! The main entry point for the control motor application.\n
//! The mc_regulation_loop() function is launched every 80ms.\n
//!
int main(void)
{
// init motor
mc_init(); // launch initialization of the motor application
// Initialyze the communication system for External Command through Uart
ushell_task_init();
// Start the motor
mci_set_ref_speed(0);
mci_run();
// mc_set_speed_loop(); // uncomment to activate the speed regulation loop
while(1)
{
// Launch regulation loop
// Timer 1 generate an IT (g_tick) all 250us
// Sampling period = n * 250us
if (g_tick == TRUE)
{
g_tick = FALSE;
// Get Current and potentiometer value
mc_ADC_Scheduler();
g_regulation_period += 1;
if ( g_regulation_period >= 40 ) //n * 250us = Te
{
g_regulation_period = 0;
if (ushell_active == FALSE)
{
// Set User Speed Command with potentiometer
mci_set_ref_speed(mc_get_potentiometer_value());
}
mc_regulation_loop(); // launch regulation loop
}
mc_duty_cycle(mc_get_duty_cycle());
ushell_task();
mc_inrush_task(); // manage the inrush current
}
if (overcurrent==0)
{
Set_PC7();
}
else
{
Clear_PC7();
}
}
}
int child_mc_size_error(int cmd)
{
int rc;
struct ctx myctx;
struct ctx *p_ctx = &myctx;
__u64 size=0;
int invalid=0;
pid = getpid();
rc =mc_init();
CHECK_RC(rc, "mc_init failed");
rc = ctx_init(p_ctx);
CHECK_RC(rc, "ctx init failed");
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *)p_ctx->p_host_map,&p_ctx->mc_hndl);
CHECK_RC(rc, "ctx reg failed");
rc = mc_open(p_ctx->mc_hndl,MC_RDWR, &p_ctx->res_hndl);
CHECK_RC(rc, "opening res_hndl");
if(1 == cmd) { //invalid MCH
rc = mc_size((mc_hndl_t)&invalid, p_ctx->res_hndl,1,&size);
rc = rc ? 1:0;
} else if( 2 == cmd) { //invalid RSH
rc = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl+20,1,&size);
rc = rc ? 2:0;
} else if(3 == cmd) { //NULL size
rc = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl,1, NULL);
rc = rc ? 3:0;
} else if(4 == cmd) { //after mc_close
mc_close(p_ctx->mc_hndl, p_ctx->res_hndl);
rc = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl,1, &size);
rc = rc ? 4:0;
} else if(5 == cmd) { //after mc_unregister
mc_unregister(p_ctx->mc_hndl);
rc = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl,1, &size);
rc = rc ? 5:0;
}
ctx_close(p_ctx);
mc_term();
return rc;
}
ppack_t *
pack_create_prop( int size )
{
ppack_t *p;
int it;
p = malloc( sizeof( ppack_t ) + (sizeof(mc_t) * ( size )) );
p->size = sizeof( ppack_t ) + (sizeof(mc_t) * ( size ));
p->type = PROPAGATION;
p->num_up = -1;
p->rep_id = -1;
for( it = 0; it < size; it++ )
{
mc_init( &p->updates[it] );
}
return p;
}
//*************************************************************************************
int main(void)
{
beginSerial(BAUD_RATE);
i2c_init();
// config_reset(); // This routine forces the eeprom config into its default state
// if something really messes it up. Uncomment to use.
config_init(); // Restore state from eeprom if it is there, else restore default.
st_init(); // initialize the stepper subsystem
mc_init(); // initialize motion control subsystem
spindle_init(); // initialize spindle controller
gc_init(); // initialize gcode-parser
sp_init(); // initialize the serial protocol
DDRD |= (1<<3)|(1<<4)|(1<<5);
for(;;){
i2c_report_position();
_delay_ms(1); // Delay is required, otherwise
// if mc_running and current_mode = SM_RUN then don't get buttons, else do
if (!(mc_running==0 & (st_current_mode!=SM_RUN))){
i2c_get_buttons(); // i2c_get doesn't work. 1ms seems to be enough
if (buttons[0]|buttons[1]|buttons[2]|buttons[3]){
mc_running=1;
STEPPERS_ENABLE_PORT |= (1<<STEPPERS_ENABLE_BIT);
ENABLE_STEPPER_DRIVER_INTERRUPT();
}
}
if (serialAvailable()) sp_process(); // process the serial protocol
if (mc_in_arc()) mc_continue_arc(); // if busy drawing an arc, keep drawing
}
return 0; /* never reached */
}
// ********************** Software Initialization **************************
void init_software(void){
// *********************************************
// Standard board initialization. Do not modify. Unless you dare.
// *********************************************
asched_init(main_schedule,1);
error_init(dn_error_transmit, asched_get_timestamp, BOARD_MCH);
hb_init(9, dn_blue_heartbeat, asched_get_timestamp); //heartbeat
// *********************************************
// Put user initialization code below here.
// *********************************************
adci_init(ADCI_NULL, ADCI_NO_FILTER, ADCI_NULL, ADCI_NULL); //batt voltage on
adcx_init();
adcx_add_config( ADCX_CH_P4N5, ADCX_GAIN_2); //motor current
adcx_add_config( ADCX_CH_P2N3, ADCX_GAIN_2); //battery current
qdc_tmr0_init
(
60000000, //Count frequency of timer 0 in cycles per second
2048, //Pulses per revolution per channel (1X) of CAP01 encoder
1.0, //Gear ratio to obtain output shaft angle/rate, if desired, for CAP01 encoder.
0.0005, //Time per call to qdc_tmr0_cap01_rate_update in seconds
4, //Maximum exponential smoothing coefficient exponent for cap01. See instructions.
4, //Minimum exponential smoothing coefficient exponent for cap01
192, //Pulses per revolution per channel (1X) of CAP23 encoder
66.0, //Gear reduction ratio to obtain output shaft angle/rate, if desired, for CAP23 encoder
0.0005, //Timer per call to qdc_tmr1_cap23_rate_update in seconds
4, //Maximum exponential smoothing coefficient exponent for cap23 See instructions.
4 //Minimum exponential smoothing coefficient exponent for cap23
);
//Motor controller setup and initialization
mc_init
(
12.0,
5.0,
-5.0,
4.0,
-4.0,
3.1,
10.0,
0.0, // **** TEST CODE **** lower Kp
//220.0,
20.0,
0.0,
250,
4,
20.0,
MC_NORMAL,
&dn_get_raw_motor_current,
&dn_get_shaft_pos_rads,
&dn_get_motor_vel_rads
);
ae_init_encoder(AE_1,4590,94,8192); //abs encoder for hip angle is on J3
mc_set_stiffness(0.0);
mc_set_dampness(0.0);
mc_set_command_current(0.0);
}
void mc_free(memory_chip_t *mc)
{
if(mc->data) delete[] mc->data;
mc_init(mc, 0);
}
/********************* Software Initialization **************************/
void init_software(void){
// *********************************************
// Standard board initialization. Do not modify. Unless you dare.
// *********************************************
asched_init(main_schedule,1);
error_init(dn_error_transmit, asched_get_timestamp, BOARD_MCFO);
hb_init(9, dn_blue_heartbeat, asched_get_timestamp); //heartbeat
// *********************************************
// Put user initialization code below here.
// *********************************************
adci_init(ADCI_NULL, ADCI_NO_FILTER, ADCI_NULL, ADCI_NULL); //batt voltage on
adcx_init();
adcx_add_config(ADCX_CH_P4N5, ADCX_GAIN_2); //motor current
adcx_add_config(ADCX_CH_P2N3, ADCX_GAIN_2); //battery current
adcx_add_config(ADCX_CH_0, ADCX_GAIN_1); //left outer heel strike
adcx_add_config(ADCX_CH_1, ADCX_GAIN_1); //right outer heel strike
//Initialize incremental encoder position and rate calculations.
//Put setup, smoothing/filtering, and calibration values here
qdc_tmr0_init
(
60000000, //Count frequency of timer 0 in cycles per second
512, //Pulses per revolution per channel (1X) of CAP01 encoder
-34, //Gear ratio to obtain output shaft angle/rate, if desired, for CAP01 encoder.
0.0005, //Time per call to qdc_tmr0_cap01_rate_update in seconds
4, //Maximum exponential smoothing coefficient exponent for cap01. See instructions.
4, //Minimum exponential smoothing coefficient exponent for cap01
2048, //Pulses per revolution per channel (1X) of CAP23 encoder
-1.0, //Gear reduction ratio to obtain output shaft angle/rate, if desired, for CAP23 encoder
0.0005, //Timer per call to qdc_tmr1_cap23_rate_update in seconds
4, //Maximum exponential smoothing coefficient exponent for cap23 See instructions.
4 //Minimum exponential smoothing coefficient exponent for cap23
);
//Initialize motor controller
mc_init
(
12.0,
8.0,
-2.0,
6.0,
-1.0,
3.1,
10.0,
0.0, // **** TEST CODE **** Kp test
//220.0,
20.0,
0.0,
300,
4,
20.0,
MC_BACKWARDS,
&dn_get_raw_motor_current,
&dn_get_motor_pos_rads,
&dn_get_motor_vel_rads
);
//Initialize the absolute encoder module
ae_init_encoder
(
AE_2,
6562,
186,
8192
);
ls_init_switch(2, dn_get_p0); // id:0, left ankle
ls_init_switch(2, dn_get_p1); // id:1, right angle
ls_init_switch(10, dn_get_raw_right_hs); // id:2, right heel strike
ls_init_switch(10, dn_get_raw_left_hs); //id:3, left heel strike
mc_set_stiffness(0.0);
mc_set_dampness(0.0);
mc_set_command_current(0.0);
}
int child_mc_xlate_error(int cmd)
{
int rc;
struct ctx myctx;
struct ctx *p_ctx = &myctx;
int invalid=0;
__u64 plba;
__u64 size;
mc_stat_t l_mc_stat;
if(mc_init() !=0 ) {
fprintf(stderr, "mc_init failed.\n");
return -1;
}
debug("mc_init success.\n");
rc = ctx_init(p_ctx);
if(rc != 0)
{
fprintf(stderr, "Context init failed, errno %d\n", errno);
return -1;
}
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *)p_ctx->p_host_map,&p_ctx->mc_hndl);
if(rc != 0) {
fprintf(stderr, "mc_register: failed. ctx_hndl %d, rc %d\n",p_ctx->ctx_hndl, rc );
return -1;
}
rc = mc_open(p_ctx->mc_hndl,MC_RDWR,&p_ctx->res_hndl);
if(rc != 0) {
fprintf(stderr, "ctx: %d:mc_open: failed,rc %d\n", p_ctx->ctx_hndl,rc);
return -1;
}
rc = mc_stat(p_ctx->mc_hndl, p_ctx->res_hndl, &l_mc_stat);
CHECK_RC(rc, "mc_stat");
if(1 == cmd) //without mc_size
{
rc = mc_xlate_lba(p_ctx->mc_hndl, p_ctx->res_hndl, 0,&plba);
rc = rc ? 1:0;
}
else
{
rc = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl,1,&size);
if(2 == cmd) //MCH NULL
{
rc = mc_xlate_lba(NULL,p_ctx->res_hndl,0,&plba);
debug("MCH NULL rc = %d\n",rc);
rc = rc ? 2:0;
}
else if(3 == cmd) //invalid RCH
{
rc = mc_xlate_lba(p_ctx->mc_hndl,(p_ctx->res_hndl +4),0,&plba);
rc = rc ? 3:0;
}
else if(4 == cmd) //invalid VLBA
{
rc = mc_xlate_lba(p_ctx->mc_hndl,p_ctx->res_hndl,((1 << l_mc_stat.nmask)+5),&plba);
rc = rc ? 4:0;
}
else if(5 == cmd) //NULL to plba
{
rc = mc_xlate_lba(p_ctx->mc_hndl,p_ctx->res_hndl,0,NULL);
rc = rc ? 5:0;
}
else if(6 == cmd) //diff MCH(no mc_open) & RCH with mc_size
{
struct ctx tctx;
struct ctx *p_tctx= &tctx;
rc = ctx_init(p_tctx);
rc = mc_register(master_dev_path, p_tctx->ctx_hndl,
(volatile __u64 *)p_tctx->p_host_map,&p_tctx->mc_hndl);
rc = mc_open(p_tctx->mc_hndl,MC_RDWR,&p_tctx->res_hndl);
rc = mc_xlate_lba(p_tctx->mc_hndl,p_ctx->res_hndl,0,&plba);
rc = rc ? 6:0;
mc_close(p_tctx->mc_hndl,p_tctx->res_hndl);
mc_unregister(p_tctx->mc_hndl);
ctx_close(p_tctx);
}
else if(7 == cmd) //invaliud MCH
{
rc = mc_xlate_lba((mc_hndl_t)&invalid,p_ctx->res_hndl,0,&plba);
rc = rc ? 7:0;
}
}
mc_close(p_ctx->mc_hndl, p_ctx->res_hndl);
if(8 == cmd) //after mc_close
{
rc = mc_xlate_lba(p_ctx->mc_hndl,p_ctx->res_hndl,0,&plba);
rc = rc ? 8:0;
}
mc_unregister(p_ctx->mc_hndl);
ctx_close(p_ctx);
mc_term();
return rc;
}
int main(char *argv[],int argc) {
mc_init();
el_bool stop = el_false;
hre_t re_load = hre_compile("^load(&play)?\\s+(.*)$","i");
hre_t re_play = hre_compile("^play$","i");
hre_t re_pause = hre_compile("^pause$","i");
hre_t re_next = hre_compile("^next$","i");
hre_t re_previous = hre_compile("^prev(ious)?$","i");
hre_t re_track = hre_compile("^track\\s+([0-9]+)$","i");
hre_t re_quhit = hre_compile("^quit$","i");
hre_t re_seek = hre_compile("^seek\\s([0-9]+([.][0-9]+)?)$","i");
hre_t re_quit = hre_compile("^quit$","i");
hre_t re_repeat = hre_compile("^repeat\\s+(off|list|track)$","i");
hre_t re_again = hre_compile("^again$","i");
hre_t re_scan = hre_compile("^scan\\s+(.*)$","i");
file_info_t *history_file = mc_take_over(file_info_new_home(".btb_playlist"));
printf("history file: %s\n", file_info_absolute_path(history_file));
printf("history file: %s\n", file_info_path(history_file));
if (file_info_exists(history_file)) {
read_history(file_info_absolute_path(history_file));
}
i18n_set_language("nl");
printf(_("Starting btb_playlist\n"));
playlist_player_t *player = playlist_player_new();
while (!stop) {
char* line = readln(">", player);
hre_trim(line);
if (hre_has_match(re_quit, line)) {
stop = el_true;
} else if (hre_has_match(re_load, line)) {
hre_matches m = hre_match(re_load, line);
hre_match_t *mplay = hre_matches_get(m, 1);
hre_match_t *match = hre_matches_get(m, 2);
char* file = mc_strdup(hre_match_str(match));
char* play = mc_strdup(hre_match_str(mplay));
hre_matches_destroy(m);
printf("loading '%s', '%s'\n", file, play);
file_info_t *info = file_info_new(file);
if (file_info_exists(info)) {
if (file_info_is_file(info)) {
if (file_info_can_read(info)) {
const char *mediafile = NULL;
track_array array;
if (strcasecmp(file_info_ext(info),"cue") == 0) {
array = tracks_from_cue(file_info_absolute_path(info));
track_t* t = track_array_get(array, 0);
} else {
array = tracks_from_media(file_info_absolute_path(info));
}
playlist_t* pl = playlist_new("playlist");
int i;
for(i=0; i < track_array_count(array); ++i) {
playlist_append(pl, track_array_get(array, i));
}
playlist_player_set_playlist(player, pl);
track_array_destroy(array);
}
}
}
file_info_destroy(info);
if (strcasecmp(play,"&play")==0) { playlist_player_play(player); }
mc_free(file);
mc_free(play);
} else if (hre_has_match(re_play, line)) {
playlist_player_play(player);
} else if (hre_has_match(re_pause, line)) {
playlist_player_pause(player);
} else if (hre_has_match(re_seek, line)) {
hre_matches m = hre_match(re_seek, line);
hre_match_t* match = hre_matches_get(m, 1);
char* position = mc_strdup(hre_match_str(match));
hre_matches_destroy(m);
double s = atof(position);
int ms = s * 1000;
mc_free(position);
playlist_player_seek(player, ms);
} else if (hre_has_match(re_next, line)) {
playlist_player_next(player);
} else if (hre_has_match(re_previous, line)) {
playlist_player_previous(player);
} else if (hre_has_match(re_track, line)) {
hre_matches m = hre_match(re_track, line);
hre_match_t* match = hre_matches_get(m, 1);
char* nr = mc_strdup(hre_match_str(match));
hre_matches_destroy(m);
int index = atoi(nr);
mc_free(nr);
printf("setting track %d\n",index);
playlist_player_set_track(player, index);
} else if (hre_has_match(re_repeat, line)) {
hre_matches m = hre_match(re_repeat, line);
hre_match_t* match = hre_matches_get(m, 1);
if (strcasecmp(hre_match_str(match),"track") == 0) {
playlist_player_set_repeat(player, PLP_TRACK_REPEAT);
} else if (strcasecmp(hre_match_str(match),"list") == 0) {
playlist_player_set_repeat(player, PLP_LIST_REPEAT);
} else {
playlist_player_set_repeat(player, PLP_NO_REPEAT);
}
hre_matches_destroy(m);
} else if (hre_has_match(re_again, line)) {
playlist_player_again(player);
} else if (hre_has_match(re_scan, line)) {
hre_matches m = hre_match(re_scan, line);
hre_match_t* match = hre_matches_get(m, 1);
printf("scanning %s\n", hre_match_str(match));
library_t* library = library_new();
printf("calling scan_library\n");
//scan_library(library, hre_match_str(match), library_cb);
printf("\n");
printf("library: %d tracks\n", library_count(library));
printf("done scanning, destroying library\n");
library_destroy(library);
printf("library destroyed\n");
hre_matches_destroy(m);
printf("matches destroyed\n");
}
mc_free(line);
}
playlist_player_destroy(player);
printf("%d\n",write_history(file_info_absolute_path(history_file)));
file_info_destroy(history_file);
hre_destroy(re_load);
hre_destroy(re_play);
hre_destroy(re_pause);
hre_destroy(re_quit);
hre_destroy(re_seek);
hre_destroy(re_track);
hre_destroy(re_next);
hre_destroy(re_previous);
hre_destroy(re_again);
hre_destroy(re_repeat);
hre_destroy(re_scan);
return 0;
}
int main(int argc, char **argv)
{
int i, l;
int accepted = 0; //Total number of accepted configurations
int total_updates = 0; //Total number of updates
clock_t begin, end;
/* Initialize the random number generator */
rlxd_init(2, time(NULL));
/* Initialize the lattice geometry */
init_lattice(Lx, Ly, Lt);
/* Initialize the fields */
hotstart();
/* Print out the run parameters */
echo_sim_params();
mc_init();
/* thermalization */
mc_iter = 0; //Counts the total number of calls to the update() routine
printf("\n Thermalization: \n\n");
//begin = clock();
for(i=0; i<g_thermalize; i++)
{
mc_update();
//printf("\t Step %04i\n", i);
};
//end = clock();
//printf("Time for one MC update: %f\n", (double)(end - begin) / CLOCKS_PER_SEC);
/* measure the iterations only during real simulation, not thermalization */
R = 0; //Counts the total number of accepted configurations
mc_iter = 0; //Counts the total number of calls to the update() routine
printf("\n Generation: \n\n");
measurement_init();
measure();
printf("Average density: \t %.5f %.5f\n", creal(m_density[measure_iter]), cimag(m_density[measure_iter]));
printf("Wilson plaquette: \t %.5f\n", mean_plaq());
for(i=0; i<g_measurements; i++)
{
/* do g_intermediate updates before measurement */
for (l=0; l<g_intermediate; l++)
{
mc_update();
};
mc_update();
/* doing measurement */
measure();
printf("Average density: \t %.5f %.5f\n", creal(m_density[measure_iter]), cimag(m_density[measure_iter]));
printf("Wilson plaquette: \t %.5f\n", mean_plaq());
fflush(stdout);
};
printf("Wrapping up...\n");
output_measurement();
measurement_finish();
/* Some output for diagnostics */
total_updates = g_measurements*(g_intermediate + 1)*GRIDPOINTS;
printf("\n\n Algorithm performance:\n");
printf("\t Acceptance rate: %.4f\n", (double)R/(double)total_updates);
return 0;
}
/*
* reset and restart the MACE. Called in case of fatal
* hardware/software errors.
*/
void
mc_reset(struct mc_softc *sc)
{
mc_stop(sc);
mc_init(sc);
}
int mc_invalid_ioarcb(int cmd)
{
int rc;
struct ctx myctx;
struct ctx *p_ctx = &myctx;
__u64 chunks=32;
__u64 actual_size=0;
__u64 vlba =0;
__u32 *p_u32;
__u64 stride;
__u64 *p_u64;
pthread_t thread;
mc_stat_t l_mc_stat;
int i;
pid = getpid();
signal(SIGABRT, sig_handle);
signal(SIGSEGV, sig_handle);
rc = mc_init();
CHECK_RC(rc, "mc_init failed");
debug("mc_init success :%d\n",rc);
rc = ctx_init(p_ctx);
CHECK_RC(rc, "Context init failed");
pthread_create(&thread,NULL,ctx_rrq_rx, p_ctx);
if (15 == cmd)
{
//PLBA out of range
rc = create_resource(p_ctx, 0, DK_UDF_ASSIGN_PATH, LUN_DIRECT);
CHECK_RC(rc, "opening res_hndl");
actual_size = (p_ctx->last_lba+1)/p_ctx->chunk_size;
}
else
{
p_ctx->flags = DK_UVF_ALL_PATHS;
rc = create_res(p_ctx);
CHECK_RC(rc, "opening res_hndl");
rc = mc_size1(p_ctx,chunks, &actual_size);
CHECK_RC(rc, "mc_size");
}
rc = mc_stat1(p_ctx, &l_mc_stat);
CHECK_RC(rc, "mc_stat");
stride = 1 << l_mc_stat.nmask;
vlba = (actual_size * (1 << l_mc_stat.nmask))-1;
fill_send_write(p_ctx, vlba, pid, stride);
for (i = 0; i < NUM_CMDS; i++)
{
if (1 == cmd)
{
//invalid upcode
debug("invalid upcode(0xFA) action = %d\n",cmd);
p_ctx->cmd[i].rcb.cdb[0] = 0xFA;
}
else if (2 == cmd)
{
//EA = NULL
debug("EA = NULL action = %d\n",cmd);
p_ctx->cmd[i].rcb.data_ea = (__u64)NULL;
#ifdef _AIX
bad_address = true;
#endif
}
else if (3 == cmd)
{
//invalid flgas
p_ctx->cmd[i].rcb.req_flags = SISL_REQ_FLAGS_RES_HNDL;
p_ctx->cmd[i].rcb.req_flags |= SISL_REQ_FLAGS_HOST_READ;
debug("invalid flag = 0X%X\n",p_ctx->cmd[i].rcb.req_flags);
}
else if (5 == cmd)
{
//SISL_AFU_RC_RHT_INVALID
p_ctx->cmd[i].rcb.res_hndl = p_ctx->res_hndl + 2;
}
else if ( 6 == cmd)
{
//SISL_AFU_RC_RHT_OUT_OF_BOUNDS
p_ctx->cmd[i].rcb.res_hndl = MAX_RES_HANDLE;
}
else if (7 == cmd)
{
//invalid address for page fault
debug("setting EA = 0x1234 to generate error page fault\n");
p_ctx->cmd[i].rcb.data_ea = (__u64)0x1234;
#ifdef _AIX
bad_address = true;
#endif
}
else if (8 == cmd)
{
//invalid ctx_id
debug("%d: sending invalid ctx id\n", pid);
p_ctx->cmd[i].rcb.ctx_id = p_ctx->ctx_hndl +10;
}
else if (9 == cmd)
{
//test flag underrun
p_ctx->cmd[i].rcb.data_len = sizeof(p_ctx->wbuf[0])/2;
}
else if (10 == cmd)
{
// test flag overrun
p_ctx->cmd[i].rcb.data_len = sizeof(p_ctx->wbuf[0]);
p_u32 = (__u32*)&p_ctx->cmd[i].rcb.cdb[10];
write_32(p_u32, 2);
}
else if (11 == cmd)
{
//rc scsi_rc_check
p_u32 = (__u32*)&p_ctx->cmd[i].rcb.cdb[10];
write_32(p_u32, p_ctx->blk_len +1);
}
else if (12 == cmd)
{
//data len 0 in ioarcb
p_ctx->cmd[i].rcb.data_len = 0;
}
else if (13 == cmd)
{
//NUM BLK to write 0
p_u32 = (__u32*)&p_ctx->cmd[i].rcb.cdb[10];
write_32(p_u32, 0);
}
else if ((14 == cmd) || (15 == cmd))
{
//test out of range LBAs
p_u64 = (__u64*)&p_ctx->cmd[i].rcb.cdb[2];
vlba += i+1;
write_lba(p_u64, vlba);
}
}
//test BAD IOARCB, IOASA & CMD room violation
if (cmd >= 100)
{
if (100 == cmd)
{
//bad RCB
place_bad_addresses(p_ctx, 1);
usleep(1000);
if (err_afu_intrpt) //cool expected res
rc = 100;
else rc = -1;
goto END;
}
else if (101 == cmd)
{
//bad IOASA
handle_bad_ioasa(p_ctx, pid);
usleep(1000); //sleep sometime to process rcb cmd by AFU
//And let handle rrq event
//how to handle error, rrq thread should throw some error
return -1;
}
else if (102 == cmd)
{
//cmd_room violation
place_bad_addresses(p_ctx, 3);
usleep(1000);
#ifdef _AIX
if (err_afu_intrpt) //cool expected res
rc = 102;
else rc = -1;
goto END;
#endif
}
else if (103 == cmd)
{
//bad HRRQ
place_bad_addresses(p_ctx, 2);
usleep(1000);
if (err_afu_intrpt) //cool expected res
rc = 103;
else rc = -1;
goto END;
}
}
else
{
send_cmd(p_ctx);
}
rc = wait_resp(p_ctx);
if ( cmd >= 9 && cmd <= 13)
{
if (!rc_flags)
{
if (!dont_displa_err_msg)
fprintf(stderr, "%d: Expecting rc flags non zero\n", pid);
rc = -1;
}
}
if (4 == cmd)
{
//invalid fc port & lun id
debug("invalid fc port(0xFF)&lun id(0X1200), action=%d",cmd);
fill_send_write(p_ctx, vlba, pid, stride);
for (i = 0; i < NUM_CMDS; i++)
{
p_ctx->cmd[i].rcb.lun_id = 0x12000;
p_ctx->cmd[i].rcb.port_sel = 0xff;
}
//send_single_cmd(p_ctx);
send_cmd(p_ctx);
rc = wait_resp(p_ctx);
}
#ifdef _AIX
if ((7 == cmd || 2 == cmd)&& (err_afu_intrpt))
rc = 7;
#endif
END:
pthread_cancel(thread);
close_res(p_ctx);
//mc_unregister(p_ctx->mc_hndl);
//xerror:
ctx_close(p_ctx);
mc_term();
return rc;
}
int main(void) {
uint8_t state;
uint8_t brightness_old = 200;
uint8_t brightness = 200;
enum dmd_retval dmd_ret;
struct dmd_writeln_input dmd_input;
struct dmd_writeln_obj dmd_obj;
char test[4];
const char *arrow_right = ">";
const char *arrow_left = "<";
mc_init();
mc_display_contrast_set(70);
state = 1;
do {
dmd_ret = dmd_init_5x7(&state);
} while (dmd_ret != DMD_OK);
state = 1;
do {
dmd_ret = dmd_clearscreen(&state);
} while (dmd_ret != DMD_OK);
state = 1;
do {
dmd_ret = dmd_ctrl_display(DMD_DISP_ON, &state);
} while (dmd_ret != DMD_OK);
dmd_input.alignment = DMD_ALIGN_LEFT;
dmd_input.cstr = (char*) arrow_right;
dmd_input.line = 1;
dmd_input.offset = 0;
dmd_ret = dmd_writeln_calc(&dmd_input, &dmd_obj);
state = 1;
do {
dmd_ret = dmd_writeln(&dmd_obj, &state);
} while (dmd_ret != DMD_OK);
dmd_input.alignment = DMD_ALIGN_RIGHT;
dmd_input.cstr = (char*) arrow_left;
dmd_ret = dmd_writeln_calc(&dmd_input, &dmd_obj);
state = 1;
do {
dmd_ret = dmd_writeln(&dmd_obj, &state);
} while (dmd_ret != DMD_OK);
while (1) {
brightness = brightness + (int8_t) mc_rotary_encoder_read();
if (brightness != brightness_old) {
brightness_old = brightness;
uint8_2_cstr(test, brightness);
dmd_input.alignment = DMD_ALIGN_CENTER;
dmd_input.cstr = test;
dmd_ret = dmd_writeln_calc(&dmd_input, &dmd_obj);
state = 1;
do {
dmd_ret = dmd_writeln(&dmd_obj, &state);
} while (dmd_ret != DMD_OK);
}
if (mc_rotary_encoder_pushbutton_read()) {
if (mc_display_pulsate_get()) {
mc_display_pulsate_set(0);
mc_display_brightness_set(brightness);
} else {
mc_display_pulsate_set(1);
}
}
};
return (0);
}
/*
* Returns the mailcap entry for type/subtype from the successfull
* mailcap entry, or NULL if none. Command string still contains % stuff.
*/
MailcapEntry *
mc_get_command(int type, char *subtype, BODY *body,
int check_extension, int *sp_handlingp)
{
MailcapEntry *mc;
char tmp_subtype[256], tmp_ext[16], *ext = NULL;
dprint((5, "- mc_get_command(%s/%s) -\n",
body_type_names(type),
subtype ? subtype : "?"));
if(type == TYPETEXT
&& (!subtype || !strucmp(subtype, "plain"))
&& F_ON(F_SHOW_TEXTPLAIN_INT, ps_global))
return(NULL);
mc_init();
if(check_extension){
char *fname;
MT_MAP_T e2b;
/*
* Special handling for when we're looking at what's likely
* binary application data. Look for a file name extension
* that we might use to hook a helper app to.
*
* NOTE: This used to preclude an "app/o-s" mailcap entry
* since this took precedence. Now that there are
* typically two scans through the check_extension
* mechanism, the mailcap entry now takes precedence.
*/
if((fname = get_filename_parameter(NULL, 0, body, &e2b.from.ext)) != NULL
&& e2b.from.ext && e2b.from.ext[0]){
if(strlen(e2b.from.ext) < sizeof(tmp_ext) - 2){
strncpy(ext = tmp_ext, e2b.from.ext - 1, sizeof(tmp_ext)); /* remember it */
tmp_ext[sizeof(tmp_ext)-1] = '\0';
if(mt_srch_mime_type(mt_srch_by_ext, &e2b)){
type = e2b.to.mime.type; /* mapped type */
strncpy(subtype = tmp_subtype, e2b.to.mime.subtype,
sizeof(tmp_subtype)-1);
tmp_subtype[sizeof(tmp_subtype)-1] = '\0';
fs_give((void **) &e2b.to.mime.subtype);
body = NULL; /* the params no longer apply */
}
}
fs_give((void **) &fname);
}
else{
if(fname)
fs_give((void **) &fname);
return(NULL);
}
}
for(mc = MailcapData.head; mc; mc = mc->next)
if(mc_ctype_match(type, subtype, mc->contenttype)
&& mc_passes_test(mc, type, subtype, body)){
dprint((9,
"mc_get_command: type=%s/%s, command=%s\n",
body_type_names(type),
subtype ? subtype : "?",
mc->command ? mc->command : "?"));
return(mc);
}
if(mime_os_specific_access()){
static MailcapEntry fake_mc;
static char fake_cmd[1024];
char tmp_mime_type[256];
memset(&fake_mc, 0, sizeof(MailcapEntry));
fake_cmd[0] = '\0';
fake_mc.command = fake_cmd;
snprintf(tmp_mime_type, sizeof(tmp_mime_type), "%s/%s", body_types[type], subtype);
if(mime_get_os_mimetype_command(tmp_mime_type, ext, fake_cmd,
sizeof(fake_cmd), check_extension, sp_handlingp))
return(&fake_mc);
}
return(NULL);
}
int test_mc_invalid_opcode()
{
int rc;
struct ctx myctx;
struct ctx *p_ctx = &myctx;
__u64 chunks=10;
__u64 actual_size=0;
__u64 vlba =0;
__u64 *p_u64;
__u32 *p_u32;
mc_stat_t l_mc_stat;
pthread_t thread;
if (mc_init() !=0 )
{
fprintf(stderr, "mc_init failed.\n");
return -1;
}
debug("mc_init success.\n");
rc = ctx_init(p_ctx);
if (rc != 0)
{
fprintf(stderr, "Context init failed, errno %d\n", errno);
return -1;
}
pthread_create(&thread,NULL,ctx_rrq_rx, p_ctx);
/*rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *)p_ctx->p_host_map,&p_ctx->mc_hndl);
if(rc != 0)
{
fprintf(stderr, "ctx _reg failed, ctx_hndl %d,rc %d\n",p_ctx->ctx_hndl, rc );
return -1;
}*/
rc = create_res(p_ctx);
if (rc != 0)
{
fprintf(stderr, "error opening res_hndl rc %d\n", rc);
return -1;
}
rc = mc_size1(p_ctx,chunks, &actual_size);
CHECK_RC(rc, "mc_size");
rc = mc_stat1(p_ctx, &l_mc_stat);
CHECK_RC(rc, "mc_stat");
pid = getpid();
vlba = (actual_size * (1 << l_mc_stat.nmask))-1;
fill_buf((__u64*)&p_ctx->wbuf[0][0],
sizeof(p_ctx->wbuf[0])/sizeof(__u64),pid);
memset((void *)&p_ctx->cmd[0].rcb.cdb[0], 0, sizeof(p_ctx->cmd[0].rcb.cdb));
p_u64 = (__u64*)&p_ctx->cmd[0].rcb.cdb[2];
p_ctx->cmd[0].rcb.res_hndl = p_ctx->res_hndl;
p_ctx->cmd[0].rcb.req_flags = SISL_REQ_FLAGS_RES_HNDL;
p_ctx->cmd[0].rcb.req_flags |= SISL_REQ_FLAGS_HOST_WRITE;
write_lba(p_u64, vlba);
p_ctx->cmd[0].rcb.data_ea = (__u64) &p_ctx->wbuf[0][0];
p_ctx->cmd[0].rcb.data_len = sizeof(p_ctx->wbuf[0]);
p_ctx->cmd[0].rcb.cdb[0] = 0xFA; // invalid opcode
p_u32 = (__u32*)&p_ctx->cmd[0].rcb.cdb[10];
write_32(p_u32, 8); // 8 LBAs for 4K
p_ctx->cmd[0].sa.host_use[0] = 0; // 0 means active
p_ctx->cmd[0].sa.ioasc = 0;
send_single_cmd(p_ctx);
rc = wait_single_resp(p_ctx);
return rc;
}
int child_mc_reg_error(int cmd)
{
int rc;
struct ctx myctx;
struct ctx *p_ctx = &myctx;
__u64 *map=(__u64 *)0xabcdf;
__u64 actual_size=0;
__u64 stride;
__u64 st_lba =0;
__u64 nlba;
mc_hndl_t new_mc_hndl, dup_mc_hndl;
int rc1, rc2, rc3, rc4, rc5;
pthread_t thread;
mc_stat_t l_mc_stat;
__u64 size = 128;
if(mc_init() !=0 ) {
fprintf(stderr, "mc_init failed.\n");
return -1;
}
debug("mc_init success.\n");
rc = ctx_init(p_ctx);
if(rc != 0) {
fprintf(stderr, "Context init failed, errno %d\n", errno);
return -1;
}
pid = getpid();
if(1 == cmd) //mc_reg with NULL MMIOP
{
pthread_create(&thread,NULL,ctx_rrq_rx, p_ctx);
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
NULL,&p_ctx->mc_hndl);
if(rc) return rc;
rc = mc_open(p_ctx->mc_hndl,MC_RDWR, &p_ctx->res_hndl);
if(rc) return rc;
rc = mc_open(p_ctx->mc_hndl,MC_RDWR, &p_ctx->res_hndl);
if(rc) return rc;
rc = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl, 2, &actual_size);
if(rc) return rc;
rc = mc_stat(p_ctx->mc_hndl, p_ctx->res_hndl, &l_mc_stat);
if(rc) return rc;
pid = getpid();
stride = (1 << l_mc_stat.nmask);
st_lba = (actual_size * (1 << l_mc_stat.nmask))-1;
rc = send_write(p_ctx, st_lba ,stride, pid, VLBA);
if(rc) return rc;
rc = send_read(p_ctx, st_lba ,stride, VLBA);
if(rc) return rc;
rc = rw_cmp_buf(p_ctx, st_lba);
rc = rc ? 1:0;
}
else if(2 == cmd) //NULL device path
{
rc = mc_register(NULL, p_ctx->ctx_hndl,
(volatile __u64 *) p_ctx->p_host_map,&p_ctx->mc_hndl);
rc = rc ? 2:0;
}
else if(3 == cmd) //with afu_path device
{
rc = mc_register(afu_path, p_ctx->ctx_hndl,
(volatile __u64 *) p_ctx->p_host_map,&p_ctx->mc_hndl);
rc = rc ? 3:0;
}
else if(4 == cmd) //with invalid device path
{
rc = mc_register("/dev/cxl/afu50.0m", p_ctx->ctx_hndl,
(volatile __u64 *) p_ctx->p_host_map,&p_ctx->mc_hndl);
rc = rc ? 4:0;
}
else if(5 == cmd) //with invalid ctx hndl(not assigned)
{
debug("actual ctx hndl :%d\n", p_ctx->ctx_hndl);
p_ctx->ctx_hndl = p_ctx->ctx_hndl + 4;
debug("invalid ctx hndl :%d\n", p_ctx->ctx_hndl);
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *) p_ctx->p_host_map,&p_ctx->mc_hndl);
rc = rc ? 5:0;
}
else if(6 == cmd) //with invalid mmap adress
{
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *)map,&p_ctx->mc_hndl);
rc = rc ? 6:0;
}
else if(7 == cmd) //twice mc_reg
{
pthread_create(&thread,NULL,ctx_rrq_rx, p_ctx);
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *)p_ctx->p_host_map, &p_ctx->mc_hndl);
CHECK_RC(rc, "mc_register");
rc = mc_open(p_ctx->mc_hndl, MC_RDWR, &p_ctx->res_hndl);
CHECK_RC(rc, "mc_open");
rc = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl, size, &actual_size);
CHECK_RC(rc, "mc_size");
rc = mc_stat(p_ctx->mc_hndl, p_ctx->res_hndl, &l_mc_stat);
//twice mc_register on same ctx
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *)p_ctx->p_host_map, &new_mc_hndl);
//send write on 1st mc hndl
rc1 = send_single_write(p_ctx, 0, pid);
//do mc_size & open on old mc_reg
rc2 = mc_open(p_ctx->mc_hndl, MC_RDWR, &p_ctx->res_hndl);
rc3 = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl, size, &actual_size);
rc4 = mc_stat(p_ctx->mc_hndl, p_ctx->res_hndl, &l_mc_stat);
rc5 = mc_hdup(p_ctx->mc_hndl, &dup_mc_hndl);
debug("mc_hdup rc is : %d\n", rc5);
//now do mc_unreg on old one
rc = mc_unregister(p_ctx->mc_hndl);
CHECK_RC(rc, "mc_unregister");
//do everything on new mc hndl
p_ctx->mc_hndl = new_mc_hndl;
rc = mc_open(p_ctx->mc_hndl, MC_RDWR, &p_ctx->res_hndl);
CHECK_RC(rc, "mc_open");
rc = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl, size, &actual_size);
CHECK_RC(rc, "mc_size");
rc = mc_stat(p_ctx->mc_hndl, p_ctx->res_hndl, &l_mc_stat);
nlba = l_mc_stat.size * (1 << l_mc_stat.nmask);
stride = 1 << l_mc_stat.nmask;
for(st_lba = 0; st_lba < nlba; st_lba += (stride * NUM_CMDS)) {
rc = send_write(p_ctx, st_lba, stride, pid, VLBA);
CHECK_RC(rc, "send_write");
}
if(rc1 && rc2 && rc3 && rc4 && rc5) {
rc = 7;
}
pthread_cancel(thread);
mc_unregister(p_ctx->mc_hndl);
}
else if(8 == cmd) //mc_reg twice from 2 diff process
{
if(fork() == 0) {//mc_reg in child process as well
pid = getpid();
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *)p_ctx->p_host_map, &p_ctx->mc_hndl);
sleep(1);
rc = mc_open(p_ctx->mc_hndl,MC_RDWR, &p_ctx->res_hndl);
if(!rc) {
fprintf(stderr, "%d : mc_open should fail rc = %d\n", pid, rc);
exit(-1);
}
else {
debug("%d : mc_open failed as expectd\n", pid);
}
rc = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl, 2, &actual_size);
if(!rc) {
fprintf(stderr, "%d : mc_size should fail rc = %d\n", pid, rc);
exit(-1);
}
else {
debug("%d : mc_size failed as expectd\n", pid);
}
rc = rc ? 8:0;
exit(rc);
}
else
{
sleep(1); //let child proc cal mc_reg 1str
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *)p_ctx->p_host_map, &p_ctx->mc_hndl);
CHECK_RC(rc, "mc_register");
pthread_create(&thread,NULL,ctx_rrq_rx, p_ctx);
rc = mc_open(p_ctx->mc_hndl,MC_RDWR, &p_ctx->res_hndl);
CHECK_RC(rc, "mc_open");
rc = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl, 2, &actual_size);
CHECK_RC(rc, "mc_mc_size");
rc = mc_stat(p_ctx->mc_hndl, p_ctx->res_hndl, &l_mc_stat);
CHECK_RC(rc, "mc_stat");
st_lba = (actual_size * (1 << l_mc_stat.nmask))-1;
rc += send_single_write(p_ctx, st_lba, pid);
wait(&rc);
pthread_cancel(thread);
if (WIFEXITED(rc)) {
rc = WEXITSTATUS(rc);
rc = rc ? 8:0;
}
mc_unregister(p_ctx->mc_hndl);
}
}
ctx_close(p_ctx);
if(9 == cmd) //mc_reg with closed ctx
{
pthread_create(&thread,NULL,ctx_rrq_rx, p_ctx);
printf("calling mc_reg api after ctx close..\n");
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *)p_ctx->p_host_map, &p_ctx->mc_hndl);
rc = rc ? 9:0;
}
mc_term();
return rc;
}
int mc_invalid_ioarcb(int cmd)
{
int rc;
struct ctx myctx;
struct ctx *p_ctx = &myctx;
__u64 chunks=16;
__u64 actual_size=0;
__u64 vlba =0;
__u32 *p_u32;
__u64 stride;
pthread_t thread;
mc_stat_t l_mc_stat;
int i;
rc = mc_init();
CHECK_RC(rc, "mc_init failed");
debug("mc_init success :%d\n",rc);
rc = ctx_init(p_ctx);
CHECK_RC(rc, "Context init failed");
pthread_create(&thread,NULL,ctx_rrq_rx, p_ctx);
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *)p_ctx->p_host_map,&p_ctx->mc_hndl);
CHECK_RC(rc, "ctx reg failed");
rc = mc_open(p_ctx->mc_hndl,MC_RDWR, &p_ctx->res_hndl);
CHECK_RC(rc, "opening res_hndl");
rc = mc_size(p_ctx->mc_hndl, p_ctx->res_hndl,chunks, &actual_size);
CHECK_RC(rc, "mc_size");
rc = mc_stat(p_ctx->mc_hndl, p_ctx->res_hndl, &l_mc_stat);
CHECK_RC(rc, "mc_stat");
stride = 1 << l_mc_stat.nmask;
pid = getpid();
vlba = (actual_size * (1 << l_mc_stat.nmask))-1;
fill_send_write(p_ctx, vlba, pid, stride, VLBA);
for(i = 0; i < NUM_CMDS; i++) {
if (1 == cmd){ //invalid upcode
debug("invalid upcode(0xFA) action = %d\n",cmd);
p_ctx->cmd[i].rcb.cdb[0] = 0xFA;
}else if (2 == cmd) {//EA = NULL
debug("EA = NULL action = %d\n",cmd);
p_ctx->cmd[i].rcb.data_ea = (__u64)NULL;
}else if(3 == cmd){ //invalid flgas
p_ctx->cmd[i].rcb.req_flags = SISL_REQ_FLAGS_RES_HNDL;
p_ctx->cmd[i].rcb.req_flags |= SISL_REQ_FLAGS_HOST_READ;
debug("invalid flag = 0X%X\n",p_ctx->cmd[i].rcb.req_flags);
}else if(5 == cmd) {//SISL_AFU_RC_RHT_INVALID
p_ctx->cmd[i].rcb.res_hndl = p_ctx->res_hndl + 2;
}else if( 6 == cmd) {//SISL_AFU_RC_RHT_OUT_OF_BOUNDS
p_ctx->cmd[i].rcb.res_hndl = MAX_RES_HANDLE;
}else if(7 == cmd) { //invalid address for page fault
debug("setting EA = 0x1234 to generate error page fault\n");
p_ctx->cmd[i].rcb.data_ea = (__u64)0x1234;
}else if(8 == cmd) { //invalid ctx_id
debug("%d : sending invalid ctx id\n", pid);
p_ctx->cmd[i].rcb.ctx_id = p_ctx->ctx_hndl +10;
}else if(9 == cmd) { //test flag underrun
p_ctx->cmd[i].rcb.data_len = sizeof(p_ctx->wbuf[0])/2;
}else if(10 == cmd) {// test flag overrun
p_ctx->cmd[i].rcb.data_len = sizeof(p_ctx->wbuf[0]) +2;
}else if(11 == cmd) { //rc scsi_rc_check
p_u32 = (__u32*)&p_ctx->cmd[i].rcb.cdb[10];
write_32(p_u32, LBA_BLK +1);
}else if(12 == cmd) { //data len 0 in ioarcb
p_ctx->cmd[i].rcb.data_len = 0;
}else if(13 == cmd) { //NUM BLK to write 0
p_u32 = (__u32*)&p_ctx->cmd[i].rcb.cdb[10];
write_32(p_u32, 0);
}
}
//send_single_cmd(p_ctx);
send_cmd(p_ctx);
//rc = wait_single_resp(p_ctx);
rc = wait_resp(p_ctx);
if( cmd >= 9 && cmd <= 13) {
if(!rc_flags) {
if(!dont_displa_err_msg)
fprintf(stderr, "%d : Expecting rc flags non zero\n", pid);
rc = -1;
}
}
if(4 == cmd) {//invalid fc port & lun id
debug("invalid fc port(0xFF)&lun id(0X1200), action=%d",cmd);
fill_send_write(p_ctx, vlba, pid, stride, PLBA);
for(i = 0; i < NUM_CMDS; i++) {
p_ctx->cmd[i].rcb.lun_id = 0x12000;
p_ctx->cmd[i].rcb.port_sel = 0xff;
}
//send_single_cmd(p_ctx);
send_cmd(p_ctx);
rc = wait_resp(p_ctx);
}
pthread_cancel(thread);
mc_close(p_ctx->mc_hndl,p_ctx->res_hndl);
mc_unregister(p_ctx->mc_hndl);
ctx_close(p_ctx);
mc_term();
return rc;
}
int check_mc_null_params(int cmd)
{
int rc;
struct ctx myctx;
struct ctx *p_ctx = &myctx;
__u64 size = 10;
__u64 actual_size=0;
if(mc_init() !=0 ) {
fprintf(stderr, "mc_init failed.\n");
return -1;
}
debug("mc_init success.\n");
rc = ctx_init(p_ctx);
if(rc != 0)
{
fprintf(stderr, "Context init failed, errno %d\n", errno);
return -1;
}
if(1 == cmd) { //mc_reg with NULL MCH
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *) p_ctx->p_host_map,NULL);
rc = rc ? 1:0;
}
else {
rc = mc_register(master_dev_path, p_ctx->ctx_hndl,
(volatile __u64 *)p_ctx->p_host_map,&p_ctx->mc_hndl);
if(rc != 0) {
fprintf(stderr, "ctx _reg failed, ctx_hndl %d,rc %d\n",
p_ctx->ctx_hndl, rc );
return -1;
}
if(2 == cmd){
rc = mc_unregister(NULL);
rc = rc ? 2:0;
}
else if(3 == cmd){ //mc_open NULL
rc = mc_open(NULL, MC_RDWR, &p_ctx->res_hndl);
rc = rc ? 3:0;
}
else if (4 == cmd) {
rc = mc_hdup(NULL, p_ctx->mc_hndl);
rc = rc ? 4:0;
}
else {
rc = mc_open(p_ctx->mc_hndl, MC_RDWR, &p_ctx->res_hndl);
if(5 == cmd) {
rc = mc_close(NULL, p_ctx->res_hndl);
rc = rc ? 5:0;
}else if( 6 == cmd) {
rc = mc_size(NULL, p_ctx->res_hndl, size, &actual_size);
rc = rc ? 6:0;
}else if(7 == cmd) {
rc = mc_clone(NULL, p_ctx->mc_hndl, MC_RDWR);
rc = rc ? 7:0;
}
}
}
return rc;
}
static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int err = 0;
if (argc < 3)
goto usage;
switch (argv[1][0]) {
case 's': {
char sub_cmd;
u64 mc_fw_addr, mc_dpc_addr;
#ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
u64 aiop_fw_addr;
#endif
sub_cmd = argv[2][0];
switch (sub_cmd) {
case 'm':
if (argc < 5)
goto usage;
if (get_mc_boot_status() == 0) {
printf("fsl-mc: MC is already booted");
printf("\n");
return err;
}
mc_fw_addr = simple_strtoull(argv[3], NULL, 16);
mc_dpc_addr = simple_strtoull(argv[4], NULL,
16);
if (!mc_init(mc_fw_addr, mc_dpc_addr))
err = mc_init_object();
break;
#ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
case 'a':
if (argc < 4)
goto usage;
if (get_aiop_apply_status() == 0) {
printf("fsl-mc: AIOP FW is already");
printf(" applied\n");
return err;
}
aiop_fw_addr = simple_strtoull(argv[3], NULL,
16);
err = load_mc_aiop_img(aiop_fw_addr);
if (!err)
printf("fsl-mc: AIOP FW applied\n");
break;
#endif
default:
printf("Invalid option: %s\n", argv[2]);
goto usage;
break;
}
}
break;
case 'a': {
u64 mc_dpl_addr;
if (argc < 4)
goto usage;
if (get_dpl_apply_status() == 0) {
printf("fsl-mc: DPL already applied\n");
return err;
}
mc_dpl_addr = simple_strtoull(argv[3], NULL,
16);
if (get_mc_boot_status() != 0) {
printf("fsl-mc: Deploying data path layout ..");
printf("ERROR (MC is not booted)\n");
return -ENODEV;
}
if (!fsl_mc_ldpaa_exit(NULL))
err = mc_apply_dpl(mc_dpl_addr);
break;
}
default:
printf("Invalid option: %s\n", argv[1]);
goto usage;
break;
}
return err;
usage:
return CMD_RET_USAGE;
}
/*******************************************************************************
* main()
*
* description: Send alarm message to alarm manager
*
******************************************************************************/
int main(int argc, char *argv[])
{
int position = 500;
//print_menu();
//printf("> \n");
mc_init("eth1");
#if 0
while (1)
{
char cmd;
scanf("%c", &cmd);
switch(cmd)
{
case 'a':
{
epl_init("eth1");
break;
}
case 'b':
{
epl_reset();
break;
}
case 'c':
{
mc_init("eth1");
break;
}
case 'd':
{
mc_reset_error();
break;
}
case 'e':
{
int edge;
scanf("%d", &edge);
int ret = mc_set_positive_end_position(edge);
printf("ret = %d\n", ret);
break;
}
case 'f':
{
int edge;
scanf("%d", &edge);
int ret = mc_set_negative_end_position(edge);
printf("ret = %d\n", ret);
break;
}
case 'g':
{
int cnt = 0;
while(cnt++<100)
{
int ret = mc_move_absolute(1800,40,20,20,0);
if(ret != 0)
{
printf("ret = %d\n", ret);
PrintMCStatus();
break;
}
ret = mc_stop(10000);
if(ret != 0)
{
printf("ret = %d\n", ret);
PrintMCStatus();
break;
}
ret = mc_move_absolute(-1700,40,20,20,0);
if(ret != 0)
{
printf("ret = %d\n", ret);
PrintMCStatus();
break;
}
ret = mc_stop(10000);
if(ret != 0)
{
printf("ret = %d\n", ret);
PrintMCStatus();
break;
}
}
break;
}
case '1':
{
mc_power();
break;
}
case '2':
{
mc_home(0, 0);
break;
}
case '3':
{
int pos, velocity;
scanf("%d %d", &pos, &velocity);
printf("pos is %d, velocity is %d\n", pos,velocity);
mc_move_absolute(pos,velocity,20,20,0);
position += 500;
break;
}
case '4':
{
mc_move_additive(50,100,20,20);
break;
}
case '5':
{
int velocity, direction;
scanf("%d %d", &velocity, &direction);
mc_move_velocity(50,100,20,direction);
break;
}
case '6':
{
PrintMCStatus();
break;
}
case '7':
{
int ret = mc_stop(0);
printf("ret = %d\n", ret);
break;
}
case '8':
{
printf("position is %d\n", mc_get_position());
break;
}
case '9':
{
printf("velocity is %d\n", mc_get_velocity());
break;
}
case '0':
{
unsigned short id;
char str_err[256];
id = mc_get_error_id();
get_err_str(id, str_err);
printf("error id is %d\n", id);
printf("error id is %s\n", str_err);
break;
}
case 'x':
case 'X':
{
return 0;
}
case 'h':
case 'H':
{
print_menu();
break;
}
default:
{
printf("> ");
break;
}
}
}
#else
while(1)
sleep(5);
#endif
return 0;
}