int mdss_dsi_on(struct mdss_panel_data *pdata) { int ret = 0; struct mdss_panel_info *pinfo; struct mipi_panel_info *mipi; struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL; int cur_power_state; #if defined(CONFIG_FB_MSM_MDSS_SAMSUNG) struct samsung_display_driver_data *vdd = NULL; u32 reg_backup; #endif if (pdata == NULL) { pr_err("%s: Invalid input data\n", __func__); return -EINVAL; } ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata, panel_data); cur_power_state = pdata->panel_info.panel_power_state; pr_info("%s+: ctrl=%p ndx=%d cur_power_state=%d\n", __func__, ctrl_pdata, ctrl_pdata->ndx, cur_power_state); pinfo = &pdata->panel_info; mipi = &pdata->panel_info.mipi; #if defined(CONFIG_FB_MSM_MDSS_SAMSUNG) if (pinfo->esd_recovery.esd_irq_enable) pinfo->esd_recovery.esd_irq_enable(true, false, (void *)pinfo); #endif if (mdss_dsi_is_panel_on_interactive(pdata)) { pr_err("%s: panel already on\n", __func__); goto end; } ret = mdss_dsi_panel_power_ctrl(pdata, MDSS_PANEL_POWER_ON); if (ret) { pr_err("%s:Panel power on failed. rc=%d\n", __func__, ret); return ret; } if (cur_power_state != MDSS_PANEL_POWER_OFF) { pr_debug("%s: dsi_on from panel low power state\n", __func__); goto end; } /* * Enable DSI clocks. * This is also enable the DSI core power block and reset/setup * DSI phy */ mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1); mdss_dsi_sw_reset(ctrl_pdata, true); /* * Issue hardware reset line after enabling the DSI clocks and data * data lanes for LP11 init */ if (mipi->lp11_init) { #if defined(CONFIG_FB_MSM_MDSS_SAMSUNG) vdd = check_valid_ctrl(ctrl_pdata); if (!IS_ERR_OR_NULL(vdd) && vdd->dtsi_data[ctrl_pdata->ndx].samsung_lp11_init) { /* LP11 */ reg_backup = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac); MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, 0x1F << 16); wmb(); if (mipi->init_delay) usleep(mipi->init_delay); } #endif mdss_dsi_panel_reset(pdata, 1); #if defined(CONFIG_FB_MSM_MDSS_SAMSUNG) /* LP11 Restore */ if (!IS_ERR_OR_NULL(vdd) && vdd->dtsi_data[ctrl_pdata->ndx].samsung_lp11_init) MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, reg_backup); #endif } if (mipi->init_delay) usleep(mipi->init_delay); if (mipi->force_clk_lane_hs) { u32 tmp; tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac); tmp |= (1<<28); MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp); wmb(); } if (pdata->panel_info.type == MIPI_CMD_PANEL) mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0); pinfo->dsi_on_status = true; end: pr_err("%s-:\n", __func__); return 0; }
int mdss_dsi_on(struct mdss_panel_data *pdata) { int ret = 0; struct mdss_panel_info *pinfo; struct mipi_panel_info *mipi; struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL; int cur_power_state; if (pdata == NULL) { pr_err("%s: Invalid input data\n", __func__); return -EINVAL; } ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata, panel_data); cur_power_state = pdata->panel_info.panel_power_state; pr_debug("%s+: ctrl=%p ndx=%d cur_power_state=%d\n", __func__, ctrl_pdata, ctrl_pdata->ndx, cur_power_state); pinfo = &pdata->panel_info; mipi = &pdata->panel_info.mipi; if (mdss_dsi_is_panel_on_interactive(pdata)) { pr_debug("%s: panel already on\n", __func__); goto end; } ret = mdss_dsi_panel_power_ctrl(pdata, MDSS_PANEL_POWER_ON); if (ret) { pr_err("%s:Panel power on failed. rc=%d\n", __func__, ret); return ret; } if (cur_power_state != MDSS_PANEL_POWER_OFF) { pr_debug("%s: dsi_on from panel low power state\n", __func__); goto end; } /* * Enable DSI clocks. * This is also enable the DSI core power block and reset/setup * DSI phy */ mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1); mdss_dsi_sw_reset(ctrl_pdata, true); /* * Issue hardware reset line after enabling the DSI clocks and data * data lanes for LP11 init */ if (mipi->lp11_init) mdss_dsi_panel_reset(pdata, 1); if (mipi->init_delay) usleep(mipi->init_delay); if (mipi->force_clk_lane_hs) { u32 tmp; tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac); tmp |= (1<<28); MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp); wmb(); } if (pdata->panel_info.type == MIPI_CMD_PANEL) mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0); end: pr_debug("%s-:\n", __func__); return 0; }