static void mdss_dsi_clk_ctrl_sub(struct mdss_dsi_ctrl_pdata *ctrl, int enable) { int changed = 0; if (enable) { if (ctrl->clk_cnt_sub == 0) changed++; ctrl->clk_cnt_sub++; } else { if (ctrl->clk_cnt_sub) { ctrl->clk_cnt_sub--; if (ctrl->clk_cnt_sub == 0) changed++; } else { pr_debug("%s: Can not be turned off\n", __func__); } } pr_debug("%s: ndx=%d clk_cnt_sub=%d changed=%d enable=%d\n", __func__, ctrl->ndx, ctrl->clk_cnt_sub, changed, enable); if (changed) { if (enable) { if (mdss_dsi_bus_clk_start(ctrl) == 0) mdss_dsi_link_clk_start(ctrl); } else { mdss_dsi_link_clk_stop(ctrl); mdss_dsi_bus_clk_stop(ctrl); } } }
static int mdss_dsi_clk_ctrl_sub(struct mdss_dsi_ctrl_pdata *ctrl, u8 clk_type, int enable) { int rc = 0; if (!ctrl) { pr_err("%s: Invalid arg\n", __func__); return -EINVAL; } pr_debug("%s: ndx=%d clk_type=%08x enable=%d\n", __func__, ctrl->ndx, clk_type, enable); if (enable) { if (clk_type & DSI_BUS_CLKS) { rc = mdss_dsi_bus_clk_start(ctrl); if (rc) { pr_err("Failed to start bus clocks. rc=%d\n", rc); goto error; } } if (clk_type & DSI_LINK_CLKS) { rc = mdss_dsi_link_clk_start(ctrl); if (rc) { pr_err("Failed to start link clocks. rc=%d\n", rc); if (clk_type & DSI_BUS_CLKS) mdss_dsi_bus_clk_stop(ctrl); goto error; } } } else { if (clk_type & DSI_LINK_CLKS) mdss_dsi_link_clk_stop(ctrl); if (clk_type & DSI_BUS_CLKS) mdss_dsi_bus_clk_stop(ctrl); } error: return rc; }
static int mdss_dsi_clk_ctrl_sub(struct mdss_dsi_ctrl_pdata *ctrl, u8 clk_type, int enable) { int rc = 0; struct mdss_panel_data *pdata; if (!ctrl) { pr_err("%s: Invalid arg\n", __func__); return -EINVAL; } pdata = &ctrl->panel_data; pr_debug("%s: ndx=%d clk_type=%08x enable=%d\n", __func__, ctrl->ndx, clk_type, enable); if (enable) { if (clk_type & DSI_BUS_CLKS) { rc = mdss_dsi_core_power_ctrl(ctrl, enable); if (rc) { pr_err("%s: Failed to enable core power. rc=%d\n", __func__, rc); goto error; } } if (clk_type & DSI_LINK_CLKS) { rc = mdss_dsi_link_clk_start(ctrl); if (rc) { pr_err("%s: Failed to start link clocks. rc=%d\n", __func__, rc); goto error_link_clk_start; } /* Disable ULPS, if enabled */ if (ctrl->ulps) { rc = mdss_dsi_ulps_config(ctrl, 0); if (rc) { pr_err("%s: Failed to exit ulps. rc=%d\n", __func__, rc); goto error_ulps_exit; } } } } else { if (clk_type & DSI_LINK_CLKS) { /* * If ULPS feature is enabled, enter ULPS first. * If ULPS during suspend is not enabled, no need * to enable ULPS when turning off the clocks * while blanking the panel. */ if (((mdss_dsi_ulps_feature_enabled(pdata)) && (pdata->panel_info.blank_state != MDSS_PANEL_BLANK_BLANK)) || (pdata->panel_info.ulps_suspend_enabled)) mdss_dsi_ulps_config(ctrl, 1); mdss_dsi_link_clk_stop(ctrl); } if (clk_type & DSI_BUS_CLKS) { rc = mdss_dsi_core_power_ctrl(ctrl, enable); if (rc) { pr_err("%s: Failed to disable core power. rc=%d\n", __func__, rc); } } } return rc; error_ulps_exit: mdss_dsi_link_clk_stop(ctrl); error_link_clk_start: if ((clk_type & DSI_BUS_CLKS) && (mdss_dsi_core_power_ctrl(ctrl, !enable))) pr_warn("%s: Failed to disable core power. rc=%d\n", __func__, rc); error: return rc; }
static int mdss_dsi_clk_ctrl_sub(struct mdss_dsi_ctrl_pdata *ctrl, u8 clk_type, int enable) { int rc = 0; struct mdss_panel_data *pdata; if (!ctrl) { pr_err("%s: Invalid arg\n", __func__); return -EINVAL; } pdata = &ctrl->panel_data; pr_debug("%s: ndx=%d clk_type=%08x enable=%d\n", __func__, ctrl->ndx, clk_type, enable); if (enable) { if (clk_type & DSI_BUS_CLKS) { /* enable mdss gdsc */ pr_debug("%s: Enable MDP FS\n", __func__); rc = msm_dss_enable_vreg( ctrl->power_data[DSI_CORE_PM].vreg_config, ctrl->power_data[DSI_CORE_PM].num_vreg, 1); if (rc) { pr_err("%s: failed to enable vregs for %s\n", __func__, __mdss_dsi_pm_name(DSI_CORE_PM)); goto error; } rc = mdss_dsi_bus_clk_start(ctrl); if (rc) { pr_err("Failed to start bus clocks. rc=%d\n", rc); goto error_vreg; } } if (clk_type & DSI_LINK_CLKS) { rc = mdss_dsi_link_clk_start(ctrl); if (rc) { pr_err("Failed to start link clocks. rc=%d\n", rc); goto error_link_clk_start; } /* Disable ULPS, if enabled */ if (ctrl->ulps) { rc = mdss_dsi_ulps_config(ctrl, 0); if (rc) { pr_err("Failed to exit ulps. rc=%d\n", rc); goto error_ulps_exit; } } } } else { if (clk_type & DSI_LINK_CLKS) { /* * If ULPS feature is enabled, enter ULPS first. * No need to enable ULPS when turning off clocks * while blanking the panel. */ if ((mdss_dsi_ulps_feature_enabled(pdata)) && (pdata->panel_info.panel_power_on)) mdss_dsi_ulps_config(ctrl, 1); mdss_dsi_link_clk_stop(ctrl); } if (clk_type & DSI_BUS_CLKS) { mdss_dsi_bus_clk_stop(ctrl); /* disable mdss gdsc */ pr_debug("%s: Disable MDP FS\n", __func__); rc = msm_dss_enable_vreg( ctrl->power_data[DSI_CORE_PM].vreg_config, ctrl->power_data[DSI_CORE_PM].num_vreg, 0); if (rc) { pr_warn("%s: failed to disable vregs for %s\n", __func__, __mdss_dsi_pm_name(DSI_CORE_PM)); rc = 0; } } } return rc; error_ulps_exit: mdss_dsi_link_clk_stop(ctrl); error_link_clk_start: if (clk_type & DSI_BUS_CLKS) mdss_dsi_bus_clk_stop(ctrl); error_vreg: if ((clk_type & DSI_BUS_CLKS) && (msm_dss_enable_vreg(ctrl->power_data[DSI_CORE_PM].vreg_config, ctrl->power_data[DSI_CORE_PM].num_vreg, 0))) { pr_warn("%s: failed to disable vregs for %s\n", __func__, __mdss_dsi_pm_name(DSI_CORE_PM)); } error: return rc; }
static int mdss_dsi_clk_ctrl_sub(struct mdss_dsi_ctrl_pdata *ctrl, u8 clk_type, int enable) { int rc = 0; struct mdss_panel_data *pdata; if (!ctrl) { pr_err("%s: Invalid arg\n", __func__); return -EINVAL; } pdata = &ctrl->panel_data; pr_debug("%s: ndx=%d clk_type=%08x enable=%d\n", __func__, ctrl->ndx, clk_type, enable); if (enable) { if (clk_type & DSI_BUS_CLKS) { /* enable mdss gdsc */ pr_debug("%s: Enable MDP FS\n", __func__); rc = msm_dss_enable_vreg( ctrl->power_data[DSI_CORE_PM].vreg_config, ctrl->power_data[DSI_CORE_PM].num_vreg, 1); if (rc) { pr_err("%s: failed to enable vregs for %s\n", __func__, __mdss_dsi_pm_name(DSI_CORE_PM)); goto error; } rc = mdss_dsi_bus_clk_start(ctrl); if (rc) { pr_err("Failed to start bus clocks. rc=%d\n", rc); goto error_vreg; } } if (clk_type & DSI_LINK_CLKS) { if (ctrl->mmss_clamp) { mdss_dsi_phy_init(pdata); mdss_dsi_ctrl_setup(pdata); mdss_dsi_host_init(pdata); mdss_dsi_op_mode_config(pdata->panel_info.mipi.mode, pdata); /* * ULPS Entry Request. This is needed because, after power * collapse and reset, the DSI controller resets back to * idle state and not ULPS. */ mdss_dsi_ulps_config(ctrl, 1); mdss_dsi_clamp_ctrl(ctrl, 0); } rc = mdss_dsi_link_clk_start(ctrl); if (rc) { pr_err("Failed to start link clocks. rc=%d\n", rc); goto error_link_clk_start; } /* Disable ULPS, if enabled */ if (ctrl->ulps) { rc = mdss_dsi_ulps_config(ctrl, 0); if (rc) { pr_err("Failed to exit ulps. rc=%d\n", rc); goto error_ulps_exit; } } } } else { if (clk_type & DSI_LINK_CLKS) { /* * If ULPS feature is enabled, enter ULPS first. * No need to enable ULPS when turning off clocks * while blanking the panel. */ if (((mdss_dsi_ulps_feature_enabled(pdata)) && (pdata->panel_info.panel_power_on)) || (pdata->panel_info.ulps_suspend_enabled && !pdata->panel_info.panel_power_on)) { mdss_dsi_ulps_config(ctrl, 1); mdss_dsi_link_clk_stop(ctrl); mdss_dsi_clamp_ctrl(ctrl, 1); } else { mdss_dsi_link_clk_stop(ctrl); } } if (clk_type & DSI_BUS_CLKS) { mdss_dsi_bus_clk_stop(ctrl); /* disable mdss gdsc */ pr_debug("%s: Disable MDP FS\n", __func__); rc = msm_dss_enable_vreg( ctrl->power_data[DSI_CORE_PM].vreg_config, ctrl->power_data[DSI_CORE_PM].num_vreg, 0); if (rc) { pr_warn("%s: failed to disable vregs for %s\n", __func__, __mdss_dsi_pm_name(DSI_CORE_PM)); rc = 0; } } } return rc; error_ulps_exit: mdss_dsi_link_clk_stop(ctrl); error_link_clk_start: if (clk_type & DSI_BUS_CLKS) mdss_dsi_bus_clk_stop(ctrl); error_vreg: if ((clk_type & DSI_BUS_CLKS) && (msm_dss_enable_vreg(ctrl->power_data[DSI_CORE_PM].vreg_config, ctrl->power_data[DSI_CORE_PM].num_vreg, 0))) { pr_warn("%s: failed to disable vregs for %s\n", __func__, __mdss_dsi_pm_name(DSI_CORE_PM)); } error: return rc; }