void print_parse_result()
{
int i;
printf("Instruction Information\n");
for(i = 0; i < text_size/4; i++)
{
printf("INST_INFO[%d].value : %x\n",i, INST_INFO[i].value);
printf("INST_INFO[%d].opcode : %d\n",i, INST_INFO[i].opcode);
switch(INST_INFO[i].opcode)
{
//Type I
case 0x9: //(0x001001)ADDIU
case 0xc: //(0x001100)ANDI
case 0xf: //(0x001111)LUI
case 0xd: //(0x001101)ORI
case 0xb: //(0x001011)SLTIU
case 0x23: //(0x100011)LW
case 0x2b: //(0x101011)SW
case 0x4: //(0x000100)BEQ
case 0x5: //(0x000101)BNE
printf("INST_INFO[%d].rs : %d\n",i, INST_INFO[i].r_t.r_i.rs);
printf("INST_INFO[%d].rt : %d\n",i, INST_INFO[i].r_t.r_i.rt);
printf("INST_INFO[%d].imm : %d\n",i, INST_INFO[i].r_t.r_i.r_i.imm);
break;
//TYPE R
case 0x0: //(0x000000)ADDU, AND, NOR, OR, SLTU, SLL, SRL, SUBU if JR
printf("INST_INFO[%d].func_code : %d\n",i, INST_INFO[i].func_code);
printf("INST_INFO[%d].rs : %d\n",i, INST_INFO[i].r_t.r_i.rs);
printf("INST_INFO[%d].rt : %d\n",i, INST_INFO[i].r_t.r_i.rt);
printf("INST_INFO[%d].rd : %d\n",i, INST_INFO[i].r_t.r_i.r_i.r.rd);
printf("INST_INFO[%d].shamt : %d\n",i, INST_INFO[i].r_t.r_i.r_i.r.shamt);
break;
//TYPE J
case 0x2: //(0x000010)J
case 0x3: //(0x000011)JAL
printf("INST_INFO[%d].target : %d\n",i, INST_INFO[i].r_t.target);
break;
default:
printf("Not available instruction\n");
assert(0);
}
}
printf("Memory Dump - Text Segment\n");
for(i = 0; i < text_size; i+=4)
printf("text_seg[%d] : %x\n", i, mem_read_32(MEM_TEXT_START + i));
for(i = 0; i < data_size; i+=4)
printf("data_seg[%d] : %x\n", i, mem_read_32(MEM_DATA_START + i));
printf("Current PC: %x\n", CURRENT_STATE.PC);
}
/*
* Procedure : mdump
* Purpose : Dump a word-aligned region of memory to the
* output file.
*/
void mdump(FILE* dumpsim_file) {
int start = MEM_REGIONS[1].start;
int size = MEM_REGIONS[1].size;
int i, j;
fprintf(dumpsim_file, "\nMemory content [0x%08x..0x%08x] :\n", start, start + size);
fprintf(dumpsim_file, "-------------------------------------\n");
for (i = 0; i < size/4; i++) {
for (j = 0; j < 4; j++) {
fprintf(dumpsim_file, "MEM[%03d] : 0x%08x\t", (i*4 + j), mem_read_32(start + (i*4 + j)));
}
fprintf(dumpsim_file, "\n");
}
fprintf(dumpsim_file, "\n");
}
int cache_line_read_from_mem (va_t v_addr, pa_t p_addr)
{
uint32 buffer[64];
int i, rc;
for (i = 0; i < 64; i++) {
//printf ("reading mem at addr %u\n", p_addr + (i * 4));
rc = mem_read_32 (p_addr + (i * 4), &buffer[i]);
if (rc < 0) {
printf ("ERROR: mem_read_32 failed for p_addr %x\n", p_addr);
return -1;
}
//printf ("read %u : %x\n", i, buffer[i]);
}
rc = cache_add_data (v_addr, (p_addr & 0xFFFFF000), (uint8 *)buffer, 256);
return rc;
}
mem_wb_reg run_MEM()
{
ex_mem_reg EX_MEM = CURRENT_STATE.EX_MEM;
mem_wb_reg reg;
mem_wb_reg MEM_WB = CURRENT_STATE.MEM_WB;
//handling lw, sw
if(EX_MEM.cMemRd)
{
//TODO: read from memory!(hazardous!)
if(DEBUG) printf("EX_MEM ALU: %d\n",EX_MEM.ALUResult);
reg.memV = mem_read_32(EX_MEM.ALUResult);
if(DEBUG) printf("reg.memV: %d\n",reg.memV);
}
if(EX_MEM.cMemWrt)
{
//TODO: write to memory!
if(MEM_WB.cRegWrt && EX_MEM.cMemWrt && MEM_WB.wrtReg == EX_MEM.wrtReg)
{
if(noforward_set)
{
CURRENT_STATE.MEM_bubble_count = 1;
memset(®, 0, sizeof(reg));
return reg;
}
mem_write_32(EX_MEM.ALUResult, MEM_WB.memV);
}
else
mem_write_32(EX_MEM.ALUResult, EX_MEM.wrtData);
}
reg.PC = EX_MEM.PC;
if(EX_MEM.cMemRd) reg.ALUResult = reg.memV;
else reg.ALUResult = EX_MEM.ALUResult;
reg.wrtReg = EX_MEM.wrtReg;
reg.cMem2Reg = EX_MEM.cMem2Reg;
reg.cRegWrt = EX_MEM.cRegWrt;
return reg;
}
void process_instruction(){
/* Your code */
CURRENT_STATE.PC+=4;
int index = (CURRENT_STATE.PC - MEM_TEXT_START - 4)/4 ;
// printf(" index %d, NUM_INST %d \n",index,NUM_INST);
if( index+1 >= NUM_INST ) {
RUN_BIT=FALSE;
// printf("Run bit unset pc: %x\n",CURRENT_STATE.PC);
}
short opcode = INST_INFO[ index ].opcode;
short func_code = INST_INFO[ index ].func_code;
char rs;
char rt;
char rd;
unsigned int rs_data;
unsigned int rt_data;
unsigned int rd_data;
char shamt;
unsigned int imm;
switch(opcode) {
case 0: // 000000 ~
switch(func_code) {
case 0: // sll
rt = INST_INFO[ index ].r_t.r_i.rt;
rd = INST_INFO[ index ].r_t.r_i.r_i.r.rd;
shamt = INST_INFO[ index ].r_t.r_i.r_i.r.shamt;
CURRENT_STATE.REGS[ rd ] = CURRENT_STATE.REGS[ rt ] << shamt;
break;
case 2: // srl
rt = INST_INFO[ index ].r_t.r_i.rt;
rd = INST_INFO[ index ].r_t.r_i.r_i.r.rd;
shamt = INST_INFO[ index ].r_t.r_i.r_i.r.shamt;
CURRENT_STATE.REGS[ rd ] = CURRENT_STATE.REGS[ rt ] >> shamt;
break;
case 8: // jr
CURRENT_STATE.PC = CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rs ];
break;
case 33: // addu
rs = INST_INFO[ index ].r_t.r_i.rs;
rt = INST_INFO[ index ].r_t.r_i.rt;
rd = INST_INFO[ index ].r_t.r_i.r_i.r.rd;
CURRENT_STATE.REGS[ rd ] = CURRENT_STATE.REGS[ rs ]+ CURRENT_STATE.REGS[ rt ];
break;
case 35: // subu
rs = INST_INFO[ index ].r_t.r_i.rs;
rt = INST_INFO[ index ].r_t.r_i.rt;
rd = INST_INFO[ index ].r_t.r_i.r_i.r.rd;
CURRENT_STATE.REGS[ rd ] = CURRENT_STATE.REGS[ rs ] - CURRENT_STATE.REGS[ rt ];
break;
case 36: // and
rs = INST_INFO[ index ].r_t.r_i.rs;
rt = INST_INFO[ index ].r_t.r_i.rt;
rd = INST_INFO[ index ].r_t.r_i.r_i.r.rd;
CURRENT_STATE.REGS[ rd ] = CURRENT_STATE.REGS[ rs ] & CURRENT_STATE.REGS[ rt ];
break;
case 37: // or
rs = INST_INFO[ index ].r_t.r_i.rs;
rt = INST_INFO[ index ].r_t.r_i.rt;
rd = INST_INFO[ index ].r_t.r_i.r_i.r.rd;
CURRENT_STATE.REGS[ rd ] = (CURRENT_STATE.REGS[ rs ] | CURRENT_STATE.REGS[ rt ]);
break;
case 39: // nor
rs = INST_INFO[ index ].r_t.r_i.rs;
rt = INST_INFO[ index ].r_t.r_i.rt;
rd = INST_INFO[ index ].r_t.r_i.r_i.r.rd;
CURRENT_STATE.REGS[ rd ] = ~(CURRENT_STATE.REGS[ rs ] | CURRENT_STATE.REGS[ rt ]);
break;
case 43: // sltu
rs = INST_INFO[ index ].r_t.r_i.rs;
rt = INST_INFO[ index ].r_t.r_i.rt;
rd = INST_INFO[ index ].r_t.r_i.r_i.r.rd;
if( CURRENT_STATE.REGS[rs] < CURRENT_STATE.REGS[rt] ) {
CURRENT_STATE.REGS[rd] = 1;
}
else {
CURRENT_STATE.REGS[rd] = 0;
}
break;
}
break;
case 2: // j
CURRENT_STATE.PC = (CURRENT_STATE.PC & 0xf0000000) | INST_INFO[ index ].r_t.target<<2;
break;
case 3: // jal
CURRENT_STATE.REGS[31] = CURRENT_STATE.PC;
CURRENT_STATE.PC = (CURRENT_STATE.PC & 0xf0000000) | INST_INFO[ index ].r_t.target<<2;
break;
case 4: // beq
rs_data = CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rs ];
rt_data = CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rt ];
imm = INST_INFO[ index ].r_t.r_i.r_i.imm;
if( rs_data == rt_data ) {
CURRENT_STATE.PC += imm<<2;
}
break;
case 5: // bne
rs_data = CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rs ];
rt_data = CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rt ];
imm = INST_INFO[ index ].r_t.r_i.r_i.imm;
if( rs_data != rt_data ) {
CURRENT_STATE.PC += imm<<2;
}
break;
case 9: // addiu
rs_data = CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rs ];
imm = INST_INFO[ index ].r_t.r_i.r_i.imm;
// printf("rs_data is %d imm is %hd \n",rs_data,imm);
CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rt ] = rs_data+imm;
break;
case 11:// sltiu
rs_data = CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rs ];
imm = INST_INFO[ index ].r_t.r_i.r_i.imm;
// printf("imm is %x\n", imm);
if( rs_data< imm) {
CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rt ] = 1;
} else {
CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rt ] = 0;
}
break;
case 12:// andi
rs_data = CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rs ];
imm = (unsigned short) INST_INFO[ index ].r_t.r_i.r_i.imm;
// printf(" rs_data %p imm %p",rs_data,imm);
CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rt ] = rs_data&imm;
break;
case 13:// ori
// printf(" reg num is %hd\n",INST_INFO[ index ].r_t.r_i.rs );
rs_data = CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rs ];
// printf("rs is %p \n",rs);
imm = (unsigned short) INST_INFO[ index ].r_t.r_i.r_i.imm;
CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rt ] = rs_data|imm;
break;
case 15:// lui
imm = (unsigned short) INST_INFO[ index ].r_t.r_i.r_i.imm;
// printf("rt is %hd\n",INST_INFO[ index ].r_t.r_i.rt);
CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rt ] = imm<<16;
// printf("imm<<16 is p\n",imm<<16);
break;
case 35:// lw
rt = INST_INFO[ index ].r_t.r_i.rt;
rs_data = CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rs ];
imm = INST_INFO[ index ].r_t.r_i.r_i.imm;
CURRENT_STATE.REGS[ rt ] = mem_read_32( rs_data+imm );
break;
case 43:// sw
rt_data = CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rt ];
rs_data = CURRENT_STATE.REGS[ INST_INFO[ index ].r_t.r_i.rs ];
imm = INST_INFO[ index ].r_t.r_i.r_i.imm;
mem_write_32( imm+rs_data, rt_data );
break;
}
}
