void
start_rx_streaming_cmd(const u2_mac_addr_t *host, op_start_rx_streaming_t *p)
{
host_mac_addr = *host; // remember who we're sending to
/*
* Construct ethernet header and word0 and preload into two buffers
*/
u2_eth_packet_t pkt;
memset(&pkt, 0, sizeof(pkt));
pkt.ehdr.dst = *host;
pkt.ehdr.ethertype = U2_ETHERTYPE;
u2p_set_word0(&pkt.fixed, 0, 0);
// DSP RX will fill in timestamp
memcpy_wa(buffer_ram(DSP_RX_BUF_0), &pkt, sizeof(pkt));
memcpy_wa(buffer_ram(DSP_RX_BUF_1), &pkt, sizeof(pkt));
if (FW_SETS_SEQNO)
fw_seqno = 0;
streaming_items_per_frame = p->items_per_frame;
restart_streaming();
}
static void
start_tx_transfers(void)
{
bp_clear_buf(DSP_TX_BUF_0); // FIXME, really goes in state machine
bp_clear_buf(DSP_TX_BUF_1);
// fill everything with a constant 32k + 0j
uint32_t const_sample = (32000 << 16) | 0;
int i;
for (i = 0; i < BP_NLINES; i++){
buffer_ram(DSP_TX_BUF_0)[i] = const_sample;
buffer_ram(DSP_TX_BUF_1)[i] = const_sample;
}
/*
* Construct ethernet header and word0 and preload into two buffers
*/
u2_eth_packet_t pkt;
memset(&pkt, 0, sizeof(pkt));
//pkt.ehdr.dst = *host;
pkt.ehdr.ethertype = U2_ETHERTYPE;
u2p_set_word0(&pkt.fixed,
U2P_TX_IMMEDIATE | U2P_TX_START_OF_BURST, 0);
u2p_set_timestamp(&pkt.fixed, T_NOW);
memcpy_wa(buffer_ram(DSP_TX_BUF_0), &pkt, sizeof(pkt));
memcpy_wa(buffer_ram(DSP_TX_BUF_1), &pkt, sizeof(pkt));
int tx_scale = 256;
// setup Tx DSP regs
dsp_tx_regs->clear_state = 1; // reset
dsp_tx_regs->freq = 408021893; // 9.5 MHz [2**32 * fc/fsample]
dsp_tx_regs->scale_iq = (tx_scale << 16) | tx_scale;
dsp_tx_regs->interp_rate = 32;
// kick off the state machine
// dbsm_start(&dsp_rx_sm);
SEND_CONST_TO_DSP_TX(); // send constant buffer to DSP TX
}