示例#1
0
文件: line.c 项目: Nekrofage/DoomRPi
int GGI_m2164w_drawline(ggi_visual *vis, int x, int y, int x2, int y2)
{
	struct m2164w_priv *priv = M2164W_PRIV(vis);
	volatile uint8_t *mmioaddr = FBDEV_PRIV(vis)->mmioaddr;
	int yadd = vis->w_frame_num * LIBGGI_VIRTY(vis);
	uint32_t dwgctl;

	if (yadd) {
		y += yadd;
		y2 += yadd;
	}

	dwgctl = OP_AUTOLINE_CLOSE | SOLID | SHFTZERO | BOP_COPY |
		BLTMOD_BFCOL;

	mga_gcupdate(mmioaddr, priv, LIBGGI_MODE(vis), LIBGGI_GC(vis),
		     LIBGGI_VIRTX(vis), yadd);

	if (priv->dwgctl != dwgctl) {
		mga_waitfifo(mmioaddr, 3);
		mga_setdwgctl(mmioaddr, priv, dwgctl);
	} else {
		mga_waitfifo(mmioaddr, 2);
	}
	mga_out32(mmioaddr, (unsigned)RS16(x) | (RS16(y) << 16), XYSTRT);
	mga_out32(mmioaddr, (unsigned)RS16(x2) | (RS16(y2) << 16),
		  XYEND | EXECUTE);

	vis->accelactive = 1;

	return 0;
}
示例#2
0
文件: box.c 项目: antrik/libggi
int GGI_m2164w_fillscreen(struct ggi_visual *vis)
{
	struct m2164w_priv *priv = M2164W_PRIV(vis);
	volatile uint8_t *mmioaddr = FBDEV_PRIV(vis)->mmioaddr;
	int virtx = LIBGGI_VIRTX(vis);
	int virty = LIBGGI_VIRTY(vis);
	int yadd = vis->w_frame_num * LIBGGI_VIRTY(vis);

	mga_gcupdate(mmioaddr, priv, LIBGGI_MODE(vis),
		     LIBGGI_GC(vis), LIBGGI_VIRTX(vis), yadd);

	if (priv->dwgctl != priv->drawboxcmd) {
		mga_waitfifo(mmioaddr, 3);
		mga_setdwgctl(mmioaddr, priv, priv->drawboxcmd);
	} else {
		mga_waitfifo(mmioaddr, 2);
	}
	mga_out32(mmioaddr, (unsigned)RS16(virtx) << 16, FXBNDRY);
	mga_out32(mmioaddr, (unsigned)(RS16(yadd) << 16) | RS16(virty + yadd),
		  YDSTLEN | EXECUTE);

	vis->accelactive = 1;

	return 0;
}
示例#3
0
文件: box.c 项目: antrik/libggi
int GGI_m2164w_drawbox(struct ggi_visual *vis, int x, int y, int w, int h)
{
	if (w > 0 && h > 0) {	/* 0 width is not OK! */
		struct m2164w_priv *priv = M2164W_PRIV(vis);
		volatile uint8_t *mmioaddr = FBDEV_PRIV(vis)->mmioaddr;
		int yadd = vis->w_frame_num * LIBGGI_VIRTY(vis);

		y += yadd;

		mga_gcupdate(mmioaddr, priv, LIBGGI_MODE(vis), LIBGGI_GC(vis),
			     LIBGGI_VIRTX(vis), yadd);

		if (priv->dwgctl != priv->drawboxcmd) {
			mga_waitfifo(mmioaddr, 3);
			mga_setdwgctl(mmioaddr, priv, priv->drawboxcmd);
		} else {
			mga_waitfifo(mmioaddr, 2);
		}
		mga_out32(mmioaddr, (unsigned)(RS16(x + w) << 16) | RS16(x),
			  FXBNDRY);
		mga_out32(mmioaddr, (unsigned)(RS16(y) << 16) | RS16(h),
			  YDSTLEN | EXECUTE);

		vis->accelactive = 1;
	}

	return 0;
}
示例#4
0
文件: hline.c 项目: Nekrofage/DoomRPi
int GGI_mga_g400_drawhline(ggi_visual *vis, int x, int y, int w)
{
	struct mga_g400_priv *priv = MGA_G400_PRIV(vis);
	volatile uint8_t *mmioaddr = FBDEV_PRIV(vis)->mmioaddr;
	int yadd = vis->w_frame_num * LIBGGI_VIRTY(vis);
	uint32_t dwgctl;

	y += yadd;
	y = RS16(y) << 16;

	dwgctl = OP_AUTOLINE_CLOSE | SOLID | SHFTZERO | BOP_COPY |
		BLTMOD_BFCOL;

	mga_gcupdate(mmioaddr, priv, LIBGGI_MODE(vis), LIBGGI_GC(vis),
		     LIBGGI_VIRTX(vis), yadd);

	if (priv->dwgctl != dwgctl) {
		mga_waitfifo(mmioaddr, 3);
		mga_setdwgctl(mmioaddr, priv, dwgctl);
	} else {
		mga_waitfifo(mmioaddr, 2);
	}
	/* y has been shifted above */
	mga_out32(mmioaddr, (unsigned)RS16(x) | y, XYSTRT);
	mga_out32(mmioaddr, (unsigned)RS16(x + w-1) | y, XYEND | EXECUTE);

	vis->accelactive = 1;

	return 0;
}
示例#5
0
int GGI_mga_g400_copybox(ggi_visual *vis, int x, int y, int w, int h,
		       int dstx, int dsty)
{
	struct mga_g400_priv *priv = MGA_G400_PRIV(vis);
	volatile uint8_t *mmioaddr = FBDEV_PRIV(vis)->mmioaddr;
	int virtx = LIBGGI_VIRTX(vis);
	int yadd = vis->w_frame_num * LIBGGI_VIRTY(vis);
	int32_t ar5 = virtx;
	int32_t begin, end;
	uint32_t sgn = 0;
	uint32_t dwgctl;

#define COPY_LEFT	1
#define COPY_UP		4

	dsty += yadd;
	y += vis->r_frame_num*LIBGGI_VIRTY(vis);

	if (dsty > y) {
		sgn |= COPY_UP;
		y += h - 1;
		dsty += h - 1;
		ar5 = - ar5;
	}
	
	begin = end = y * virtx + x;

	w--;
	if (dstx > x) {
		sgn |= COPY_LEFT;
		begin += w;
	} else {
		end += w;
	}

	dwgctl = BLTMOD_BFCOL | BOP_COPY | SHFTZERO | OP_BITBLT
		| (sgn ? 0 : SGNZERO);

	mga_gcupdate(mmioaddr, priv, LIBGGI_MODE(vis),
		     LIBGGI_GC(vis), virtx, yadd);

	if (priv->dwgctl != dwgctl) {
		if (sgn) mga_waitfifo(mmioaddr, 7);
		else mga_waitfifo(mmioaddr, 6);
		mga_setdwgctl(mmioaddr, priv, dwgctl);
	} else {
		if (sgn) mga_waitfifo(mmioaddr, 6);
		else mga_waitfifo(mmioaddr, 5);
	}
	if (sgn) {
		mga_out32(mmioaddr, sgn, SGN);
	}
#if 0
	mga_out32(mmioaddr, RS18(end), AR0);
	mga_out32(mmioaddr, RS24(begin), AR3);
	mga_out32(mmioaddr, RS18(ar5), AR5);
#else
	mga_out32(mmioaddr, RS22(end), AR0);
	mga_out32(mmioaddr, RS24(begin), AR3);
	mga_out32(mmioaddr, RS22(ar5), AR5);
#endif
	mga_out32(mmioaddr, (unsigned)(RS16(dstx + w) << 16) | RS16(dstx),
		  FXBNDRY);
	mga_out32(mmioaddr, (unsigned)(RS16(dsty) << 16) | RS16(h), 
		  YDSTLEN | EXECUTE);

	vis->accelactive = 1;

	return 0;
}
示例#6
0
static inline void
dbblit_32bpp(ggi_visual *src, int sx, int sy, int w, int h, 
	     ggi_visual *dst, int dx, int dy, uint32_t srcfmt)
{
	struct m2164w_priv *priv = M2164W_PRIV(dst);
	volatile uint8_t *mmioaddr = FBDEV_PRIV(dst)->mmioaddr;
	int yadd = dst->w_frame_num * LIBGGI_VIRTY(dst);
	volatile uint32_t *dstptr;
	uint32_t dwgctl, bltmod = BLTMOD_BU32RGB;
	uint16_t opmode;
	uint8_t *srcptr;
	uint32_t *srcptr32;
	int srcinc;
	int maxpix;

	dstptr = priv->dmaaddr;
	srcinc = LIBGGI_FB_R_STRIDE(src);
	srcptr = (uint8_t*) LIBGGI_CURWRITE(src) + sy*srcinc + sx*4;
	srcinc -= w*4;
	maxpix = priv->dma_len/4;

	dy += yadd;

	switch (srcfmt) {
#if 0 /* This case is the default. */
	case GGI_DB_STD_24a32p8r8g8b8:
		bltmod = BLTMOD_BU32RGB;
		break;
#endif
	case GGI_DB_STD_24a32p8b8g8r8:
		bltmod = BLTMOD_BU32BGR;
		break;
	}

	dwgctl = bltmod | BOP_COPY | SHFTZERO | OP_ILOAD | SGNZERO;
#ifdef GGI_BIG_ENDIAN
	opmode = OPMODE_DMA_BLIT_WRITE | OPMODE_DMA_BE_32BPP;
#else
	opmode = OPMODE_DMA_BLIT_WRITE | OPMODE_DMA_LE;
#endif

	mga_gcupdate(mmioaddr, priv, LIBGGI_MODE(dst), LIBGGI_GC(dst),
		     LIBGGI_VIRTX(dst), yadd);

	if (priv->curopmode != opmode) {
		priv->curopmode = opmode;
		mga_waitidle(mmioaddr);
		mga_out16(mmioaddr, opmode, OPMODE);
	}
	if (priv->dwgctl != dwgctl) {
		mga_waitfifo(mmioaddr, 6);
		mga_setdwgctl(mmioaddr, priv, dwgctl);
	} else {
		mga_waitfifo(mmioaddr, 5);
	}
	mga_out32(mmioaddr, RS18(w-1), AR0);
	mga_out32(mmioaddr, 0, AR3);
	mga_out32(mmioaddr, 0, AR5);
	mga_out32(mmioaddr, (unsigned)(RS16(dx + w - 1) << 16) | RS16(dx), 
		  FXBNDRY);
	mga_out32(mmioaddr, (unsigned)(RS16(dy) << 16) | RS16(h),
		  YDSTLEN | EXECUTE);

	dst->accelactive = 1;

	if (w > maxpix) {
		while (h--) {
			int tmpw = w;

			while (tmpw) {
				int tmpw2 = (tmpw > maxpix ? maxpix : tmpw);

				tmpw -= tmpw2;
				while (tmpw2--) {
					srcptr32 = (uint32_t *)srcptr;
					*(dstptr++) = *(srcptr32++);
					srcptr = (uint8_t *)srcptr32;
				}
				dstptr = priv->dmaaddr;
			}
			srcptr += srcinc;
		}
	} else {
		while (h--) {
			int tmpw = w;

			while (tmpw--) {
				srcptr32 = (uint32_t *)srcptr;
				*(dstptr++) = *(srcptr32++);
				srcptr = (uint8_t *)srcptr32;
			}
			srcptr += srcinc;
			dstptr = priv->dmaaddr;
		}
	}
}