void __init mach_setup (char **cmdline) { /* Enable the instruction and data caches (if present) */ #if CONFIG_XILINX_MICROBLAZE0_USE_ICACHE==1 __flush_icache_all(); __enable_icache(); #endif #if CONFIG_XILINX_MICROBLAZE0_USE_DCACHE==1 __flush_dcache_all(); __enable_dcache(); #endif printk (KERN_INFO "CPU: MICROBLAZE\n"); /* Now called from tty_io.c:init_console(), where it should be (/ /* xmbrs_console_init(); */ /* * Enable master control on interrupt controller. Note * this does not enable interrupts in the processor, nor * does it enable individual IRQs on the controller. Just * initialises the intc in preparation for these things */ microblaze_intc_master_enable(); #ifdef CONFIG_XILINX_GPIO_0_INSTANCE /* Configure the GPIO */ /* 8 inputs, 16 outputs */ /* microblaze_gpio_setdir(CONFIG_XILINX_GPIO_0_BASEADDR,MICROBLAZE_GPIO_DIR); */ #endif }
void __init mach_setup (char **cmdline) { /* Enable the instruction and data caches (if present) */ #if CONFIG_XILINX_MICROBLAZE0_USE_ICACHE==1 __enable_icache(); #endif #if CONFIG_XILINX_MICROBLAZE0_USE_DCACHE==1 __enable_dcache(); #endif printk (KERN_INFO "CPU: MICROBLAZE\n"); /* memcons_setup (); */ /* This is defined as an initcall, but doesn't seem to work...*/ xmbrs_console_init(); /* * Enable master control on interrupt controller. Note * this does not enable interrupts in the processor, nor * does it enable individual IRQs on the controller. Just * initialises the intc in preparation for these things */ microblaze_intc_master_enable(); /* Configure the GPIO */ /* 8 inputs, 16 outputs */ /* microblaze_gpio_setdir(CONFIG_XILINX_GPIO_0_BASEADDR,MICROBLAZE_GPIO_DIR); */ }