static int __init mipi_video_hitachi_r69324a_wvga_pt_init(void)
{
int ret;
#ifdef CONFIG_FB_MSM_MIPI_PANEL_DETECT
if (msm_fb_detect_client("mipi_video_hitachi_hd"))
return 0;
#endif
pinfo.xres = 480;
pinfo.yres = 800;
pinfo.type = MIPI_VIDEO_PANEL;
pinfo.pdest = DISPLAY_1;
pinfo.wait_cycle = 0;
pinfo.bpp = 24;
/* QCT Limitation :
* All proch values must be a multiple of 4. 2011.01.20 */
#if defined(DSI_BIT_CLK_337MHZ)
pinfo.lcdc.h_back_porch = 20;
pinfo.lcdc.h_front_porch = 16;
pinfo.lcdc.h_pulse_width = 4;
pinfo.lcdc.v_back_porch = 22;
pinfo.lcdc.v_front_porch = 8;
pinfo.lcdc.v_pulse_width = 1;
#elif defined(DSI_BIT_CLK_325MHZ)
pinfo.lcdc.h_back_porch = 42;
pinfo.lcdc.h_front_porch = 56;
pinfo.lcdc.h_pulse_width = 20;
pinfo.lcdc.v_back_porch = 7;
pinfo.lcdc.v_front_porch = 8;
pinfo.lcdc.v_pulse_width = 1;
#elif defined(DSI_BIT_CLK_349MHZ)
pinfo.lcdc.h_back_porch = 42;
pinfo.lcdc.h_front_porch = 56;
pinfo.lcdc.h_pulse_width = 16;
pinfo.lcdc.v_back_porch = 7;
pinfo.lcdc.v_front_porch = 8;
pinfo.lcdc.v_pulse_width = 1;
#endif
pinfo.lcdc.border_clr = 0; /* blk */
pinfo.lcdc.underflow_clr = 0xff; /* blue */
pinfo.lcdc.hsync_skew = 0;
#ifdef CONFIG_LGE_BACKLIGHT_LM3533
pinfo.bl_max = 0xFF;
pinfo.bl_min = 0;
#else
pinfo.bl_max = 0x7F;
pinfo.bl_min = 1;
#endif
pinfo.fb_num = 2;
pinfo.mipi.mode = DSI_VIDEO_MODE;
pinfo.mipi.pulse_mode_hsa_he = FALSE;
pinfo.mipi.hfp_power_stop = TRUE;
pinfo.mipi.hbp_power_stop = TRUE;
pinfo.mipi.hsa_power_stop = TRUE;
pinfo.mipi.eof_bllp_power_stop = TRUE;
pinfo.mipi.bllp_power_stop = TRUE;
pinfo.mipi.traffic_mode = DSI_NON_BURST_SYNCH_EVENT;
pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
pinfo.mipi.vc = 0;
pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB;
pinfo.mipi.data_lane0 = TRUE;
pinfo.mipi.data_lane1 = TRUE;
#if defined(DSI_BIT_CLK_337MHZ)
pinfo.mipi.t_clk_post = 0x22;
pinfo.mipi.t_clk_pre = 0x33;
pinfo.clk_rate = 337000000;
pinfo.mipi.frame_rate = 65;
#elif defined(DSI_BIT_CLK_325MHZ)
pinfo.mipi.t_clk_post = 0x22;
pinfo.mipi.t_clk_pre = 0x34;
pinfo.clk_rate = 351340000;
pinfo.mipi.frame_rate = 60;
#elif defined(DSI_BIT_CLK_349MHZ)
pinfo.mipi.t_clk_post = 0x22;
pinfo.mipi.t_clk_pre = 0x34;
pinfo.clk_rate = 348990000;
pinfo.mipi.frame_rate = 60;
#endif
pinfo.mipi.stream = 0; /* dma_p */
pinfo.mipi.mdp_trigger = 0;/* DSI_CMD_TRIGGER_SW; */
pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db;
ret = mipi_hitachi_device_register(&pinfo, MIPI_DSI_PRIM,
MIPI_DSI_PANEL_WVGA_PT);
if (ret)
printk(KERN_ERR "%s: failed to register device!\n", __func__);
return ret;
}
static int __init mipi_video_hitachi_qhd_pt_init(void)
{
int ret;
#ifdef CONFIG_FB_MSM_MIPI_PANEL_DETECT
if (msm_fb_detect_client("mipi_video_hitachi_qhd"))
return 0;
#endif
pinfo.xres = 540;
pinfo.yres = 960;
pinfo.type = MIPI_VIDEO_PANEL;
pinfo.pdest = DISPLAY_1;
pinfo.wait_cycle = 0;
pinfo.bpp = 24;
/* QCT Limitation :
* All proch values must be a multiple of 4. 2011.01.20 */
#if defined(DSI_BIT_CLK_470MHZ)
pinfo.lcdc.h_back_porch = 80;
pinfo.lcdc.h_front_porch = 60;
pinfo.lcdc.h_pulse_width = 8;
pinfo.lcdc.v_back_porch = 7;
pinfo.lcdc.v_front_porch = 8;
pinfo.lcdc.v_pulse_width = 1;
#endif
pinfo.lcdc.border_clr = 0; /* blk */
pinfo.lcdc.underflow_clr = 0xff; /* blue */
pinfo.lcdc.hsync_skew = 0;
pinfo.bl_max = 0x7F;
pinfo.bl_min = 0;
pinfo.fb_num = 2;
pinfo.mipi.mode = DSI_VIDEO_MODE;
pinfo.mipi.pulse_mode_hsa_he = FALSE;
pinfo.mipi.hfp_power_stop = TRUE;
pinfo.mipi.hbp_power_stop = TRUE;
pinfo.mipi.hsa_power_stop = TRUE;
pinfo.mipi.eof_bllp_power_stop = TRUE;
pinfo.mipi.bllp_power_stop = TRUE;
pinfo.mipi.traffic_mode = DSI_NON_BURST_SYNCH_EVENT; //DSI_BURST_MODE;
pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
pinfo.mipi.vc = 0;
pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB;
pinfo.mipi.data_lane0 = TRUE;
pinfo.mipi.data_lane1 = TRUE;
pinfo.mipi.data_lane2 = FALSE;
pinfo.mipi.esc_byte_ratio = 4;
#if defined(DSI_BIT_CLK_470MHZ)
pinfo.mipi.t_clk_post = 0x22;
pinfo.mipi.t_clk_pre = 0x36;
/*As per HW engineer comment, Changing DSI Bit clock to 500MHz.*/
/*[email protected]*/
#ifdef CONFIG_MACH_MSM8960_L1m
pinfo.clk_rate = 500000000;
#else
pinfo.clk_rate = 483470000;
#endif
pinfo.mipi.frame_rate = 60;
#endif
pinfo.mipi.stream = 0; /* dma_p */
pinfo.mipi.mdp_trigger = 0;/* DSI_CMD_TRIGGER_SW; */
pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db;
ret = mipi_hitachi_device_register(&pinfo, MIPI_DSI_PRIM,
MIPI_DSI_PANEL_QHD_PT);
if (ret)
printk(KERN_ERR "%s: failed to register device!\n", __func__);
return ret;
}
static int __init mipi_video_hitachi_hd_pt_init(void)
{
int ret;
#ifdef CONFIG_FB_MSM_MIPI_PANEL_DETECT
if (msm_fb_detect_client("mipi_video_hitachi_hd"))
return 0;
#endif
pinfo.xres = 720;
pinfo.yres = 1280;
pinfo.type = MIPI_VIDEO_PANEL;
pinfo.pdest = DISPLAY_1;
pinfo.wait_cycle = 0;
pinfo.bpp = 24;
/* QCT Limitation :
* All proch values must be a multiple of 4. 2011.01.20 */
#if defined(DSI_BIT_CLK_470MHZ)
pinfo.lcdc.h_back_porch = 189;
pinfo.lcdc.h_front_porch = 100;
pinfo.lcdc.h_pulse_width = 4;
pinfo.lcdc.v_back_porch = 4;
pinfo.lcdc.v_front_porch = 4;
pinfo.lcdc.v_pulse_width = 1;
#elif defined(DSI_BIT_CLK_482MHZ)
pinfo.lcdc.h_back_porch = 192;
pinfo.lcdc.h_front_porch = 108;
pinfo.lcdc.h_pulse_width = 4;
pinfo.lcdc.v_back_porch = 4;
pinfo.lcdc.v_front_porch = 23;
pinfo.lcdc.v_pulse_width = 1;
#endif
pinfo.lcdc.border_clr = 0; /* blk */
pinfo.lcdc.underflow_clr = 0; /* black */
pinfo.lcdc.hsync_skew = 0;
pinfo.bl_max = 0xFF;
pinfo.bl_min = 0;
pinfo.fb_num = 2;
pinfo.mipi.mode = DSI_VIDEO_MODE;
pinfo.mipi.pulse_mode_hsa_he = FALSE;
pinfo.mipi.hfp_power_stop = FALSE;//TRUE;
pinfo.mipi.hbp_power_stop = FALSE;//TRUE;
pinfo.mipi.hsa_power_stop = FALSE;//TRUE;
pinfo.mipi.eof_bllp_power_stop = TRUE;
pinfo.mipi.bllp_power_stop = TRUE;
pinfo.mipi.traffic_mode = DSI_NON_BURST_SYNCH_PULSE;
pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
pinfo.mipi.vc = 0;
pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB;
pinfo.mipi.data_lane0 = TRUE;
pinfo.mipi.data_lane1 = TRUE;
pinfo.mipi.data_lane2 = TRUE;
pinfo.mipi.data_lane3 = TRUE;
#if defined(DSI_BIT_CLK_470MHZ)
pinfo.mipi.t_clk_post = 0x22;
pinfo.mipi.t_clk_pre = 0x36;
pinfo.clk_rate = 470000000;
pinfo.mipi.frame_rate = 60;
#elif defined(DSI_BIT_CLK_482MHZ)
pinfo.mipi.t_clk_post = 0x22;
pinfo.mipi.t_clk_pre = 0x36;
pinfo.clk_rate = 482180000;
pinfo.mipi.frame_rate = 60;
#endif
pinfo.mipi.esc_byte_ratio = 5; /* if bllp_power_stop is true, esc_clk enabling is needed. */
pinfo.mipi.stream = 0; /* dma_p */
pinfo.mipi.mdp_trigger = 0;/* DSI_CMD_TRIGGER_SW; */
pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db;
ret = mipi_hitachi_device_register(&pinfo, MIPI_DSI_PRIM,
MIPI_DSI_PANEL_720P_PT);
if (ret)
printk(KERN_ERR "%s: failed to register device!\n", __func__);
return ret;
}
