int mipid_hx8369_lcd_setup(struct mipi_dsi_info *mipi_dsi)
{
u32 buf[DSI_CMD_BUF_MAXSIZE];
int err;
dev_dbg(&mipi_dsi->pdev->dev, "MIPI DSI LCD setup.\n");
buf[0] = HX8369_CMD_SETEXTC | (HX8369_CMD_SETEXTC_PARAM_1 << 8);
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
buf, HX8369_CMD_SETEXTC_LEN);
CHECK_RETCODE(err);
buf[0] = MIPI_DSI_MAX_RET_PACK_SIZE;
err = mipi_dsi_pkt_write(mipi_dsi,
MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE,
buf, 0);
CHECK_RETCODE(err);
buf[0] = HX8369_CMD_GETHXID;
err = mipi_dsi_pkt_read(mipi_dsi,
MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM,
buf, HX8369_CMD_GETHXID_LEN);
if (!err && ((buf[0] & HX8369_ID_MASK) == HX8369_ID)) {
dev_info(&mipi_dsi->pdev->dev,
"MIPI DSI LCD ID:0x%x.\n", buf[0]);
} else {
dev_err(&mipi_dsi->pdev->dev,
"mipi_dsi_pkt_read err:%d, data:0x%x.\n",
err, buf[0]);
dev_info(&mipi_dsi->pdev->dev,
"MIPI DSI LCD not detected!\n");
return err;
}
/* set LCD resolution as 480RGBx800, DPI interface,
* display operation mode: RGB data bypass GRAM mode.
*/
buf[0] = HX8369_CMD_SETDISP | (HX8369_CMD_SETDISP_1_HALT << 8) |
(HX8369_CMD_SETDISP_2_RES_MODE << 16) |
(HX8369_CMD_SETDISP_3_BP << 24);
buf[1] = HX8369_CMD_SETDISP_4_FP | (HX8369_CMD_SETDISP_5_SAP << 8) |
(HX8369_CMD_SETDISP_6_GENON << 16) |
(HX8369_CMD_SETDISP_7_GENOFF << 24);
buf[2] = HX8369_CMD_SETDISP_8_RTN | (HX8369_CMD_SETDISP_9_TEI << 8) |
(HX8369_CMD_SETDISP_10_TEP_UP << 16) |
(HX8369_CMD_SETDISP_11_TEP_LOW << 24);
buf[3] = HX8369_CMD_SETDISP_12_BP_PE |
(HX8369_CMD_SETDISP_13_FP_PE << 8) |
(HX8369_CMD_SETDISP_14_RTN_PE << 16) |
(HX8369_CMD_SETDISP_15_GON << 24);
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
buf, HX8369_CMD_SETDISP_LEN);
CHECK_RETCODE(err);
/* Set display waveform cycle */
buf[0] = HX8369_CMD_SETCYC | (HX8369_CMD_SETCYC_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETCYC_PARAM_2;
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
buf, HX8369_CMD_SETCYC_LEN);
CHECK_RETCODE(err);
/* Set GIP timing output control */
buf[0] = HX8369_CMD_SETGIP | (HX8369_CMD_SETGIP_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETGIP_PARAM_2;
buf[2] = HX8369_CMD_SETGIP_PARAM_3;
buf[3] = HX8369_CMD_SETGIP_PARAM_4;
buf[4] = HX8369_CMD_SETGIP_PARAM_5;
buf[5] = HX8369_CMD_SETGIP_PARAM_6;
buf[6] = HX8369_CMD_SETGIP_PARAM_7;
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
HX8369_CMD_SETGIP_LEN);
CHECK_RETCODE(err);
/* Set power: standby, DC etc. */
buf[0] = HX8369_CMD_SETPOWER | (HX8369_CMD_SETPOWER_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETPOWER_PARAM_2;
buf[2] = HX8369_CMD_SETPOWER_PARAM_3;
buf[3] = HX8369_CMD_SETPOWER_PARAM_4;
buf[4] = HX8369_CMD_SETPOWER_PARAM_5;
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
HX8369_CMD_SETPOWER_LEN);
CHECK_RETCODE(err);
/* Set VCOM voltage. */
buf[0] = HX8369_CMD_SETVCOM | (HX8369_CMD_SETVCOM_PARAM_1 << 8);
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
HX8369_CMD_SETVCOM_LEN);
CHECK_RETCODE(err);
/* Set Panel: BGR/RGB or Inversion. */
buf[0] = HX8369_CMD_SETPANEL | (HX8369_CMD_SETPANEL_PARAM_1 << 8);
err = mipi_dsi_pkt_write(mipi_dsi,
MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM, buf, 0);
CHECK_RETCODE(err);
/* Set gamma curve related setting */
buf[0] = HX8369_CMD_SETGAMMA | (HX8369_CMD_SETGAMMA_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETGAMMA_PARAM_2;
buf[2] = HX8369_CMD_SETGAMMA_PARAM_3;
buf[3] = HX8369_CMD_SETGAMMA_PARAM_4;
buf[4] = HX8369_CMD_SETGAMMA_PARAM_5;
buf[5] = HX8369_CMD_SETGAMMA_PARAM_6;
buf[7] = HX8369_CMD_SETGAMMA_PARAM_7;
buf[7] = HX8369_CMD_SETGAMMA_PARAM_8;
buf[8] = HX8369_CMD_SETGAMMA_PARAM_9;
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
HX8369_CMD_SETGAMMA_LEN);
CHECK_RETCODE(err);
/* Set MIPI: DPHYCMD & DSICMD, data lane number */
buf[0] = HX8369_CMD_SETMIPI | (HX8369_CMD_SETMIPI_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETMIPI_PARAM_2;
buf[2] = HX8369_CMD_SETMIPI_PARAM_3;
if (lcd_config.data_lane_num == HX8369_ONE_DATA_LANE)
buf[2] |= HX8369_CMD_SETMIPI_ONELANE;
else
buf[2] |= HX8369_CMD_SETMIPI_TWOLANE;
buf[3] = HX8369_CMD_SETMIPI_PARAM_4;
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
HX8369_CMD_SETMIPI_LEN);
CHECK_RETCODE(err);
/* Set pixel format:24bpp */
buf[0] = HX8369_CMD_SETPIXEL_FMT;
switch (lcd_config.dpi_fmt) {
case MIPI_RGB565_PACKED:
case MIPI_RGB565_LOOSELY:
case MIPI_RGB565_CONFIG3:
buf[0] |= (HX8369_CMD_SETPIXEL_FMT_16BPP << 8);
break;
case MIPI_RGB666_LOOSELY:
case MIPI_RGB666_PACKED:
buf[0] |= (HX8369_CMD_SETPIXEL_FMT_18BPP << 8);
break;
case MIPI_RGB888:
buf[0] |= (HX8369_CMD_SETPIXEL_FMT_24BPP << 8);
break;
default:
buf[0] |= (HX8369_CMD_SETPIXEL_FMT_24BPP << 8);
break;
}
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
buf, 0);
CHECK_RETCODE(err);
/* Set column address: 0~479 */
buf[0] = HX8369_CMD_SETCLUMN_ADDR |
(HX8369_CMD_SETCLUMN_ADDR_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETCLUMN_ADDR_PARAM_2;
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
buf, HX8369_CMD_SETCLUMN_ADDR_LEN);
CHECK_RETCODE(err);
/* Set page address: 0~799 */
buf[0] = HX8369_CMD_SETPAGE_ADDR |
(HX8369_CMD_SETPAGE_ADDR_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETPAGE_ADDR_PARAM_2;
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
buf, HX8369_CMD_SETPAGE_ADDR_LEN);
CHECK_RETCODE(err);
/* Set display brightness related */
buf[0] = HX8369_CMD_WRT_DISP_BRIGHT |
(HX8369_CMD_WRT_DISP_BRIGHT_PARAM_1 << 8);
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
buf, 0);
CHECK_RETCODE(err);
buf[0] = HX8369_CMD_WRT_CABC_CTRL |
(HX8369_CMD_WRT_CABC_CTRL_PARAM_1 << 8);
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
buf, 0);
CHECK_RETCODE(err);
buf[0] = HX8369_CMD_WRT_CTRL_DISP |
(HX8369_CMD_WRT_CTRL_DISP_PARAM_1 << 8);
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
buf, 0);
CHECK_RETCODE(err);
/* exit sleep mode and set display on */
buf[0] = MIPI_DCS_EXIT_SLEEP_MODE;
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM,
buf, 0);
CHECK_RETCODE(err);
/* To allow time for the supply voltages
* and clock circuits to stabilize.
*/
msleep(5);
buf[0] = MIPI_DCS_SET_DISPLAY_ON;
err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM,
buf, 0);
CHECK_RETCODE(err);
err = mipid_init_backlight(mipi_dsi);
return err;
}
int mipid_hx8369_lcd_setup(struct mipi_dsi_info *mipi_dsi)
{
u32 buf[DSI_CMD_BUF_MAXSIZE];
int err;
buf[0] = HX8369_CMD_SETEXTC | (HX8369_CMD_SETEXTC_PARAM_1 << 8);
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
buf, HX8369_CMD_SETEXTC_LEN);
/* set LCD resolution as 480RGBx800, DPI interface,
* display operation mode: RGB data bypass GRAM mode.
*/
buf[0] = HX8369_CMD_SETDISP | (HX8369_CMD_SETDISP_1_HALT << 8) |
(HX8369_CMD_SETDISP_2_RES_MODE << 16) |
(HX8369_CMD_SETDISP_3_BP << 24);
buf[1] = HX8369_CMD_SETDISP_4_FP | (HX8369_CMD_SETDISP_5_SAP << 8) |
(HX8369_CMD_SETDISP_6_GENON << 16) |
(HX8369_CMD_SETDISP_7_GENOFF << 24);
buf[2] = HX8369_CMD_SETDISP_8_RTN | (HX8369_CMD_SETDISP_9_TEI << 8) |
(HX8369_CMD_SETDISP_10_TEP_UP << 16) |
(HX8369_CMD_SETDISP_11_TEP_LOW << 24);
buf[3] = HX8369_CMD_SETDISP_12_BP_PE |
(HX8369_CMD_SETDISP_13_FP_PE << 8) |
(HX8369_CMD_SETDISP_14_RTN_PE << 16) |
(HX8369_CMD_SETDISP_15_GON << 24);
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
buf, HX8369_CMD_SETDISP_LEN);
/* Set display waveform cycle */
buf[0] = HX8369_CMD_SETCYC | (HX8369_CMD_SETCYC_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETCYC_PARAM_2;
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
buf, HX8369_CMD_SETCYC_LEN);
/* Set GIP timing output control */
buf[0] = HX8369_CMD_SETGIP | (HX8369_CMD_SETGIP_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETGIP_PARAM_2;
buf[2] = HX8369_CMD_SETGIP_PARAM_3;
buf[3] = HX8369_CMD_SETGIP_PARAM_4;
buf[4] = HX8369_CMD_SETGIP_PARAM_5;
buf[5] = HX8369_CMD_SETGIP_PARAM_6;
buf[6] = HX8369_CMD_SETGIP_PARAM_7;
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
HX8369_CMD_SETGIP_LEN);
/* Set power: standby, DC etc. */
buf[0] = HX8369_CMD_SETPOWER | (HX8369_CMD_SETPOWER_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETPOWER_PARAM_2;
buf[2] = HX8369_CMD_SETPOWER_PARAM_3;
buf[3] = HX8369_CMD_SETPOWER_PARAM_4;
buf[4] = HX8369_CMD_SETPOWER_PARAM_5;
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
HX8369_CMD_SETPOWER_LEN);
/* Set VCOM voltage. */
buf[0] = HX8369_CMD_SETVCOM | (HX8369_CMD_SETVCOM_PARAM_1 << 8);
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
HX8369_CMD_SETVCOM_LEN);
/* Set Panel: BGR/RGB or Inversion. */
buf[0] = HX8369_CMD_SETPANEL | (HX8369_CMD_SETPANEL_PARAM_1 << 8);
mipi_dsi_pkt_write(mipi_dsi,
MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM, buf, 0);
/* Set gamma curve related setting */
buf[0] = HX8369_CMD_SETGAMMA | (HX8369_CMD_SETGAMMA_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETGAMMA_PARAM_2;
buf[2] = HX8369_CMD_SETGAMMA_PARAM_3;
buf[3] = HX8369_CMD_SETGAMMA_PARAM_4;
buf[4] = HX8369_CMD_SETGAMMA_PARAM_5;
buf[5] = HX8369_CMD_SETGAMMA_PARAM_6;
buf[7] = HX8369_CMD_SETGAMMA_PARAM_7;
buf[7] = HX8369_CMD_SETGAMMA_PARAM_8;
buf[8] = HX8369_CMD_SETGAMMA_PARAM_9;
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
HX8369_CMD_SETGAMMA_LEN);
/* Set MIPI: DPHYCMD & DSICMD, data lane number */
buf[0] = HX8369_CMD_SETMIPI | (HX8369_CMD_SETMIPI_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETMIPI_PARAM_2;
buf[2] = HX8369_CMD_SETMIPI_PARAM_3;
if (lcd_config.data_lane_num == HX8369_ONE_DATA_LANE)
buf[2] |= HX8369_CMD_SETMIPI_ONELANE;
else
buf[2] |= HX8369_CMD_SETMIPI_TWOLANE;
buf[3] = HX8369_CMD_SETMIPI_PARAM_4;
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
HX8369_CMD_SETMIPI_LEN);
/* Set pixel format:24bpp */
buf[0] = HX8369_CMD_SETPIXEL_FMT;
switch (lcd_config.dpi_fmt) {
case MIPI_RGB565_PACKED:
case MIPI_RGB565_LOOSELY:
case MIPI_RGB565_CONFIG3:
buf[0] |= (HX8369_CMD_SETPIXEL_FMT_16BPP << 8);
break;
case MIPI_RGB666_LOOSELY:
case MIPI_RGB666_PACKED:
buf[0] |= (HX8369_CMD_SETPIXEL_FMT_18BPP << 8);
break;
case MIPI_RGB888:
buf[0] |= (HX8369_CMD_SETPIXEL_FMT_24BPP << 8);
break;
default:
buf[0] |= (HX8369_CMD_SETPIXEL_FMT_24BPP << 8);
break;
}
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
buf, 0);
/* Set column address: 0~479 */
buf[0] = HX8369_CMD_SETCLUMN_ADDR |
(HX8369_CMD_SETCLUMN_ADDR_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETCLUMN_ADDR_PARAM_2;
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
buf, HX8369_CMD_SETCLUMN_ADDR_LEN);
/* Set page address: 0~799 */
buf[0] = HX8369_CMD_SETPAGE_ADDR |
(HX8369_CMD_SETPAGE_ADDR_PARAM_1 << 8);
buf[1] = HX8369_CMD_SETPAGE_ADDR_PARAM_2;
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
buf, HX8369_CMD_SETPAGE_ADDR_LEN);
/* Set display brightness related */
buf[0] = HX8369_CMD_WRT_DISP_BRIGHT |
(HX8369_CMD_WRT_DISP_BRIGHT_PARAM_1 << 8);
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
buf, 0);
buf[0] = HX8369_CMD_WRT_CABC_CTRL |
(HX8369_CMD_WRT_CABC_CTRL_PARAM_1 << 8);
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
buf, 0);
buf[0] = HX8369_CMD_WRT_CTRL_DISP |
(HX8369_CMD_WRT_CTRL_DISP_PARAM_1 << 8);
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
buf, 0);
/* exit sleep mode and set display on */
buf[0] = MIPI_DCS_EXIT_SLEEP_MODE;
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM,
buf, 0);
buf[0] = MIPI_DCS_SET_DISPLAY_ON;
mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM,
buf, 0);
err = mipid_init_backlight(mipi_dsi);
return err;
}