int mmc_test(int argc, char *argv[])
{
int i, j;
int result = -1;
struct mmc_test_config cfg;
#ifdef MMC_ICE_DOWNLOAD
mmc_readback_part(0, PART_UBOOT, 0);
mmc_erase_part(0, PART_UBOOT, 0);
mmc_readback_part(0, PART_UBOOT, 0);
mmc_download_part(0, PART_UBOOT, 0);
mmc_readback_part(0, PART_UBOOT, 0);
while(1);
#endif
#ifdef MMC_BOOT_TEST
printf("[EMMC] Boot up with power reset (MMCv4.3 above)\n");
mmc_boot_up(0, EMMC_BOOT_PWR_RESET);
mdelay(100);
for (i = 0; i < 20; i++) {
printf("[EMMC] Boot up with RST_n reset (MMCv4.41 above)\n");
mmc_boot_up(0, EMMC_BOOT_RST_N_SIG);
mdelay(100);
}
printf("[EMMC] Boot up with PRE_IDLE_CMD reset (MMCv4.41 above)\n");
mmc_boot_up(0, EMMC_BOOT_PRE_IDLE_CMD);
#endif
//mmc_boot_enable(0, EXT_CSD_PART_CFG_EN_NO_BOOT);
//mmc_boot_enable(0, EXT_CSD_PART_CFG_EN_BOOT_PART_1);
memset(&cfg, 0, sizeof(struct mmc_test_config));
cfg.id = 0;
cfg.desc = "Memory Card Read/Write Test";
cfg.count = MMC_TST_COUNTS;
cfg.blksz = MMC_BLOCK_SIZE;
cfg.blknr = MMC_TST_BLK_NR(0);
cfg.total_size = MMC_TST_SIZE;
cfg.chunk_blks = MMC_TST_CHUNK_BLKS;
cfg.buf = (char*)MMC_TST_BUF_ADDR;
cfg.chk_result = MMC_TST_CHK_RESULT;
cfg.tst_single = MMC_TST_SBLK_RW;
cfg.tst_multiple = MMC_TST_MBLK_RW;
cfg.tst_interleave = MMC_TST_IMBLK_RW;
for (i = 0; i < ARRAY_SIZE(clkfreq); i++) {
for (j = 0; j < ARRAY_SIZE(buswidth); j++) {
cfg.clock = clkfreq[i];
cfg.buswidth = buswidth[j];
if (mmc_test_mem_card(&cfg) != 0)
goto exit;
}
}
result = 0;
//mmc_readback_blks(0, MMC_TST_BLK_NR(0) * MMC_BLOCK_SIZE, 16, 0);
exit:
while(1);
return result;
}
int mmc_test(int argc, char *argv[])
{
int i, j;
int result = -1;
struct mmc_test_config cfg;
#ifdef MMC_ICE_DOWNLOAD
mmc_readback_part(0, PART_UBOOT, 0);
mmc_erase_part(0, PART_UBOOT, 0);
mmc_readback_part(0, PART_UBOOT, 0);
mmc_download_part(0, PART_UBOOT, 0);
mmc_readback_part(0, PART_UBOOT, 0);
while(1);
#endif
#ifdef MMC_BOOT_TEST
{
//u32 freq[] = {26000000, 13000000, 6500000};
u32 freq[] = {13000000, 6500000};
u8 report[ARRAY_SIZE(freq)][3][2];
memset(report, 0, ARRAY_SIZE(freq) * 3 * 2);
for (i = 0; i < ARRAY_SIZE(freq); i++) {
printf("\n[EMMC] Boot up with power reset (MMCv4.3 above). Freq: %dkHz\n", freq[i]/1000);
report[i][0][0] = mmc_boot_up_test(0, EMMC_BOOT_PWR_RESET, freq[i], 0);
mdelay(100);
report[i][0][1] = mmc_boot_up_test(0, EMMC_BOOT_PWR_RESET, freq[i], 1);
mdelay(100);
printf("\n[EMMC] Boot up with RST_n reset (MMCv4.41 above). Freq: %dkHz\n", freq[i]/1000);
report[i][1][0] = mmc_boot_up_test(0, EMMC_BOOT_RST_N_SIG, freq[i], 0);
mdelay(100);
report[i][1][1] = mmc_boot_up_test(0, EMMC_BOOT_RST_N_SIG, freq[i], 1);
mdelay(100);
printf("\n[EMMC] Boot up with PRE_IDLE_CMD reset (MMCv4.41 above). Freq: %dkHz\n", freq[i]/1000);
report[i][2][0] = mmc_boot_up_test(0, EMMC_BOOT_PRE_IDLE_CMD, freq[i], 0);
mdelay(100);
report[i][2][1] = mmc_boot_up_test(0, EMMC_BOOT_PRE_IDLE_CMD, freq[i], 1);
mdelay(100);
}
printf("\n[EMMC] Boot up test report:\n");
printf("(1: Power Cycle, 2: RST_n 3: PRE_IDLE_CMD, A: in non-idle state, B: in idle state)\n");
for (i = 0; i < ARRAY_SIZE(freq); i++) {
printf("1A: %s(%d), 2A: %s(%d), 3A: %s(%d) [freq: %dkHz]\n",
report[i][0][0] == MMC_ERR_NONE ? "PASS" : "FAIL", report[i][0][0],
report[i][1][0] == MMC_ERR_NONE ? "PASS" : "FAIL", report[i][1][0],
report[i][2][0] == MMC_ERR_NONE ? "PASS" : "FAIL", report[i][2][0],
freq[i]/1000);
printf("1B: %s(%d), 2B: %s(%d), 3B: %s(%d) [freq: %dkHz]\n",
report[i][0][1] == MMC_ERR_NONE ? "PASS" : "FAIL", report[i][0][1],
report[i][1][1] == MMC_ERR_NONE ? "PASS" : "FAIL", report[i][1][1],
report[i][2][1] == MMC_ERR_NONE ? "PASS" : "FAIL", report[i][2][1],
freq[i]/1000);
}
while(1);
}
#endif
//mmc_boot_enable(0, EXT_CSD_PART_CFG_EN_NO_BOOT);
//mmc_boot_enable(0, EXT_CSD_PART_CFG_EN_BOOT_PART_1);
memset(&cfg, 0, sizeof(struct mmc_test_config));
cfg.id = 0;
cfg.desc = "Memory Card Read/Write Test";
cfg.count = MMC_TST_COUNTS;
cfg.blksz = MMC_BLOCK_SIZE;
cfg.blknr = MMC_TST_BLK_NR(0);
cfg.total_size = MMC_TST_SIZE;
cfg.chunk_blks = MMC_TST_CHUNK_BLKS;
cfg.buf = (char*)MMC_TST_BUF_ADDR;
cfg.chk_result = MMC_TST_CHK_RESULT;
cfg.tst_single = MMC_TST_SBLK_RW;
cfg.tst_multiple = MMC_TST_MBLK_RW;
cfg.tst_interleave = MMC_TST_IMBLK_RW;
for (i = 0; i < ARRAY_SIZE(clkfreq); i++) {
for (j = 0; j < ARRAY_SIZE(buswidth); j++) {
cfg.clock = clkfreq[i];
cfg.buswidth = buswidth[j];
if (mmc_test_mem_card(&cfg) != 0)
goto exit;
}
}
result = 0;
//mmc_readback_blks(0, MMC_TST_BLK_NR(0) * MMC_BLOCK_SIZE, 16, 0);
exit:
return result;
}
