static int msm_sata_vreg_init(struct device *dev)
{
	int ret = 0;
	struct msm_sata_hba *hba = dev_get_drvdata(dev);

	ret = msm_sata_vreg_get_enable_set_vdd(dev, "sata_ext_3p3v",
				&hba->clk_pwr, 3300000, 3300000, 850000);
	if (ret)
		goto out;

	
	msm_sata_delay_us(1000);

	
	if (readl_relaxed(hba->ahci_base +
				AHCI_HOST_CAP) & AHCI_HOST_CAP_PMP) {
		
		ret = msm_sata_vreg_get_enable_set_vdd(dev, "sata_pmp_pwr",
				&hba->pmp_pwr, 1800000, 1800000, 200000);
		if (ret) {
			msm_sata_vreg_put_disable(dev, hba->clk_pwr,
					"sata_ext_3p3v", 3300000);
			goto out;
		}

		
		msm_sata_delay_us(1000);
	}

out:
	return ret;
}
示例#2
0
static int msm_sata_vreg_init(struct device *dev)
{
	int ret = 0;
	struct msm_sata_hba *hba = dev_get_drvdata(dev);

	if (hba->pdata && hba->pdata->xo_vote) {
		ret = msm_xo_mode_vote(hba->xo_sata_clk, MSM_XO_MODE_ON);
		if (ret < 0) {
			dev_err(dev, "%s: Failed to vote for XO ON (%d)\n",
					__func__, ret);
			goto out;
		}
	}

	/*
	 * The SATA clock generator needs 3.3V supply and can consume
	 * max. 850mA during functional mode.
	 */
	ret = msm_sata_vreg_get_enable_set_vdd(dev, "sata_ext_3p3v",
				&hba->clk_pwr, 3300000, 3300000, 850000);
	if (ret)
		goto out_disable_xo;

	/* Add 1ms regulator ramp-up delay */
	msm_sata_delay_us(1000);

	/* Read AHCI capability register to check if PMP is supported.*/
	if (readl_relaxed(hba->ahci_base +
				AHCI_HOST_CAP) & AHCI_HOST_CAP_PMP) {
		/* Power up port-multiplier */
		ret = msm_sata_vreg_get_enable_set_vdd(dev, "sata_pmp_pwr",
				&hba->pmp_pwr, 1800000, 1800000, 200000);
		if (ret)
			goto out_disable_3p3v;

		/* Add 1ms regulator ramp-up delay */
		msm_sata_delay_us(1000);
	}

	goto out;

out_disable_3p3v:
	msm_sata_vreg_put_disable(dev, hba->clk_pwr,
			"sata_ext_3p3v", 3300000);
out_disable_xo:
	if (hba->pdata && hba->pdata->xo_vote)
		msm_xo_mode_vote(hba->xo_sata_clk, MSM_XO_MODE_OFF);
out:
	return ret;
}
示例#3
0
static int msm_sata_vreg_init(struct device *dev)
{
	int ret = 0;
	struct msm_sata_hba *hba = dev_get_drvdata(dev);

	/*
	 * The SATA clock generator needs 3.3V supply and can consume
	 * max. 850mA during functional mode.
	 */
	ret = msm_sata_vreg_get_enable_set_vdd(dev, "sata_ext_3p3v",
				&hba->clk_pwr, 3300000, 3300000, 850000);
	if (ret)
		goto out;

	/* Add 1ms regulator ramp-up delay */
	msm_sata_delay_us(1000);

	/* Read AHCI capability register to check if PMP is supported.*/
	if (readl_relaxed(hba->ahci_base +
				AHCI_HOST_CAP) & AHCI_HOST_CAP_PMP) {
		/* Power up port-multiplier */
		ret = msm_sata_vreg_get_enable_set_vdd(dev, "sata_pmp_pwr",
				&hba->pmp_pwr, 1800000, 1800000, 200000);
		if (ret) {
			msm_sata_vreg_put_disable(dev, hba->clk_pwr,
					"sata_ext_3p3v", 3300000);
			goto out;
		}

		/* Add 1ms regulator ramp-up delay */
		msm_sata_delay_us(1000);
	}

out:
	return ret;
}