示例#1
0
int board_init (void)
{
	DECLARE_GLOBAL_DATA_PTR;

#ifdef	CONFIG_FLASH_CFI_DRIVER
	int portwidth;
	MV_U32 devParam;
#endif
#if defined(MV_INCLUDE_TWSI)
	MV_TWSI_ADDR slave;
#endif
	MV_GPP_HAL_DATA gppHalData;

	unsigned int i;

	maskAllInt();

	/* must initialize the int in order for udelay to work */
	//alior interrupt_init();
	timer_init();

	/* Init the Board environment module (device bank params init) */
	mvBoardEnvInit();

#if defined(MV_INCLUDE_TWSI)
	slave.type = ADDR7_BIT;
	slave.address = 0;
	mvTwsiInit(0, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_TCLK, &slave, 0);
#endif

	/* Init the Controlloer environment module (MPP init) */
	mvCtrlEnvInit();

	mvBoardDebugLed(3);

	/* Init the Controller CPU interface */
	mvCpuIfInit(mvCpuAddrWinMap);

	/* Init the GPIO sub-system */
	gppHalData.ctrlRev = mvCtrlRevGet();
	mvGppInit(&gppHalData);

	/* arch number of Integrator Board */
	gd->bd->bi_arch_number = 529; //KW2 arch number

	/* adress of boot parameters */
	gd->bd->bi_boot_params = 0x00000100;

	/* relocate the exception vectors */
	/* U-Boot is running from DRAM at this stage */
	for(i = 0; i < 0x100; i+=4)
	{
		*(unsigned int *)(0x0 + i) = *(unsigned int*)(TEXT_BASE + i);
	}

	mvBoardDebugLed(4);
	
	return 0;
}
int board_init(void)
{
	DECLARE_GLOBAL_DATA_PTR;

	if (whoAmI() != 0)
		return 0;

#if defined(MV_INCLUDE_TWSI)
	MV_TWSI_ADDR slave;
#endif

	unsigned int i;

	maskAllInt();
	/* Init the Board environment module (device bank params init) */
	mvBoardEnvInit();


#if defined(MV_INCLUDE_TWSI)
	slave.type = ADDR7_BIT;
	slave.address = 0;
	mvTwsiInit(0, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_TCLK, &slave, 0);
#endif

	/* Init the Controlloer environment module (MPP init) */
	mvCtrlEnvInit();

#if defined(CONFIG_DISPLAY_CPUINFO)
	late_print_cpuinfo();          /* display cpu info (and speed) */
#endif

	mvBoardDebugLed(2);

	mvCpuIfInit(mvCpuAddrWinMap);

#ifdef MV_NOR_BOOT
	env_init();
#endif

	/* Init the GPIO sub-system */
	MV_GPP_HAL_DATA gppHalData;
	gppHalData.ctrlRev = mvCtrlRevGet();
	mvGppInit(&gppHalData);

	gd->bd->bi_arch_number = 528;
	gd->bd->bi_boot_params = 0x00000100;

	/* relocate the exception vectors */
	/* U-Boot is running from DRAM at this stage */
	for (i = 0; i < 0x100; i += 4)
		*(unsigned int*)(0x0 + i) =
			*(unsigned int*)(CONFIG_SYS_TEXT_BASE + i);

	mvBoardDebugLed(4);
	return 0;
}
示例#3
0
static void __init mv_init(void)
{
        /* init the Board environment */
       	mvBoardEnvInit();

        /* init the controller environment */
        if (mvCtrlEnvInit() ) {
            printk( "Controller env initialization failed.\n" );
            return;
        }


	/* Init the CPU windows setting and the access protection windows. */
	if (mvCpuIfInit(mv_sys_map())) {

		printk( "Cpu Interface initialization failed.\n" );
		return;
	}
#if defined (CONFIG_MV78XX0_Z0)
	mvCpuIfBridgeReorderWAInit();
#endif

    	/* Init Tclk & SysClk */
    	mvTclk = mvBoardTclkGet();
   	mvSysclk = mvBoardSysClkGet();
	
        support_wait_for_interrupt = 1;
  
#ifdef CONFIG_JTAG_DEBUG
            support_wait_for_interrupt = 0; /*  for Lauterbach */
#endif
	mv_vfp_init();	
	elf_hwcap &= ~HWCAP_JAVA;

   	serial_initialize();

	/* At this point, the CPU windows are configured according to default definitions in mvSysHwConfig.h */
	/* and cpuAddrWinMap table in mvCpuIf.c. Now it's time to change defaults for each platform.         */
	mvCpuIfAddrDecShow(whoAmI());

    	print_board_info();
}
示例#4
0
/*****************************************************************************
 * UART
 ****************************************************************************/
static struct resource mv_uart_resources[] = {
	{
		.start		= PORT0_BASE,
		.end		= PORT0_BASE + 0xff,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start          = IRQ_UART0,
		.end            = IRQ_UART0,
		.flags          = IORESOURCE_IRQ,
	},
	{
		.start		= PORT1_BASE,
		.end		= PORT1_BASE + 0xff,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start          = IRQ_UART1,
		.end            = IRQ_UART1,
		.flags          = IORESOURCE_IRQ,
	},
};

static struct plat_serial8250_port mv_uart_data[] = {
	{
		.mapbase	= PORT0_BASE,
		.membase	= (char *)PORT0_BASE,
		.irq		= IRQ_UART0,
		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
	},
	{
		.mapbase	= PORT1_BASE,
		.membase	= (char *)PORT1_BASE,
		.irq		= IRQ_UART1,
		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
	},
	{ },
};

static struct platform_device mv_uart = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev			= {
		.platform_data	= mv_uart_data,
	},
	.num_resources		= ARRAY_SIZE(mv_uart_resources),
	.resource		= mv_uart_resources,
};


static void serial_initialize(void)
{
	mv_uart_data[0].uartclk = mv_uart_data[1].uartclk = mvTclk;
	platform_device_register(&mv_uart);
}

static void __init mv_vfp_init(void)
{

#if defined CONFIG_VFP_FASTVFP
        printk("VFP initialized to Run Fast Mode.\n");
#endif
}

#if defined(MV_88F6183)

#ifdef CONFIG_MV_INCLUDE_AUDIO

typedef struct {
	unsigned int base;
	unsigned int size;
} _audio_mem_info;

typedef struct {
	u32 spdif_rec;
	u32 spdif_play;
	u32 i2s_rec;
	u32 i2s_play;
	_audio_mem_info mem_array[MV_DRAM_MAX_CS + 1];
} _audio_info;

_audio_info audio_info = {1, 1, 1, 1};

 static struct resource mv_snd_resources[] = {
	[0] = {
		.start	= INTER_REGS_BASE + AUDIO_REG_BASE,
		.end	= INTER_REGS_BASE + AUDIO_REG_BASE + SZ_16K -1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_AUDIO_INT,
		.end	= IRQ_AUDIO_INT,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= NR_IRQS,	/* should obtained from board information*/
		.end	= NR_IRQS,	/* should obtained from board information */
		.flags	= IORESOURCE_IRQ,
	}
 };

static u64 mv_snd_dmamask = 0xFFFFFFFFUL;

static struct platform_device mv_snd_device = {
	.name	= "mv88fx_snd",
	.id	= -1,
	.dev	= {
		.dma_mask		= &mv_snd_dmamask,
		.coherent_dma_mask	= 0xFFFFFFFF,
		.platform_data		= &audio_info,
	},
	.num_resources	= ARRAY_SIZE(mv_snd_resources),
	.resource	= mv_snd_resources,
};

#endif /* #ifdef CONFIG_MV_INCLUDE_AUDIO */

#ifdef CONFIG_MV_INCLUDE_SDIO
static struct resource mvsdmmc_resources[] = {
	[0] = {
		.start	= INTER_REGS_BASE + 0x80000,
		.end	= INTER_REGS_BASE + 0x80000 + SZ_1K -1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= SDIO_IRQ_NUM,
		.end	= SDIO_IRQ_NUM,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= NR_IRQS,	/* should obtained from board information*/
		.end	= NR_IRQS,	/* should obtained from board information */
		.flags	= IORESOURCE_IRQ,
	}

};

static u64 mvsdmmc_dmamask = 0xffffffffUL;

static struct platform_device mvsdmmc_device = {
	.name		= "mvsdmmc",
	.id		= -1,
	.dev		= {
		.dma_mask = &mvsdmmc_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(mvsdmmc_resources),
	.resource	= mvsdmmc_resources,
};

#endif /* CONFIG_MV_INCLUDE_SDIO */

static struct platform_device *devices[] __initdata = {
#ifdef CONFIG_MV_INCLUDE_AUDIO
	&mv_snd_device,
#endif
#ifdef CONFIG_MV_INCLUDE_SDIO
 	&mvsdmmc_device,
#endif
 	NULL
};

#endif /* #if defined(MV_88F6183) */
static void __init mv_init(void)
{

	unsigned int temp;
        /* init the Board environment */
        if (mvBoardIdGet() != RD_88F6082_MICRO_DAS_NAS)  /* excluded for HDD power problem - to be fixed */
		mvBoardEnvInit();

        /* init the controller environment */
        if( mvCtrlEnvInit() ) {
            printk( "Controller env initialization failed.\n" );
            return;
        }

	if(mvBoardIdGet() == RD_88F5181_POS_NAS) {
		temp = MV_REG_READ(GPP_DATA_OUT_REG(0));
		temp &= ~(1 << 0x5);

		/* for host mode should be set to 0 */
		if(!mvIsUsbHost) {
			temp |= (1 << 0x5);
		}
        	MV_REG_WRITE(GPP_DATA_OUT_REG(0), temp);
	}

	/* Init the CPU windows setting and the access protection windows. */
	if( mvCpuIfInit(mv_sys_map()) ) {

		printk( "Cpu Interface initialization failed.\n" );
		return;
	}

    	/* Init Tclk & SysClk */
    	mvTclk = mvBoardTclkGet();
   	mvSysclk = mvBoardSysClkGet();

	printk("Sys Clk = %d, Tclk = %d\n",mvSysclk ,mvTclk  );
	

    	if ((mvCtrlModelGet() == MV_5281_DEV_ID) || (mvCtrlModelGet() == MV_1281_DEV_ID)
			|| (mvCtrlModelGet() == MV_6183_DEV_ID))
            mv_orion_ver = MV_ORION2; /* Orion II */
    	else
            mv_orion_ver = MV_ORION1; /* Orion I */

        /* Implement workaround for FEr# CPU-C16: Wait for interrupt command */ 
        /* is not processed properly, the workaround is not to use this command */
        /* the erratum is relevant for 5281 devices with revision less than C0 */
        if((mvCtrlModelGet() == MV_5281_DEV_ID)
         && (mvCtrlRevGet() < MV_5281_C0_REV))
        {
            support_wait_for_interrupt = 0;
        }

#ifdef CONFIG_JTAG_DEBUG
            support_wait_for_interrupt = 0; /*  for Lauterbach */
#endif
	mv_vfp_init();
	elf_hwcap &= ~HWCAP_JAVA;

   	serial_initialize();

	/* At this point, the CPU windows are configured according to default definitions in mvSysHwConfig.h */
	/* and cpuAddrWinMap table in mvCpuIf.c. Now it's time to change defaults for each platform.         */
	mvCpuIfAddDecShow();


#if defined(CONFIG_MTD_PHYSMAP)
	mv_mtd_initialize();
#endif
    	print_board_info();

#ifdef CONFIG_MV_INCLUDE_IDMA
    	mvDmaInit();
#endif

#if defined(MV_88F6183)

#ifdef 	CONFIG_MV_INCLUDE_SDIO
	mvsdmmc_resources[2].end = mvBoardSDIOGpioPinGet() + IRQ_GPP_START;
	mvsdmmc_resources[2].start = mvBoardSDIOGpioPinGet() + IRQ_GPP_START;
	irq_int_type[mvBoardSDIOGpioPinGet()] = GPP_IRQ_TYPE_CHANGE_LEVEL;
#endif /* CONFIG_MV_INCLUDE_SDIO */
	
#ifdef CONFIG_MV_INCLUDE_AUDIO
	for (temp=0 ; temp< MV_DRAM_MAX_CS; temp++) {
		MV_DRAM_DEC_WIN win;
		audio_info.mem_array[temp].base = 0;
		audio_info.mem_array[temp].size = 0;

		mvDramIfWinGet(SDRAM_CS0 + temp, &win);

		if (win.enable) {
			audio_info.mem_array[temp].base = win.addrWin.baseLow;
			audio_info.mem_array[temp].size = win.addrWin.size;
		}
	}
#endif /* CONFIG_MV_INCLUDE_AUDIO */
	if ((temp = ARRAY_SIZE(devices) - 1))
		platform_add_devices(devices, temp);

#endif /* MV_88F6183 */
    return;
}
int board_init (void)
{
	DECLARE_GLOBAL_DATA_PTR;
	int clock_divisor;
	unsigned int i;
	MV_GPP_HAL_DATA gppHalData;
	clock_divisor = (CONFIG_SYS_TCLK / 16)/115200;

	/* muti-core support, initiate each Uart to each cpu */
	mvUartInit(whoAmI(), clock_divisor, mvUartBase(whoAmI()));
	if (whoAmI() != 0)
		return 0;

#if defined(MV_INCLUDE_TWSI)
	MV_TWSI_ADDR slave;
#endif
	maskAllInt();

	/* must initialize the int in order for udelay to work */
	/* interrupt_init(); - no interrupt handling in u-boot */
	timer_init();

	/* Init the Board environment module (device bank params init) */
	mvBoardEnvInit();

#if defined(MV_INCLUDE_TWSI)
	slave.type = ADDR7_BIT;
	slave.address = 0;
	mvTwsiInit(0, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_TCLK, &slave, 0);
#endif

	/* Init the Controlloer environment module (MPP init) */
	mvCtrlEnvInit();

#if defined(CONFIG_DISPLAY_CPUINFO)
	late_print_cpuinfo();          /* display cpu info (and speed) */
#endif
	mvBoardDebugLed(2);

	/* Init the Controller CPU interface */
	mvCpuIfInit(mvCpuAddrWinMap);
#if defined(MV_NOR_BOOT)
	env_init();
#endif
	if (mvBoardCpssBoardIdSet(mvBoardIdGet()) != MV_OK)
		printf("%s: Error: Failed to set Board ID for CPSS!\n", __func__);

	/* Init the GPIO sub-system */
	gppHalData.ctrlRev = mvCtrlRevGet();
	mvGppInit(&gppHalData);

	/* arch number of Integrator Board */
	gd->bd->bi_arch_number=mv_get_arch_number();

	/* adress of boot parameters */
	gd->bd->bi_boot_params = 0x00000100;

	/* relocate the exception vectors */
	/* U-Boot is running from DRAM at this stage */
	for(i = 0; i < 0x100; i+=4) {
		*(unsigned int *)(0x0 + i) = *(unsigned int*)(CONFIG_SYS_TEXT_BASE + i);
	}
	mvBoardDebugLed(4);
	return 0;
}