int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int))
{
	struct mmc *mmc = NULL;
	struct mxsmmc_priv *priv = NULL;
	int ret;
	const unsigned int mxsmmc_clk_id = mxs_ssp_clock_by_bus(id);

	if (!mxs_ssp_bus_id_valid(id))
		return -ENODEV;

	priv = malloc(sizeof(struct mxsmmc_priv));
	if (!priv)
		return -ENOMEM;

	priv->desc = mxs_dma_desc_alloc();
	if (!priv->desc) {
		free(priv);
		return -ENOMEM;
	}

	ret = mxs_dma_init_channel(MXS_DMA_CHANNEL_AHB_APBH_SSP0 + id);
	if (ret)
		return ret;

	priv->mmc_is_wp = wp;
	priv->mmc_cd = cd;
	priv->id = id;
	priv->regs = mxs_ssp_regs_by_bus(id);

	priv->cfg.name = "MXS MMC";
	priv->cfg.ops = &mxsmmc_ops;

	priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34;

	priv->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT |
			 MMC_MODE_HS_52MHz | MMC_MODE_HS;

	/*
	 * SSPCLK = 480 * 18 / 29 / 1 = 297.731 MHz
	 * SSP bit rate = SSPCLK / (CLOCK_DIVIDE * (1 + CLOCK_RATE)),
	 * CLOCK_DIVIDE has to be an even value from 2 to 254, and
	 * CLOCK_RATE could be any integer from 0 to 255.
	 */
	priv->cfg.f_min = 400000;
	priv->cfg.f_max = mxc_get_clock(MXC_SSP0_CLK + mxsmmc_clk_id) * 1000 / 2;
	priv->cfg.b_max = 0x20;

	mmc = mmc_create(&priv->cfg, priv);
	if (mmc == NULL) {
		mxs_dma_desc_free(priv->desc);
		free(priv);
		return -ENOMEM;
	}
	return 0;
}
示例#2
0
文件: mxsmmc.c 项目: Jheengut/u-boot
int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int))
{
    struct mmc *mmc = NULL;
    struct mxsmmc_priv *priv = NULL;
    int ret;
    const unsigned int mxsmmc_clk_id = mxs_ssp_clock_by_bus(id);

    if (!mxs_ssp_bus_id_valid(id))
        return -ENODEV;

    mmc = malloc(sizeof(struct mmc));
    if (!mmc)
        return -ENOMEM;

    priv = malloc(sizeof(struct mxsmmc_priv));
    if (!priv) {
        free(mmc);
        return -ENOMEM;
    }

    priv->desc = mxs_dma_desc_alloc();
    if (!priv->desc) {
        free(priv);
        free(mmc);
        return -ENOMEM;
    }

    ret = mxs_dma_init_channel(MXS_DMA_CHANNEL_AHB_APBH_SSP0 + id);
    if (ret)
        return ret;

    priv->mmc_is_wp = wp;
    priv->mmc_cd = cd;
    priv->id = id;
    priv->regs = mxs_ssp_regs_by_bus(id);

    sprintf(mmc->name, "MXS MMC");
    mmc->send_cmd = mxsmmc_send_cmd;
    mmc->set_ios = mxsmmc_set_ios;
    mmc->init = mxsmmc_init;
    mmc->getcd = NULL;
    mmc->getwp = NULL;
    mmc->priv = priv;

    mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;

    mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT |
                     MMC_MODE_HS_52MHz | MMC_MODE_HS |
                     MMC_MODE_HC;

    /*
     * SSPCLK = 480 * 18 / 29 / 1 = 297.731 MHz
     * SSP bit rate = SSPCLK / (CLOCK_DIVIDE * (1 + CLOCK_RATE)),
     * CLOCK_DIVIDE has to be an even value from 2 to 254, and
     * CLOCK_RATE could be any integer from 0 to 255.
     */
    mmc->f_min = 400000;
    mmc->f_max = mxc_get_clock(MXC_SSP0_CLK + mxsmmc_clk_id) * 1000 / 2;
    mmc->b_max = 0x20;

    mmc_register(mmc);
    return 0;
}