static void
na_mii_reset(struct net_device *dev)
{
struct netarmeth_dev *na_dev;
NA_PRINTK("na_mii_reset\n");
if (dev == NULL) {
NA_PRINTK("na_mii_reset - NULL parameter\n");
return;
}
na_dev = dev->priv;
na_dev->phy_type = na_mii_identify_phy();
if ((na_dev->phy_type != NA_ENABLE_PHY) &&
(na_dev->phy_type != NA_HOME_PHY)) {
printk(KERN_WARNING "%s: Found other than Enable, Lucent or Home PHY.\n", dev->name);
}
/* select appropriate Control register */
if (na_dev->phy_type == NA_HOME_PHY)
outl_t(0x100, get_eth_reg_addr(NETARM_ETH_MII_ADDR));
else
outl_t(0x400, get_eth_reg_addr(NETARM_ETH_MII_ADDR));
outl_t(0x8000, get_eth_reg_addr(NETARM_ETH_MII_WRITE));
na_mii_poll_busy();
outl_t(0, get_eth_reg_addr(NETARM_ETH_MII_WRITE));
na_mii_poll_busy();
}
static int reset_eth (void)
{
int pt;
na_get_mac_addr ();
pt = na_mii_identify_phy ();
/* reset the phy */
na_mii_write (MII_PHY_CONTROL, 0x8000);
reset_timer_masked ();
while (get_timer_masked () < NA_MII_NEGOTIATE_DELAY) {
if ((na_mii_read (MII_PHY_STATUS) & 0x8000) == 0) {
break;
}
}
if (get_timer_masked () >= NA_MII_NEGOTIATE_DELAY)
printf ("phy reset timeout\n");
/* set the PCS reg */
SET_EADDR (NETARM_ETH_PCS_CFG, NETARM_ETH_PCSC_CLKS_25M |
NETARM_ETH_PCSC_ENJAB | NETARM_ETH_PCSC_NOCFR);
na_mii_negotiate ();
na_mii_check_speed ();
/* Delay 10 millisecond. (Maybe this should be 1 second.) */
udelay (10000);
/* Turn receive on.
Enable statistics register autozero on read.
Do not insert MAC address on transmit.
Do not enable special test modes. */
SET_EADDR (NETARM_ETH_STL_CFG,
(NETARM_ETH_STLC_AUTOZ | NETARM_ETH_STLC_RXEN));
/* Set the inter-packet gap delay to 0.96us for MII.
The NET+ARM H/W Reference Guide indicates that the Back-to-back IPG
Gap Timer Register should be set to 0x15 and the Non Back-to-back IPG
Gap Timer Register should be set to 0x00000C12 for the MII PHY. */
SET_EADDR (NETARM_ETH_B2B_IPG_GAP_TMR, 0x15);
SET_EADDR (NETARM_ETH_NB2B_IPG_GAP_TMR, 0x00000C12);
/* Add CRC to end of packets.
Pad packets to minimum length of 64 bytes.
Allow unlimited length transmit packets.
Receive all broadcast packets.
NOTE: Multicast addressing is NOT enabled here currently. */
SET_EADDR (NETARM_ETH_MAC_CFG,
(NETARM_ETH_MACC_CRCEN |
NETARM_ETH_MACC_PADEN | NETARM_ETH_MACC_HUGEN));
SET_EADDR (NETARM_ETH_SAL_FILTER, NETARM_ETH_SALF_BROAD);
/* enable fifos */
SET_EADDR (NETARM_ETH_GEN_CTRL,
(NETARM_ETH_GCR_ERX | NETARM_ETH_GCR_ETX));
return (0);
}