int adc_qmsi_init(struct device *dev)
{
qm_adc_config_t cfg;
struct adc_info *info = dev->driver_data;
dev->driver_api = &api_funcs;
/* Enable the ADC and set the clock divisor */
clk_periph_enable(CLK_PERIPH_CLK | CLK_PERIPH_ADC |
CLK_PERIPH_ADC_REGISTER);
/* ADC clock divider*/
clk_adc_set_div(CONFIG_ADC_QMSI_CLOCK_RATIO);
/* Set up config */
/* Clock cycles between the start of each sample */
cfg.window = CONFIG_ADC_QMSI_SERIAL_DELAY;
cfg.resolution = CONFIG_ADC_QMSI_SAMPLE_WIDTH;
qm_adc_set_config(QM_ADC_0, &cfg);
device_sync_call_init(&info->sync);
nano_sem_init(&info->sem);
nano_sem_give(&info->sem);
info->state = ADC_STATE_IDLE;
adc_config_irq();
return 0;
}
/**
* Signal g_TimerSem to wake-up timer_task.
*
*/
static void signal_timer_task(void)
{
#ifdef CONFIG_NANOKERNEL
nano_sem_give(&g_TimerSem);
#else
T_EXEC_LEVEL execLvl;
execLvl = _getExecLevel();
/* call the nanoK service that corresponds to the current execution level */
switch (execLvl) {
case E_EXEC_LVL_ISR:
isr_sem_give(g_TimerSem);
break;
case E_EXEC_LVL_FIBER:
fiber_sem_give(g_TimerSem);
break;
case E_EXEC_LVL_TASK:
task_sem_give(g_TimerSem);
break;
default: /* will not do that from unknown context */
panic(E_OS_ERR_NOT_SUPPORTED);
break;
}
#endif
}
int bmg160_init(struct device *dev)
{
struct bmg160_device_config *cfg = dev->config->config_info;
struct bmg160_device_data *bmg160 = dev->driver_data;
uint8_t chip_id = 0;
uint16_t range_dps;
bmg160->i2c = device_get_binding((char *)cfg->i2c_port);
if (!bmg160->i2c) {
SYS_LOG_DBG("I2C master controller not found!");
return -EINVAL;
}
nano_sem_init(&bmg160->sem);
nano_sem_give(&bmg160->sem);
if (bmg160_read_byte(dev, BMG160_REG_CHIPID, &chip_id) < 0) {
SYS_LOG_DBG("Failed to read chip id.");
return -EIO;
}
if (chip_id != BMG160_CHIP_ID) {
SYS_LOG_DBG("Unsupported chip detected (0x%x)!", chip_id);
return -ENODEV;
}
/* reset the chip */
bmg160_write_byte(dev, BMG160_REG_BGW_SOFTRESET, BMG160_RESET);
sys_thread_busy_wait(1000); /* wait for the chip to come up */
if (bmg160_write_byte(dev, BMG160_REG_RANGE,
BMG160_DEFAULT_RANGE) < 0) {
SYS_LOG_DBG("Failed to set range.");
return -EIO;
}
range_dps = bmg160_gyro_range_map[BMG160_DEFAULT_RANGE];
bmg160->scale = BMG160_RANGE_TO_SCALE(range_dps);
if (bmg160_write_byte(dev, BMG160_REG_BW, BMG160_DEFAULT_ODR) < 0) {
SYS_LOG_DBG("Failed to set sampling frequency.");
return -EIO;
}
/* disable interrupts */
if (bmg160_write_byte(dev, BMG160_REG_INT_EN0, 0) < 0) {
SYS_LOG_DBG("Failed to disable all interrupts.");
return -EIO;
}
#ifdef CONFIG_BMG160_TRIGGER
bmg160_trigger_init(dev);
#endif
dev->driver_api = &bmg160_api;
return 0;
}
static void l2cap_chan_rx_give_credits(struct bt_l2cap_le_chan *chan,
uint16_t credits)
{
BT_DBG("chan %p credits %u", chan, credits);
while (credits--) {
nano_sem_give(&chan->rx.credits);
}
}
static inline bool handle_ack_packet(struct net_buf *buf)
{
if (packetbuf_datalen(buf) == ACK_LEN) {
ack_received = true;
nano_sem_give(&ack_lock);
#ifdef SIMPLERDC_802154_AUTOACK
PRINTF("simplerdc: ignore ACK packet\n");
return true;
#endif
}
return false;
}
static void tmp007_gpio_callback(struct device *dev,
struct gpio_callback *cb, uint32_t pins)
{
struct tmp007_data *drv_data =
CONTAINER_OF(cb, struct tmp007_data, gpio_cb);
gpio_pin_disable_callback(dev, CONFIG_TMP007_GPIO_PIN_NUM);
#if defined(CONFIG_TMP007_TRIGGER_OWN_FIBER)
nano_sem_give(&drv_data->gpio_sem);
#elif defined(CONFIG_TMP007_TRIGGER_GLOBAL_FIBER)
nano_isr_fifo_put(sensor_get_work_fifo(), &drv_data->work);
#endif
}
int bmg160_update_byte(struct device *dev, uint8_t reg_addr, uint8_t mask,
uint8_t value)
{
struct bmg160_device_config *dev_cfg = dev->config->config_info;
struct bmg160_device_data *bmg160 = dev->driver_data;
int ret = 0;
bmg160_bus_config(dev);
nano_sem_take(&bmg160->sem, TICKS_UNLIMITED);
if (i2c_reg_update_byte(bmg160->i2c, dev_cfg->i2c_addr,
reg_addr, mask, value) < 0) {
ret = -EIO;
}
nano_sem_give(&bmg160->sem);
return ret;
}
static int bmg160_write(struct device *dev, uint8_t reg_addr, uint8_t *data,
uint8_t len)
{
struct bmg160_device_config *dev_cfg = dev->config->config_info;
struct bmg160_device_data *bmg160 = dev->driver_data;
int ret = 0;
bmg160_bus_config(dev);
nano_sem_take(&bmg160->sem, TICKS_UNLIMITED);
if (i2c_burst_write(bmg160->i2c, dev_cfg->i2c_addr,
reg_addr, data, len) < 0) {
ret = -EIO;
}
nano_sem_give(&bmg160->sem);
return ret;
}
int
sol_mainloop_impl_platform_init(void)
{
int i;
main_thread_id = sys_thread_self_get();
nano_sem_init(&_sol_mainloop_lock);
nano_sem_give(&_sol_mainloop_lock);
nano_fifo_init(&_sol_mainloop_pending_events);
nano_fifo_init(&_sol_mainloop_free_events);
for (i = 0; i < sol_util_array_size(_events); i++) {
struct me_fifo_entry *mfe;
mfe = &_events[i];
nano_fifo_put(&_sol_mainloop_free_events, mfe);
}
return 0;
}
static void adc_unlock(struct adc_info *data)
{
nano_sem_give(&data->sem);
data->state = ADC_STATE_IDLE;
}
void
sol_mainloop_impl_unlock(void)
{
nano_sem_give(&_sol_mainloop_lock);
}
