static unsigned long get_cpufreq(void) { if (vx86_CpuID() == CPU_VORTEX86SX) { unsigned long strapreg = nb_Read(0x60); return VX86_cpuCLK_SX[(int)(strapreg & 0x7L)]; } else if ((vx86_CpuID() == CPU_VORTEX86DX_A) || (vx86_CpuID() == CPU_VORTEX86DX_C) || (vx86_CpuID() == CPU_VORTEX86DX_UNKNOWN)) { unsigned long strapreg = nb_Read(0x60); if ((strapreg & 0x1fL) == 1L) return VX86_dramCLK_DX[(int)((strapreg >> 8) & 0x07L)]; return VX86_cpuCLK_DX_A[(int)(strapreg & 0x1fL)]; }
static int get_cpuid(void) { unsigned long id = nb_Read(0x90); switch (id) { case 0x31504D44L: //"DMP1" return CPU_VORTEX86SX; case 0x32504D44L: //"DMP2" { unsigned char nbrv = nb_Read8(0x08); unsigned char sbrv = sb_Read8(0x08); unsigned long ide = pci_In32(VX86_pciDev[VX86_IDE], 0x00); if ((nbrv == 1) && (sbrv == 1) && (ide == 0x101017f3L)) return CPU_VORTEX86DX_A; // Vortex86DX ver. A if ((nbrv == 1) && (sbrv == 2) && (ide != 0x101017f3L)) return CPU_VORTEX86DX_C; // Vortex86DX ver. C (PBA/PBB) if ((nbrv == 2) && (sbrv == 2) && (ide != 0x101017f3L)) return CPU_VORTEX86DX_D; // Vortex86DX ver. D return CPU_VORTEX86DX_UNKNOWN; } case 0x33504D44L: //"DMP3" return CPU_VORTEX86MX; case 0x35504D44L: //"DMP5" return CPU_VORTEX86MX_PLUS; case 0x34504D44L: //"DMP4" return CPU_VORTEX86DX2; case 0x36504D44L: return CPU_VORTEX86DX3; case 0x37504D44L: return CPU_VORTEX86EX; } return CPU_UNSUPPORTED; }