static void InitNatfeat(void) { long ver; nfOps = nf_init(); if (!nfOps) { err_init("__NF cookie not present on this system"); return; } nfOSMesaId=nfOps->get_id("OSMESA"); if (nfOSMesaId==0) { err_init("NF OSMesa functions not present on this system"); return; } ver = nfOps->call(nfOSMesaId+GET_VERSION, 0l, 0l); if (ver < ARANFOSMESA_NFAPI_VERSION) { if (err_old_nfapi()) { err_init("NF OSMesa functions in ARAnyM too old"); nfOSMesaId = 0; return; } } if (ver > ARANFOSMESA_NFAPI_VERSION) { /* * they should be backward compatible, but give a warning */ (void) Cconws("Warning: NF OSMesa functions in ARAnyM newer than library\r\n"); } }
void openwsn_init() { // drivers openserial_init(); // stack // cross-layer idmanager_init(); // call first since initializes e.g. EUI64 openqueue_init(); openrandom_init(); opentimers_init(); // 02a-TSCH ieee154e_init(); // 02b-RES schedule_init(); res_init(); neighbors_init(); nf_init(); //noise floor module // 03a-IPHC openbridge_init(); iphc_init(); // 03b-IPv6 forwarding_init(); icmpv6_init(); icmpv6echo_init(); icmpv6router_init(); icmpv6rpl_init(); // 04-TRAN opentcp_init(); openudp_init(); opencoap_init(); // initialize before any of the CoAP clients // 07-App //--CoAP //rwellknown_init(); //rreg_init(); //rinfo_init(); //rleds_init(); //rt_init(); //rex_init(); //rheli_init(); //rrube_init(); //rxl1_init(); //layerdebug_init(); //--UDP /*udpecho_init(); udpinject_init(); udpprint_init();*/ //udprand_init(); //udpstorm_init(); //--TCP /*ohlone_init(); tcpecho_init(); tcpinject_init(); tcpprint_init();*/ //--misc //heli_init(); //imu_init(); //bbk_init(); //hdl_init(); }
void sample(void * arg, ulong count) { info_t * info = (info_t *) arg; slong length = info->length, i, j; int monic = info->monic; int scale; scale = 1000; if (length >= 50) scale = 100; if (length >= 500) scale = 40; flint_rand_t state; flint_randinit(state); fmpq_poly_t pol; nf_t nf; nf_elem_t a; fmpq_t norm; fmpq_poly_init(pol); fmpq_init(norm); for (i = 0; i < count; i++) { random_fmpq_poly(pol, state, length); if (monic) { fmpz_one(fmpq_poly_denref(pol)); fmpq_poly_set_coeff_ui(pol, length - 1, 1); } nf_init(nf, pol); nf_elem_init(a, nf); random_nf_elem(a, state, nf); if (monic) fmpz_one(fmpq_poly_denref(NF_ELEM(a))); prof_start(); for (j = 0; j < scale; j++) { nf_elem_trace(norm, a, nf); } prof_stop(); } fmpq_clear(norm); nf_elem_clear(a, nf); nf_clear(nf); fmpq_poly_clear(pol); flint_randclear(state); }
int main() { long old_ff; if (!nf_init()) { wait_key(); return 1; } old_ff = nf_fastforward(1); nf_print("Emulator name:\n"); nf_showname(); nf_print("Shutting down...\n"); nf_fastforward(old_ff); nf_exit(0); wait_key(); return 0; }
// main function int main(void) { bool valid_block_found[NF_N_DEVICES]; U32 u32_nf_ids, i_dev, i_block; U8 maker_id, device_id; U32 i, j; // ECCHRS options. static const ecchrs_options_t ECCHRS_OPTIONS = { .typecorrect = ECCHRS_TYPECORRECT_4_BIT, .pagesize = ECCHRS_PAGESIZE_4_BIT_2112_W }; // switch to oscillator 0 pcl_switch_to_osc(PCL_OSC0, FOSC0, OSC0_STARTUP); // init debug serial interface init_dbg_rs232(FOSC0); nf_init(FOSC0); // init the nand flash driver with the correct HSB frequency nf_unprotect(); print_dbg("\r\nECCHRS example using Nand Flash.\r\n================================\r\n\r\n"); // - Simple test of the NF communication through the SMC. // - Find all bad blocks. // - Find a valid block for the remaining tests. nf_reset_nands(NF_N_DEVICES); print_dbg("\tCPU, HSB is at 12000000Mhz.\r\n"); print_dbg("\tPBA, PBB is at 12000000Mhz.\r\n"); print_dbg("\tDetecting Nand Flash device(s).\r\n"); for( i_dev=0 ; i_dev<NF_N_DEVICES ; i_dev++ ) { // Performs some init here... valid_block_found[i_dev] = false; // Test Maker and Device ids u32_nf_ids = nf_read_id( NF_READ_ID_CMD, i_dev ); maker_id = MSB0(u32_nf_ids); device_id = MSB1(u32_nf_ids); print_dbg("\t\tNF"); print_dbg_hex(i_dev); print_dbg(" [Maker="); print_dbg_hex(maker_id); print_dbg("] [Device="); print_dbg_hex(device_id); print_dbg("]\r\n"); if( maker_id==M_ID_MICRON ) { print_dbg("\t\t Micron chip"); if( device_id==0xDA ){ print_dbg("- MT29F2G08AACWP device\r\n"); } else { print_dbg("- *** Error: unexpected chip detected. Please check the board settings and hardware.\r\n"); return -1; } } else { print_dbg("\t\t *** Error: unexpected chip detected. Please check the board settings and hardware.\r\n"); return -1; } } // Looking for valid blocks for the test. for( i_dev=0 ; i_dev<NF_N_DEVICES ; i_dev++ ) { nf_select(i_dev); for( i_block=0 ; i_block<G_N_BLOCKS ; i_block++ ) { nf_open_page_read( nf_block_2_page(i_block), NF_SPARE_POS + G_OFST_BLK_STATUS ); if( (nf_rd_data()==0xFF) ) { // The block is valid. print_dbg("\tValid block found ("); print_dbg_ulong(i_block); print_dbg(") on NF "); print_dbg_hex(i_dev); print_dbg("\r\n"); valid_block_found[i_dev]= true; valid_block_addr[i_dev] = i_block; break; } } } for( i_dev=0 ; i_dev<NF_N_DEVICES ; i_dev++ ) if( !valid_block_found[i_dev] ) { print_dbg("Error: no valid blocks found.\r\n"); return 0; } print_dbg("\tECCHRS IP ver "); print_dbg_ulong(ecchrs->version); print_dbg("("); print_dbg_hex(ecchrs->version); print_dbg(")"); print_dbg("\r\n"); // Work with NF 0 from now... nf_select(0); // Setup the ECCHRS. ecchrs_init(&AVR32_ECCHRS, &ECCHRS_OPTIONS); // Ensures that the block is erased for the test. print_dbg("\tErasing a free block for the test.\r\n"); nf_erase_block(nf_block_2_page(valid_block_addr[0]), false); // Reset the ECCHRS state machine. ecchrs_reset(&AVR32_ECCHRS); // Program a simple patterns in the first page. print_dbg("\tProgramming the first page with a simple pattern.\r\n"); nf_open_page_write( nf_block_2_page(valid_block_addr[0]), 0); for ( i = 0; i < 2048/2; i++ ) { U16 val = i; nf_wr_data(MSB(val)); nf_wr_data(LSB(val)); } // Extract the ECCs and store them at the end of the page. // [2054; 2063]: codeword 0:9 // [2070; 2079]: codeword 10:19 // [2086; 2095]: codeword 20:29 // [2102; 2111]: codeword 30:39 // Since we use the Random Data Output command, we need to freeze // the ECCHRS in order to keep our ECC codewords unchanged. print_dbg("\tExtracting the ECCHRS codewords and store them in the page.\r\n"); ecchrs_freeze(&AVR32_ECCHRS); // not needed if ECCHRS reaches the end of page. for ( i=0 ; i<4 ; i++ ) { U16 offset = 2048+6+16*i; nf_wr_cmd(NF_RANDOM_DATA_INPUT_CMD); nf_wr_addr( LSB(offset) ); nf_wr_addr( MSB(offset) ); for ( j=0 ; j<10 ; j++ ) nf_wr_data( ecchrs_get_cw(&AVR32_ECCHRS, i*10+j) ); } ecchrs_unfreeze(&AVR32_ECCHRS); nf_wr_cmd(NF_PAGE_PROGRAM_CMD); // Now let's test the ECC verification. print_dbg("\tReading the first page.\r\n"); nf_open_page_read( nf_block_2_page(valid_block_addr[0]), 0); for( i=0 ; i<2048 ; i++ ) nf_rd_data(); print_dbg("\tChecking if the data are valid thanks to the ECCHRS codewords.\r\n"); for ( i=0 ; i<4 ; i++ ) { U16 offset = 2048+6+16*i; ecchrs_freeze(&AVR32_ECCHRS); nf_wr_cmd(NF_RANDOM_READ_CMD_C1); nf_wr_addr( LSB(offset) ); nf_wr_addr( MSB(offset) ); nf_wr_cmd(NF_RANDOM_READ_CMD_C2); ecchrs_unfreeze(&AVR32_ECCHRS); for ( j=0 ; j<10 ; j++ ) nf_rd_data(); } // Check if there is any errors after the read of the page. i = ecchrs_4bit_check_error(&AVR32_ECCHRS); print_dbg("\tSR1 is "); print_dbg_ulong(i); print_dbg("("); print_dbg_hex(i); print_dbg(")"); print_dbg("\r\n"); if(i&(15)) { print_dbg("\tERROR: ECCHRS detects some errors in the sectors 1, 2, 3 or 4\r\n"); } else print_dbg("\tNo error detected.\r\n"); // Let the block free. nf_erase_block(nf_block_2_page(valid_block_addr[0]), false); return 0; }
//! \brief Read the ID of the Nand-Flash and update the global variable //! //! \return : //! nf index of listing "nf_listing" //! otherwise : NO_NF_CONNECTED or NF_UNKNOW //! U8 nfc_detect( void ) { U32 u32_nf_ids; U8 u8_i, u8_conf; // Init the Nand Flash Controller nf_init( NF_MAX_DEVICES, 0 ); nf_reset_nands( NF_MAX_DEVICES ); // Reset all the NF devices // Check the presence of device 0 if ( false == nfc_nf_is_ready() ) return NO_NF_CONNECTED; // Read the Nand Flash IDs of device 0 u32_nf_ids = nf_read_id( NF_READ_ID_CMD, 0 ); // Identify the Nand Flash (device 0) for( u8_i=0 ; u8_i < (sizeof(nf_list_id)/sizeof(St_nf_id)) ; u8_i++) { if((nf_list_id[u8_i].manuf == MSB0(u32_nf_ids)) && (nf_list_id[u8_i].dev == MSB1(u32_nf_ids))) break; // here, ID is know } if( u8_i == (sizeof(nf_list_id)/sizeof(St_nf_id)) ) return NF_UNKNOW; // Set NF configuration parameters for initialisation and access #if (NF_GENERIC_DRIVER==true) # error Test me... g_shift_page_byte =; g_shift_block_page =; #endif #if (NF_GENERIC_DRIVER==true) || (NF_AUTO_DETECT_2KB==true) ||(NF_AUTO_DETECT_512B==true) // Record info u8_conf = nf_list_id[u8_i].conf; g_dev_maker = MSB0(u32_nf_ids); // Device maker g_dev_id = MSB1(u32_nf_ids); // Device ID // Search the number of block of device for( u8_i=0 ; u8_i < (sizeof(nf_list_link_id_block)/sizeof(St_nf_link_id_block)) ; u8_i++) { if( nf_list_link_id_block[u8_i].dev_id == g_dev_id ) break; // ID found } if( u8_i == (sizeof(nf_list_link_id_block)/sizeof(St_nf_link_id_block)) ) while(1); // Error in NF definition g_n_zones = nf_list_link_id_block[u8_i].nb_zones; #if (NF_AUTO_DETECT_2KB==true) if( 1 == g_n_zones ) g_n_row_cycles = 2; else g_n_row_cycles = 3; #endif #if (NF_AUTO_DETECT_512B==true) if( 2 >= g_n_zones ) g_n_row_cycles = 2; else g_n_row_cycles = 3; #endif g_n_blocks = g_n_zones*1024L; g_copy_back_cont = nf_list_conf[u8_conf].copy_back_cont ; g_copy_back_discont = nf_list_conf[u8_conf].copy_back_discont; g_cache_program = nf_list_conf[u8_conf].cache_program ; g_ce_low = nf_list_conf[u8_conf].ce_low; g_clock_dfc_nfc = (nf_list_conf[u8_conf].dfc_nfc_clock<<5) & MSK_DNFCKS; Nfc_set_read_timing((U8)nf_list_conf[u8_conf].timing_read ); if( g_ce_low ) { nf_force_CE(); } #endif return u8_i; }
/*! \brief Main function. */ int main(void) { bool valid_block_found[NF_N_DEVICES]; U32 u32_nf_ids, i_dev, i_block; U8 maker_id, device_id, byte3; U32 i, time_s, time_e; U8 data; // start init sysclk_init(); // Enable clock for require module sysclk_enable_hsb_module(SYSCLK_EBI); sysclk_enable_pbb_module(SYSCLK_SMC_REGS); sysclk_enable_pbb_module(SYSCLK_HMATRIX); // Initialize the board. // The board-specific conf_board.h file contains the configuration of the board // initialization. board_init(); init_stdio(); #ifdef NF_ADDON // addon nandflash board for EVK1104 (not mounted by default) // Unselect NF on board gpio_set_gpio_pin(AVR32_PIN_PX53); gpio_set_gpio_pin(AVR32_PIN_PX52); #endif nf_init(sysclk_get_cpu_hz()); nf_unprotect(); printf("\x0C"); printf("Nand Flash example.\r\n===================\r\n\r\n"); // - Simple test of the NF communication through the SMC. // - Find all bad blocks. // - Find a valid block for the remaining tests. nf_reset_nands(NF_N_DEVICES); printf("\tDetecting Nand Flash device(s).\r\n"); for( i_dev=0 ; i_dev<NF_N_DEVICES ; i_dev++ ) { // Performs some init here... valid_block_found[i_dev] = false; // Test Maker and Device ids u32_nf_ids = nf_read_id( NF_READ_ID_CMD, i_dev ); maker_id = MSB0(u32_nf_ids); device_id = MSB1(u32_nf_ids); byte3 = MSB3(u32_nf_ids); printf("\t\tNF %ld: [Maker=0x%02x] [Device=0x%02x] [byte3=0x%02x]\r\n", i_dev, maker_id, device_id, byte3); if( maker_id==M_ID_MICRON ) { printf("\t\t Micron chip"); if( (device_id==0xDA) && (byte3==0x15) ) printf("- MT29F2G08AACWP device\r\n"); else if( (device_id==0xDA) && (byte3==0x95) ) printf("- MT29F2G08AADWP device\r\n"); else { printf("- *** Error: unexpected chip detected. Please check the board settings and hardware.\r\n"); return -1; } } else { printf("\t\t *** Error: unexpected chip detected. Please check the board settings and hardware.\r\n"); return -1; } } printf("\r\n\tTesting bad blocks.\r\n"); for( i_dev=0 ; i_dev<NF_N_DEVICES ; i_dev++ ) { printf("\t\tNF %ld:\r\n", i_dev); nf_select(i_dev); for( i_block=0 ; i_block<G_N_BLOCKS ; i_block++ ) { nf_open_page_read( nf_block_2_page(i_block), NF_SPARE_POS + G_OFST_BLK_STATUS ); if( (nf_rd_data()!=0xFF) ) { // The block is bad. printf("\t\t\tBlock %ld (0x%lx) is bad.\r\n", i_block, i_block); } else { if( !valid_block_found[i_dev] ) { valid_block_found[i_dev]= true; valid_block_addr[i_dev] = i_block; printf("\t\t\tFirst valid block is at address %ld (0x%lx).\r\n", i_block, i_block); } } } } for( i_dev=0 ; i_dev<NF_N_DEVICES ; i_dev++ ) if( !valid_block_found[i_dev] ) { printf("Error %d\r\n", __LINE__); return 0; } // - Ensure good NF behaviour through simple commands. // Erase, Program, Read // - Measures NF timings. printf("\r\n\tMeasuring NF timings.\r\n"); for( i_dev=0 ; i_dev<NF_N_DEVICES ; i_dev++ ) { printf("\t\tNF %ld:\r\n", i_dev); nf_select(i_dev); nf_erase_block( nf_block_2_page(valid_block_addr[0]), false); time_s = Get_sys_count(); nf_wait_busy(); time_e = Get_sys_count(); // Verify that the block is erased. nf_open_page_read( nf_block_2_page(valid_block_addr[0]), 0); for( i= 0; i<2048 ; i++ ) { data = nf_rd_data(); if( data!=0xFF ) { printf("\tError: offset %d is not erased (read %d).\r\n", (U8)i, data); return 0; } } printf("\t\t\tTime to erase a page:%ld cy (%ld us)\r\n", time_e-time_s, cpu_cy_2_us(time_e-time_s, sysclk_get_cpu_hz())); nf_open_page_write( nf_block_2_page(valid_block_addr[0]), 0); for( i=0 ; i<2048 ; i++ ) nf_wr_data(i%256); nf_wr_cmd(NF_PAGE_PROGRAM_CMD); time_s = Get_sys_count(); nf_wait_busy(); time_e = Get_sys_count(); printf("\t\t\tTime to program a page:%ld cy (%ld us)\r\n", time_e-time_s, cpu_cy_2_us(time_e-time_s, sysclk_get_cpu_hz())); time_s = Get_sys_count(); nf_open_page_read( nf_block_2_page(valid_block_addr[0]), 0); time_e = Get_sys_count(); printf("\t\t\tTime to access to a page:%ld cy (%ld us)\r\n", time_e-time_s, cpu_cy_2_us(time_e-time_s, sysclk_get_cpu_hz())); for( i= 0; i<2048 ; i++ ) { data = nf_rd_data(); if( data!= i%256) { printf("\tError: expect %d, read %d\r\n", (U8)i, data); return 0; } } } printf("Example DONE\r\n"); return 0; }