//initializes the 24L01 to all default values except the PWR_UP and PRIM_RX bits
//this function also disables the auto-ack feature on the chip (EN_AA register is 0)
//bool rx is true if the device should be a receiver and false if it should be
// a transmitter.
//unsigned char payload_width is the payload width for pipe 0. All other pipes
// are left in their default (disabled) state.
//bool enable_auto_ack controls the auto ack feature on pipe 0. If true, auto-ack will
// be enabled. If false, auto-ack is disabled.
void nrf24l01_initialize_debug(bool rx, unsigned char p0_payload_width, bool enable_auto_ack)
{
unsigned char config;
unsigned char en_aa;
config = nrf24l01_CONFIG_DEFAULT_VAL | nrf24l01_CONFIG_PWR_UP;
if(enable_auto_ack != false)
en_aa = nrf24l01_EN_AA_ENAA_P0;
else
en_aa = nrf24l01_EN_AA_ENAA_NONE;
if(rx == true)
config = config | nrf24l01_CONFIG_PRIM_RX;
nrf24l01_initialize(config,
true,
en_aa,
nrf24l01_EN_RXADDR_DEFAULT_VAL,
nrf24l01_SETUP_AW_DEFAULT_VAL,
nrf24l01_SETUP_RETR_DEFAULT_VAL,
nrf24l01_RF_CH_DEFAULT_VAL,
nrf24l01_RF_SETUP_DEFAULT_VAL,
NULL,
NULL,
nrf24l01_RX_ADDR_P2_DEFAULT_VAL,
nrf24l01_RX_ADDR_P3_DEFAULT_VAL,
nrf24l01_RX_ADDR_P4_DEFAULT_VAL,
nrf24l01_RX_ADDR_P5_DEFAULT_VAL,
NULL,
p0_payload_width,
nrf24l01_RX_PW_P1_DEFAULT_VAL,
nrf24l01_RX_PW_P2_DEFAULT_VAL,
nrf24l01_RX_PW_P3_DEFAULT_VAL,
nrf24l01_RX_PW_P4_DEFAULT_VAL,
nrf24l01_RX_PW_P5_DEFAULT_VAL);
}
/******** Transceiver_Init *************************************************
// Initialize Transceiver using SPI1
// Input: none
// Output: status
// ------------------------------------------------------------------------*/
unsigned char Transceiver_Init ( void )
{
unsigned char status = SUCCESS;
// create RX queues
Transceiver_RX_Queue = xQueueCreate ( 10, sizeof( unsigned char [TRANSCEIVER_MAX_PAYLOAD] ) );
if ( NULL == Transceiver_RX_Queue )
{
status = ERROR_QUEUE_NOT_CREATED;
Debug_Printf ("Transceiver_Init: Error 0x%x\n", status);
goto exit;
}
// create lock
vSemaphoreCreateBinary(Transceiver_Mutex);
if ( NULL == Transceiver_Mutex )
{
status = ERROR_LOCK_NOT_CREATED;
Debug_Printf ("Transceiver_Init: Error 0x%x\n", status);
goto exit;
}
// initialize spi1
SPI_Init ( SPI1 );
// CE and CSN are output
GPIO_Init ( nrf24l01_CE_PORT, nrf24l01_CE_PIN | nrf24l01_CSN_PIN,
GPIO_DIR_MODE_OUT, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU );
// IRQ is input and interrupt-enabled
GPIO_Init ( nrf24l01_IRQ_PORT, nrf24l01_IRQ_PIN,
GPIO_DIR_MODE_IN, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU );
// initialize nRF24L01+, initialize device as receiver, auto-ack
nrf24l01_initialize (
nrf24l01_CONFIG_DEFAULT_VAL | nrf24l01_CONFIG_PWR_UP | nrf24l01_CONFIG_PRIM_RX,
true,
nrf24l01_EN_AA_ENAA_P0,
nrf24l01_EN_RXADDR_DEFAULT_VAL,
nrf24l01_SETUP_AW_DEFAULT_VAL,
nrf24l01_SETUP_RETR_ARD | nrf24l01_SETUP_RETR_ARC_5,
nrf24l01_RF_CH_DEFAULT_VAL,
nrf24l01_RF_SETUP_DEFAULT_VAL,
NULL,
NULL,
nrf24l01_RX_ADDR_P2_DEFAULT_VAL,
nrf24l01_RX_ADDR_P3_DEFAULT_VAL,
nrf24l01_RX_ADDR_P4_DEFAULT_VAL,
nrf24l01_RX_ADDR_P5_DEFAULT_VAL,
NULL,
TRANSCEIVER_MAX_PAYLOAD,
nrf24l01_RX_PW_P1_DEFAULT_VAL,
nrf24l01_RX_PW_P2_DEFAULT_VAL,
nrf24l01_RX_PW_P3_DEFAULT_VAL,
nrf24l01_RX_PW_P4_DEFAULT_VAL,
nrf24l01_RX_PW_P5_DEFAULT_VAL );
// enable IRQ interrupt, active low
GPIO_SetInterruptTask ( nrf24l01_IRQ_PORT, nrf24l01_IRQ_PIN,
GPIO_FALLING_EDGE, 2, Transceiver_Receive );
exit:
return status;
}
