ret_code_t nrf_drv_clock_init(void) { ret_code_t err_code = NRF_SUCCESS; if (m_clock_cb.module_initialized) { err_code = NRF_ERROR_MODULE_ALREADY_INITIALIZED; } else { m_clock_cb.p_hf_head = NULL; m_clock_cb.hfclk_requests = 0; m_clock_cb.p_lf_head = NULL; m_clock_cb.lfclk_requests = 0; nrf_drv_common_power_clock_irq_init(); #ifdef SOFTDEVICE_PRESENT if (!softdevice_handler_is_enabled()) #endif { nrf_clock_lf_src_set((nrf_clock_lfclk_t)CLOCK_CONFIG_LF_SRC); } #if CALIBRATION_SUPPORT m_clock_cb.cal_state = CAL_STATE_IDLE; #endif m_clock_cb.module_initialized = true; } NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code)); return err_code; }
ret_code_t nrf_drv_clock_init(void) { uint32_t result = NRF_SUCCESS; if (m_clock_cb.module_initialized) { return MODULE_ALREADY_INITIALIZED; } m_clock_cb.p_hf_head = NULL; m_clock_cb.hfclk_requests = 0; #ifndef SOFTDEVICE_PRESENT m_clock_cb.p_lf_head = NULL; m_clock_cb.lfclk_requests = 0; nrf_clock_xtalfreq_set(CLOCK_CONFIG_XTAL_FREQ); nrf_clock_lf_src_set((nrf_clock_lf_src_t)CLOCK_CONFIG_LF_SRC); nrf_drv_common_irq_enable(POWER_CLOCK_IRQn, CLOCK_CONFIG_IRQ_PRIORITY); #if CALIBRATION_SUPPORT m_clock_cb.cal_state = CAL_STATE_IDLE; #endif // CALIBRATION_SUPPORT #else // SOFTDEVICE_PRESENT uint8_t is_enabled; result = sd_softdevice_is_enabled(&is_enabled); if((result == NRF_SUCCESS) && !is_enabled) { result = NRF_ERROR_SOFTDEVICE_NOT_ENABLED; } #endif // SOFTDEVICE_PRESENT m_clock_cb.module_initialized = true; return result; }
void nrfx_clock_enable(void) { NRFX_ASSERT(m_clock_cb.module_initialized); nrfx_power_clock_irq_init(); nrf_clock_lf_src_set((nrf_clock_lfclk_t)NRFX_CLOCK_CONFIG_LF_SRC); #if NRFX_CHECK(NRFX_POWER_ENABLED) nrfx_clock_irq_enabled = true; #endif NRFX_LOG_INFO("Module enabled."); }
int main(int argc, char **argv) { // configure console pins nrf_gpio_cfg_output(TXPIN); nrf_gpio_cfg_input(RXPIN, NRF_GPIO_PIN_NOPULL); nrf_uart_txrx_pins_set(NRF_UART0, TXPIN, RXPIN); // Start lf clock nrf_clock_lf_src_set(NRF_CLOCK_LFCLK_Xtal); nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED); nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTART); while (!nrf_clock_event_check(NRF_CLOCK_EVENT_LFCLKSTARTED)); nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED); SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; testStart(); return 0; }